2026-04-19 01:31:30.623 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.105.20:5700'
2026-04-19 01:31:30.623 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.105.20:5802)
2026-04-19 01:31:30.623 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.105.20:5801)
2026-04-19 01:31:30.623 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.105.22:6700'
2026-04-19 01:31:30.623 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.105.22:6802)
2026-04-19 01:31:30.623 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.105.22:6801)
2026-04-19 01:31:30.623 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.105.20:5700/1'
2026-04-19 01:31:30.623 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.105.20:5804)
2026-04-19 01:31:30.623 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.105.20:5803)
2026-04-19 01:31:30.623 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.105.20:5700/2'
2026-04-19 01:31:30.623 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.105.20:5806)
2026-04-19 01:31:30.623 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.105.20:5805)
2026-04-19 01:31:30.623 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.105.20:5700/3'
2026-04-19 01:31:30.623 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.105.20:5808)
2026-04-19 01:31:30.623 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.105.20:5807)
2026-04-19 01:31:30.623 [INFO] fake_trx.py:429 Init complete
2026-04-19 01:31:30.623 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-19 01:31:31.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:31:31.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:31:31.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:31:31.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:31:31.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:31:31.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:31:35.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:31:35.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:31:35.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:35.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:31:35.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 0 -> 1
2026-04-19 01:31:35.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:31:35.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:31:35.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:31:35.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:35.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:31:35.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:31:35.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:31:35.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 0 -> 1
2026-04-19 01:31:35.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:35.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:31:35.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:31:35.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:31:35.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:35.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:31:35.201 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:31:35.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:31:35.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 0 -> 1
2026-04-19 01:31:35.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:35.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:31:35.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:31:35.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:31:35.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:35.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:31:35.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:31:35.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:31:35.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 0 -> 1
2026-04-19 01:31:35.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:31:35.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:31:35.208 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:31:35.208 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:31:35.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:35.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:31:35.691 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:31:35.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:35.749 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:31:35.751 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:31:35.753 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:31:35.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:35.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:35.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:35.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:35.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:35.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:35.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:35.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:35.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:35.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:35.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:35.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:35.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:31:36.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:36.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:36.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:36.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:36.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:36.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:36.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:36.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:36.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:36.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:36.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:36.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:36.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:36.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:36.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:36.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:36.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:36.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.635 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:31:36.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:36.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:36.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:36.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:36.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:36.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:36.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:36.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:36.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:36.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:36.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:31:37.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:37.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:37.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:37.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:37.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:37.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:37.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:37.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:37.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:37.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:37.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:37.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:37.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:37.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:37.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:37.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:37.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:37.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:37.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:37.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:37.580 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:31:37.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:37.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:37.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:37.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:37.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:38.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:38.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:38.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:38.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:38.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:38.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:38.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:38.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:38.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:38.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:38.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:38.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:38.052 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:31:38.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:38.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:38.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:38.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:38.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:38.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:38.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:38.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:38.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:38.523 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:31:38.997 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:31:39.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:39.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:39.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:39.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:39.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:39.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:39.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:39.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:39.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:39.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:39.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:39.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:39.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:39.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:39.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:39.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:39.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:39.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:39.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:39.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:39.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:39.469 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:31:39.942 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:31:40.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:40.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:40.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:40.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:40.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:40.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:40.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:40.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:40.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:40.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:40.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:40.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:40.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.415 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:31:40.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:40.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:40.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:40.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:40.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:40.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:40.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:40.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:40.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:40.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:40.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:40.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:40.887 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:31:40.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:40.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:40.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:40.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:41.360 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:31:41.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:41.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:41.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:41.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:41.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:41.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:41.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:41.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:41.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:41.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:41.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:41.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:41.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:41.833 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:31:41.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:41.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:41.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:41.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:42.306 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:31:42.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:42.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:42.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:42.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:42.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:42.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:42.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:42.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:42.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:42.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:42.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:42.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:42.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:42.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:42.777 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:31:42.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:42.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:42.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:42.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:43.249 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:31:43.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:43.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:43.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:43.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:43.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:43.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:43.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:43.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:43.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:43.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:43.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:43.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:43.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:43.721 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:31:43.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:43.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:43.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:43.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:44.194 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:31:44.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:44.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:44.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:44.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:44.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:44.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:44.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:44.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:44.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:44.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:44.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:44.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:44.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:31:44.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:44.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:44.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:44.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:45.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:45.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:45.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:45.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:45.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:45.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:45.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:45.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:45.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:31:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:45.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:45.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:45.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:45.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:45.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:45.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:45.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:45.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:45.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:45.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:45.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:45.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:45.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:45.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:45.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:45.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.608 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:31:45.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:45.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:45.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:45.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:45.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:45.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:45.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:45.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:45.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:45.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:45.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:45.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:45.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:45.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:45.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.080 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:31:46.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:46.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:46.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:46.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:46.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:46.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:46.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:46.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:46.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:46.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:46.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:46.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:46.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:46.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.553 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:31:46.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:46.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:46.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:46.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:46.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:46.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:46.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:46.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:46.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:46.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:46.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:46.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:47.025 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:31:47.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:47.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:47.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:47.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:47.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:47.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:47.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:47.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:47.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:47.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:47.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:47.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:47.496 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:31:47.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:47.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:47.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:47.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:47.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:47.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:47.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:47.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:47.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:47.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:47.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:47.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:47.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:47.969 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:31:47.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:48.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:48.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:48.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:48.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:48.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:48.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:48.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:48.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:48.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:48.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:48.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:31:48.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:31:48.442 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:31:48.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:48.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:31:48.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:31:48.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:31:48.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:48.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:48.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:48.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:48.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:48.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:48.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:48.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:31:48.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:31:48.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:31:48.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:31:48.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:31:48.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:31:48.908 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:48.909 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:53.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:31:53.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:31:53.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:31:53.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:31:53.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:31:53.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:31:53.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:31:53.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:31:53.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:53.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:31:53.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:31:53.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:31:53.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:31:53.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:31:53.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:53.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:31:53.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:31:53.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:31:53.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:31:53.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:53.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:31:53.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:31:53.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:31:53.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:53.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:31:53.925 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:31:53.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:31:53.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:31:53.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:53.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:31:53.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:31:53.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:31:53.928 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:31:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:31:53.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:31:53.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:31:53.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:31:53.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:31:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:31:53.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:31:53.933 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:31:53.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:31:53.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:31:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:31:54.455 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:31:54.457 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:31:54.459 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:31:54.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:31:54.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:31:54.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:31:54.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 01:31:54.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
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2026-04-19 01:31:54.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:54.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:54.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:54.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 01:31:55.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-04-19 01:31:55.810 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-04-19 01:31:55.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 01:31:55.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:55.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:55.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:55.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:55.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:55.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:31:56.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:31:56.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:31:56.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:31:56.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:31:56.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:31:56.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:31:56.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:31:56.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:31:56.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:31:56.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:31:56.171 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:31:56.171 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=488 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:56.171 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=488 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:56.171 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=488 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:31:56.171 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=488 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:01.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:01.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:01.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:01.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:01.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:01.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:01.181 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:01.181 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:01.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:01.182 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:32:01.184 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:32:01.184 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:32:01.184 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:01.185 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:01.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:01.185 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:32:01.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:01.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:32:01.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:01.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:32:01.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:32:01.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:01.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:01.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:01.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:32:01.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:01.188 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:32:01.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:01.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:32:01.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:32:01.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:01.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:01.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:01.191 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:32:01.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:01.191 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:32:01.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:01.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:32:01.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:32:01.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:32:01.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:32:01.196 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:32:01.197 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:01.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:32:01.678 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:32:01.723 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:32:01.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:01.724 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:32:01.725 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:32:01.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:01.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:01.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:01.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:01.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:01.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:01.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:01.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:01.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:01.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:01.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:01.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:01.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:01.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:01.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:01.761 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:01.761 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:06.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:06.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:06.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:06.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:06.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:06.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:06.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:06.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:06.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:06.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:06.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:32:06.777 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:32:06.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:32:06.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:06.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:06.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:06.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:32:06.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:06.779 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:32:06.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:06.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:32:06.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:32:06.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:06.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:06.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:06.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:32:06.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:06.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:32:06.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:06.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:32:06.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:32:06.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:06.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:06.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:06.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:32:06.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:06.785 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:32:06.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:06.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:32:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:32:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:32:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:32:06.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:32:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:32:06.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:32:06.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:32:06.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:32:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:06.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:32:07.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:32:07.320 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:32:07.322 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:32:07.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:07.323 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:32:07.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:07.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:07.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:07.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:07.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:07.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:07.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:07.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:07.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:07.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:07.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:07.361 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:32:07.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:07.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:12.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:12.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:12.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:12.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:12.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:12.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:12.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:12.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:12.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:12.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:12.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:32:12.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:32:12.375 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:32:12.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:12.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:12.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:12.376 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:32:12.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:12.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:32:12.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:12.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:32:12.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:32:12.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:12.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:12.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:12.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:32:12.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:12.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:32:12.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:12.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:32:12.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:32:12.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:12.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:12.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:12.382 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:32:12.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:12.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:32:12.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:32:12.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:32:12.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:32:12.387 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:32:12.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:12.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:32:12.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:32:12.914 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:32:12.916 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:32:12.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:12.918 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:32:12.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:12.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:12.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:12.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:12.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:12.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:12.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:12.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:12.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:13.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:13.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:13.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:13.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:13.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:13.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:13.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:13.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:13.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:13.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:13.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:13.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:13.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:13.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:13.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:13.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:13.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:13.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:13.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:13.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:13.046 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:32:13.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:13.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:13.046 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:32:18.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:32:18.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:32:18.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:18.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:18.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:18.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:18.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:32:18.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:18.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:18.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:32:18.061 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:32:18.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:32:18.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:32:18.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:18.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:18.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:32:18.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:32:18.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:32:18.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:32:18.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:18.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:32:18.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:32:18.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:18.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:18.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:32:18.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:32:18.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:32:18.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:32:18.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:18.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:32:18.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:32:18.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:18.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:32:18.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:32:18.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:32:18.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:32:18.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:32:18.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:32:18.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:32:18.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:32:18.077 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:32:18.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:18.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:32:18.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:32:18.596 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:32:18.598 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:32:18.599 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:32:18.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:18.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:18.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:18.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:18.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:18.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:18.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:18.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:18.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:18.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:18.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:18.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:18.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:18.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:19.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:32:19.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:19.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:19.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:19.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:19.503 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:32:19.976 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:32:20.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:20.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:20.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:20.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:20.449 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:32:20.921 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:32:21.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:21.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:21.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:21.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:21.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:32:21.865 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:32:22.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:22.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:22.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:22.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:22.337 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:32:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:22.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:22.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:22.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:22.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:22.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:22.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:22.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:22.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:22.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:22.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:22.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:22.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:22.809 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:32:22.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:22.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:22.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:22.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:23.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:23.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:32:23.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:32:23.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:32:23.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:32:23.280 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:32:23.754 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:32:24.226 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:32:24.698 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:32:25.172 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:32:25.644 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:32:26.116 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:32:26.587 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:32:27.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:27.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:27.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:27.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:27.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:27.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:27.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:27.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:27.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:27.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:27.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:27.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:27.061 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:32:27.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:27.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:27.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:27.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:27.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:27.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:27.533 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:32:28.005 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:32:28.476 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:32:28.950 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:32:29.422 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:32:29.894 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:32:30.365 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:32:30.838 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:32:31.311 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:32:31.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:31.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:31.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:31.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:31.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:31.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:31.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:31.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:31.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:31.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:31.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:31.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:31.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:31.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:31.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:31.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:31.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:31.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:31.783 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:32:32.254 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:32:32.728 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:32:33.200 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:32:33.672 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:32:34.143 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:32:34.617 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:32:35.089 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:32:35.560 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:32:35.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:35.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:35.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:35.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:35.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:35.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:35.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:35.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:35.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:35.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:35.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:35.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:35.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:35.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:35.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:35.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:35.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:36.032 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:32:36.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:36.505 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:32:36.978 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:32:37.450 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:32:37.921 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:32:38.395 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:32:38.867 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:32:39.340 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:32:39.813 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:32:40.286 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:32:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:40.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:40.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:40.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:40.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:40.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:40.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:40.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:40.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:40.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:40.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:40.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:40.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:40.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:40.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:40.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:40.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:40.758 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:32:41.229 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:32:41.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:41.703 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:32:42.175 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:32:42.649 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:32:43.121 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:32:43.594 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:32:44.065 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:32:44.538 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:32:45.011 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:32:45.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:45.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:45.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:45.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:45.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:45.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:45.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:45.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:45.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:45.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:45.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:45.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:45.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:45.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:45.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:45.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:45.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:45.483 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:32:45.954 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:32:46.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:46.427 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:32:46.900 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:32:47.373 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:32:47.846 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:32:48.319 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:32:48.791 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:32:49.265 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:32:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:32:50.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:50.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:50.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:50.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:50.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:50.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:50.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:50.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:50.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:50.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:50.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:50.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:50.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:50.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:50.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:50.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:50.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:50.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:50.209 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:32:50.680 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:32:51.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:51.151 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:32:51.619 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:32:52.092 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:32:52.565 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 01:32:53.038 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 01:32:53.511 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 01:32:53.985 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 01:32:54.457 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 01:32:54.929 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 01:32:55.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:55.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:55.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:55.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:55.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:55.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:55.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:55.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:55.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:55.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:55.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:55.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:55.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:55.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:55.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:55.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:55.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:55.400 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 01:32:55.873 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 01:32:55.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:56.346 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 01:32:56.818 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 01:32:57.289 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 01:32:57.763 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 01:32:58.235 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 01:32:58.707 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 01:32:59.178 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 01:32:59.649 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 01:32:59.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:59.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:59.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:59.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:59.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:32:59.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:32:59.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:32:59.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:59.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:59.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:59.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:32:59.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:32:59.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:32:59.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:32:59.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:32:59.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:32:59.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:32:59.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:00.120 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 01:33:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 01:33:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:01.066 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 01:33:01.538 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 01:33:02.009 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 01:33:02.483 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 01:33:02.956 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 01:33:03.429 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 01:33:03.902 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 01:33:04.373 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 01:33:04.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:04.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:04.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:04.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:04.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:04.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:04.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:04.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:04.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:04.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:04.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:04.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:04.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:04.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:04.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:04.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:04.846 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 01:33:05.319 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 01:33:05.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:05.791 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 01:33:06.262 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 01:33:06.735 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 01:33:07.208 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 01:33:07.680 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 01:33:08.151 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 01:33:08.621 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 01:33:09.092 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 01:33:09.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:09.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:09.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:09.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:09.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:09.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:09.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:09.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:09.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:09.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:09.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:09.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:09.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:09.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:09.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:09.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:09.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:09.563 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 01:33:10.037 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 01:33:10.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:10.509 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 01:33:10.981 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 01:33:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 01:33:11.927 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 01:33:12.399 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 01:33:12.870 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 01:33:13.341 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 01:33:13.811 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 01:33:14.282 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 01:33:14.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:14.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:14.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:14.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:14.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:14.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:14.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:14.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:14.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:14.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:14.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:14.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:14.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:14.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:14.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:14.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:14.755 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 01:33:15.228 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 01:33:15.700 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 01:33:16.171 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 01:33:16.644 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 01:33:17.116 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 01:33:17.589 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 01:33:18.059 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 01:33:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:18.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:18.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:18.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:18.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:18.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:18.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:18.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:18.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:18.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:18.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:18.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:18.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:18.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:18.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:18.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:18.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:18.532 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 01:33:18.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:19.005 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 01:33:19.478 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 01:33:19.951 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 01:33:20.424 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 01:33:20.894 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 01:33:21.368 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 01:33:21.840 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 01:33:22.312 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 01:33:22.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:22.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:22.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:22.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:22.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:22.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:22.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:22.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:22.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:22.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:22.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:22.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 01:33:22.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:22.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:22.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:22.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:22.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:22.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:23.256 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 01:33:23.729 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 01:33:24.200 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 01:33:24.672 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 01:33:25.145 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 01:33:25.618 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 01:33:26.089 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 01:33:26.561 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 01:33:26.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:26.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:26.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:26.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:26.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:26.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:26.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:26.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:26.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:26.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:26.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:26.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:27.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:27.034 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 01:33:27.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:27.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:27.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:27.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:27.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:27.506 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 01:33:27.978 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 01:33:28.449 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 01:33:28.923 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 01:33:29.395 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 01:33:29.867 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 01:33:30.338 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 01:33:30.812 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 01:33:31.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:31.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:31.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:31.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:31.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:31.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:31.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:31.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:31.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:31.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:31.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:31.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:31.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:31.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:31.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:31.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:31.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:31.283 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 01:33:31.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:31.755 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 01:33:32.226 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 01:33:32.699 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 01:33:33.172 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 01:33:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 01:33:34.115 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 01:33:34.586 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 01:33:35.059 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 01:33:35.531 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 01:33:35.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:35.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:35.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:35.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:35.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:35.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:35.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:35.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:35.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:35.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:35.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:35.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:35.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:35.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:35.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:35.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:35.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:35.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:36.003 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 01:33:36.474 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 01:33:36.948 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 01:33:37.420 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 01:33:37.892 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 01:33:38.363 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 01:33:38.837 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 01:33:39.309 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 01:33:39.781 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 01:33:39.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:39.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:39.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:39.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:39.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:39.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:39.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:39.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:39.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:39.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:39.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:39.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:40.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:40.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:40.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:40.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:40.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:40.252 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 01:33:40.723 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 01:33:41.194 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 01:33:41.664 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 01:33:42.138 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 01:33:42.610 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 01:33:43.082 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 01:33:43.553 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 01:33:44.024 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 01:33:44.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:44.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:44.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:44.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:44.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:44.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:44.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:44.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:44.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:44.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:44.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:44.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:44.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:44.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:44.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:44.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:44.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:44.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:44.495 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 01:33:44.965 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 01:33:45.439 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 01:33:45.911 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 01:33:46.384 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 01:33:46.857 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 01:33:47.329 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 01:33:47.802 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 01:33:48.272 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 01:33:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:48.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:48.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:48.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:48.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:33:48.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:33:48.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:33:48.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:33:48.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:33:48.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:33:48.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:33:48.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:33:48.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:33:48.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:33:48.492 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:33:48.492 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19531 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:33:48.492 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19531 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:33:48.492 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19531 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:33:48.492 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19531 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:33:53.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:33:53.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:33:53.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:33:53.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:33:53.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:33:53.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:33:53.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:33:53.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:33:53.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:53.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:33:53.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:33:53.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:33:53.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:33:53.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:33:53.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:53.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:33:53.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:33:53.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:33:53.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:33:53.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:33:53.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:33:53.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:33:53.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:33:53.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:53.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:33:53.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:33:53.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:33:53.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:33:53.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:33:53.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:33:53.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:33:53.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:33:53.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:53.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:33:53.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:33:53.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:33:53.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:33:53.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:33:53.510 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:33:53.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:33:53.511 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:33:53.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:53.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:33:53.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:33:53.512 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:53.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:33:58.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:33:58.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:33:58.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:33:58.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:33:58.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:33:58.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:33:58.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:33:58.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:58.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:33:58.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:33:58.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:33:58.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:33:58.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:33:58.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:58.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:33:58.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:33:58.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:33:58.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:33:58.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:33:58.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:33:58.534 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:33:58.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:33:58.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:33:58.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:33:58.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:33:58.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:33:58.539 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:33:58.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:33:58.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:33:59.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:33:59.060 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:33:59.062 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:33:59.063 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:33:59.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:59.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:59.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:59.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:59.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:59.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:59.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:33:59.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:33:59.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:33:59.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:33:59.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:33:59.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:59.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:59.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:59.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:33:59.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:33:59.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:33:59.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:33:59.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:33:59.964 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:33:59.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:33:59.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:33:59.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:33:59.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:33:59.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:00.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:00.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:00.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:34:00.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:00.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:00.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:00.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:00.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:00.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:00.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:00.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:00.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:00.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:00.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:00.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:00.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:00.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:00.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:34:00.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:00.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:00.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:00.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:00.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:00.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:00.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:00.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:00.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:00.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:00.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:01.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:01.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:01.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:01.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:01.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:01.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:34:01.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:01.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:01.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:01.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:01.485 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=637 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:34:01.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:01.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:01.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:01.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:01.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:01.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:01.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:01.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:01.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:01.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:01.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:01.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:01.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:01.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:01.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:01.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:01.851 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:34:02.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:02.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:02.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:02.025 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=754 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:34:02.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:02.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:02.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:02.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:02.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:02.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:02.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:02.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:02.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:02.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:02.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:02.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.323 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:34:02.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:02.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:02.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:02.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:02.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:02.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:02.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:02.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:02.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:02.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:02.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:02.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:02.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:02.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:02.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:02.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:02.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:02.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:34:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:03.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:03.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:03.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:03.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:03.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:03.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:03.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:03.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:03.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:03.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:03.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:03.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:03.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:03.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:03.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:03.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:03.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:03.267 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:34:03.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:03.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:03.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:03.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:03.740 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:34:04.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:04.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:04.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:04.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:04.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:04.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:04.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:04.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:04.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:04.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:04.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:04.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:04.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:04.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.213 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:34:04.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:04.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:04.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:04.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:04.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:04.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:04.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:04.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:04.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:04.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:04.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:04.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:04.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:04.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:04.680 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:34:05.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:05.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:05.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:05.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:05.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:05.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:05.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:05.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:05.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:05.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:05.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:05.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:05.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:05.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.153 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:34:05.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:05.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:05.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:05.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:05.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:05.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:05.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:05.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:05.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:05.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:05.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:05.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:05.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.626 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:34:05.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:05.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:05.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:05.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:05.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:05.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:05.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:05.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:05.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:05.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:05.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:05.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:05.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:05.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.098 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:34:06.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:06.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:06.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:06.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:06.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:06.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:06.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:06.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:06.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:06.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:06.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:06.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:06.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:06.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.569 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:34:06.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:06.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:06.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:06.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:06.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:06.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:06.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:06.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:06.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:06.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:06.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:06.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:06.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:06.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:06.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:06.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:06.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:06.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:06.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:06.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:06.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:06.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:06.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:06.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:07.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:07.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:07.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:07.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.039 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:34:07.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:07.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:07.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:07.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:07.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:07.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:07.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:07.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:07.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:07.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:07.510 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:34:07.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:07.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:07.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:07.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:07.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:07.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:07.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:07.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:07.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:07.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:07.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:07.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:07.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:07.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:07.981 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:34:08.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:08.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:08.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:08.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:08.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:08.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:08.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:08.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:08.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:08.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:08.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:34:08.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:34:08.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:34:08.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:34:08.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:34:08.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:34:08.443 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:34:08.443 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:34:08.443 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:34:08.443 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:34:13.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:34:13.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:34:13.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:34:13.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:34:13.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:34:13.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:34:13.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:34:13.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:34:13.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:13.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:34:13.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:34:13.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:34:13.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:34:13.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:34:13.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:13.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:34:13.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:34:13.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:34:13.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:34:13.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:34:13.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:34:13.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:34:13.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:34:13.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:34:13.463 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:34:13.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:34:13.466 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:34:13.466 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:34:13.466 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:13.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:13.471 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:34:13.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:34:13.991 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:34:13.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:13.995 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:34:13.999 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:34:14.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:14.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:14.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:14.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:14.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:14.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:14.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:14.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:14.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:14.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:14.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:14.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:14.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:14.420 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:34:14.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:14.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:14.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:14.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:14.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:14.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:14.892 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:34:15.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:15.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:15.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:15.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:15.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:15.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:15.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:15.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:15.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:15.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:15.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:15.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:15.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:15.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:15.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:15.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:15.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:15.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:34:15.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:15.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:15.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:15.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:15.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:34:16.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:16.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:16.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:34:16.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:16.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:16.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:16.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:16.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:16.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:16.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:16.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:16.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:16.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:16.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:16.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:16.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:16.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:16.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:16.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:16.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:16.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:16.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:16.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:16.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:34:17.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:17.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:17.254 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:34:17.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:17.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:17.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:17.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:17.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:17.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:17.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:17.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:17.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:17.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:17.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:17.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:17.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:17.727 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:34:17.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:17.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:17.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:17.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:17.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:18.198 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:34:18.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:18.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:18.670 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:34:19.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:19.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:19.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:19.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:19.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:19.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:19.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:19.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:19.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:19.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:19.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:19.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:19.143 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:34:19.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:19.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:19.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:19.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:19.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:19.616 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:34:20.088 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:34:20.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:20.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:20.559 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:34:20.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:20.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:20.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:20.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:20.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:20.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:20.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:20.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:20.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:20.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:20.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:20.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:20.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:20.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:20.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:20.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:20.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:21.030 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:34:21.503 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:34:21.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:21.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:34:22.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:22.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:22.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:22.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:22.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:22.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:22.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:22.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:22.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:22.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:22.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:22.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:22.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:22.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:22.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:22.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:22.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:22.447 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:34:22.918 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:34:23.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:23.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:23.392 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:34:23.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:23.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:23.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:23.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:23.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:23.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:23.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:23.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:23.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:23.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:23.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:23.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:23.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:23.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:23.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:23.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:23.864 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:34:24.336 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:34:24.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:24.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:24.810 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:34:25.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:25.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:25.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:25.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:25.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:25.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:25.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:25.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:25.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:25.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:25.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:25.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:25.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:25.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:25.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:25.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:25.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:25.282 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:34:25.754 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:34:26.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:26.225 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:34:26.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:26.696 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:34:26.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:26.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:26.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:26.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:26.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:26.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:26.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:26.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:26.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:26.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:26.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:26.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:26.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:26.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:26.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:26.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:26.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:26.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:27.167 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:34:27.640 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:34:28.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:28.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:28.113 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:34:28.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:28.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:28.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:28.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:28.585 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:34:28.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:28.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:28.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:28.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:28.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:28.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:28.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:28.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:28.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:28.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:28.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:28.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:28.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:29.056 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:34:29.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:29.530 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:34:29.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:30.002 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:34:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:30.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:30.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:30.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:30.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:30.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:30.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:30.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:30.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:30.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:30.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:30.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:30.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:30.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:30.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:30.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:30.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:30.474 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:34:30.946 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:34:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:31.416 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:34:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:31.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:31.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:31.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:31.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:31.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:31.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:31.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:31.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:31.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:31.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:31.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:31.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:31.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:31.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:31.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:31.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:31.887 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:34:32.360 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:34:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:34:32.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:32.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:32.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:32.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:33.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:33.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:33.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:33.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:33.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:33.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:33.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:33.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:33.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:33.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:33.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:33.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:33.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:33.305 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:34:33.776 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:34:33.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:33.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:34.247 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:34:34.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:34.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:34.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:34.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:34.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:34.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:34.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:34.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:34.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:34.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:34.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:34.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:34.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:34.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:34.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:34.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:34.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:34:35.191 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:34:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:35.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:35.663 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:34:35.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:35.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:35.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:35.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:35.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:35.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:35.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:35.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:35.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:35.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:35.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:35.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:35.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:35.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:35.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:35.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:35.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:36.135 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:34:36.606 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:34:36.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:36.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:37.080 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:34:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:37.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:37.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:37.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:37.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:37.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:37.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:37.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:37.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:37.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:37.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:37.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:37.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:37.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:37.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:37.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:37.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:37.552 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:34:37.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:37.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:38.024 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:34:38.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:38.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:38.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:38.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:38.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:38.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:38.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:38.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:38.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:38.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:38.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:38.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:38.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:38.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:38.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:38.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:38.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:38.494 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:34:38.966 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:34:39.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:39.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:39.439 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:34:39.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:39.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:39.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:39.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:39.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:39.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:39.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:39.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:39.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:39.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:39.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:39.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:39.912 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:34:39.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:39.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:39.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:39.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:39.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:40.384 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:34:40.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:40.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:40.855 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:34:41.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:41.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:41.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:41.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:41.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:41.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:41.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:41.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:41.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:41.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:41.296 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:41.296 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:41.325 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:34:41.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:41.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:41.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:41.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:41.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:41.797 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:34:42.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:42.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:42.270 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:34:42.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:42.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:42.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:42.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:42.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:42.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:42.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:34:42.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:34:42.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:34:42.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:34:42.731 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:34:42.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:34:42.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:34:47.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:34:47.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:34:47.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:34:47.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:34:47.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:34:47.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:34:47.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:34:47.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:34:47.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:47.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:34:47.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:34:47.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:34:47.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:34:47.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:34:47.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:47.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:34:47.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:34:47.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:34:47.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:34:47.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:47.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:34:47.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:34:47.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:34:47.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:47.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:34:47.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:34:47.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:34:47.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:34:47.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:47.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:34:47.758 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:34:47.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:34:47.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:34:47.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:34:47.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:34:47.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:34:47.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:34:47.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:34:47.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:34:47.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:34:47.763 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:34:47.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:34:47.768 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:34:48.246 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:34:48.291 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:34:48.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:48.295 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:34:48.298 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:34:48.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:48.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:48.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:48.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:48.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:48.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:48.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:48.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:48.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:48.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:48.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:48.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:48.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:48.718 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:34:48.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:48.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:48.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:48.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:49.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:34:49.663 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:34:49.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:49.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:49.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:49.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:50.135 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:34:50.607 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:34:50.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:50.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:50.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:50.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:51.078 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:34:51.552 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:34:51.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:51.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:51.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:51.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:52.024 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:34:52.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:52.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:52.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:52.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:52.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:52.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:52.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:52.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:52.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:52.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:52.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:52.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:52.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:52.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:52.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:52.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:52.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:52.496 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:34:52.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:34:52.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:34:52.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:34:52.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:34:52.967 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:34:53.441 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:34:53.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:34:54.385 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:34:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:34:55.331 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:34:55.803 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:34:56.274 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:34:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:56.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:56.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:56.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:56.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:34:56.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:34:56.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:34:56.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:56.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:56.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:56.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:34:56.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:34:56.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:34:56.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:34:56.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:34:56.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:56.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:34:56.747 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:34:57.220 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:34:57.692 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:34:58.163 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:34:58.634 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:34:59.105 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:34:59.578 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:35:00.051 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:35:00.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:00.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:00.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:00.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:00.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:00.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:00.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:00.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:00.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:00.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:00.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:00.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:00.522 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:35:00.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:00.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:00.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:00.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:00.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:00.994 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:35:01.467 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:35:01.940 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:35:02.412 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:35:02.883 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:35:03.356 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:35:03.829 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:35:04.301 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:35:04.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:04.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:04.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:04.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:04.771 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:35:04.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:04.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:04.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:04.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:04.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:04.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:04.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:04.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:04.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:04.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:04.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:04.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:04.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:05.243 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:35:05.716 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:35:06.188 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:35:06.661 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:35:07.132 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:35:07.605 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:35:08.078 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:35:08.550 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:35:09.021 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:35:09.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:09.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:09.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:09.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:09.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:09.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:09.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:09.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:09.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:09.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:09.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:09.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:09.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:09.494 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:35:09.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:09.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:09.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:09.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:09.967 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:35:10.440 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:35:10.913 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:35:11.385 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:35:11.858 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:35:12.331 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:35:12.804 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:35:13.276 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:35:13.750 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:35:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:13.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:13.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:13.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:13.826 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=5629 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:35:13.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:13.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:13.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:13.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:13.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:13.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:13.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:13.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:13.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:13.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:13.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:13.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:13.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:14.222 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:35:14.695 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:35:15.166 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:35:15.637 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:35:16.110 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:35:16.582 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:35:17.055 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:35:17.529 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:35:18.001 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:35:18.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:18.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:18.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:18.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:18.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:18.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:18.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:18.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:18.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:18.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:18.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:18.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:35:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:18.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:18.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:18.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:18.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:18.472 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:35:18.946 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:35:19.418 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:35:19.890 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:35:20.361 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:35:20.832 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:35:21.305 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:35:21.778 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:35:22.250 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 01:35:22.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:22.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:22.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:22.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:22.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:22.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:22.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:22.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:22.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:22.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:22.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:22.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:22.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:22.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:22.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:22.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:22.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:22.720 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 01:35:23.191 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 01:35:23.662 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 01:35:24.133 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 01:35:24.604 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 01:35:25.075 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 01:35:25.545 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 01:35:26.019 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 01:35:26.491 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 01:35:26.963 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 01:35:26.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:27.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:27.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:27.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:27.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:27.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:27.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:27.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:27.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:27.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:27.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:27.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:27.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:35:27.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:27.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:27.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:27.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:27.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:27.434 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 01:35:27.905 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 01:35:28.379 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 01:35:28.851 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 01:35:29.322 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 01:35:29.796 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 01:35:30.268 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 01:35:30.740 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 01:35:31.211 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 01:35:31.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:31.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:31.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:31.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:31.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:31.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:31.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:31.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:31.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:31.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:31.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:31.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:31.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:31.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:31.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:31.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:31.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:31.682 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 01:35:32.153 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 01:35:32.626 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 01:35:33.098 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 01:35:33.570 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 01:35:34.041 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 01:35:34.515 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 01:35:34.987 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 01:35:35.459 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 01:35:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:35.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:35.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:35.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:35.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:35.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:35.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:35.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:35.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:35.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:35.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:35.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:35.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:35.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:35.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:35.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:35.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:35.930 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 01:35:36.401 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 01:35:36.875 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 01:35:37.347 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 01:35:37.819 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 01:35:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 01:35:38.764 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 01:35:39.236 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 01:35:39.708 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 01:35:39.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:39.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:39.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:39.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:40.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:40.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:40.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:40.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:40.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:40.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:40.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:40.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:40.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:40.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:40.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:40.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:40.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:40.179 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 01:35:40.652 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 01:35:41.124 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 01:35:41.596 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 01:35:42.067 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 01:35:42.541 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 01:35:43.013 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 01:35:43.485 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 01:35:43.956 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 01:35:44.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:44.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:44.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:44.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:44.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:44.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:44.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:44.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:44.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:44.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:44.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:44.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:44.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:44.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:44.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:44.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:44.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:44.429 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 01:35:44.902 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 01:35:45.373 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 01:35:45.845 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 01:35:46.318 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 01:35:46.790 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 01:35:47.262 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 01:35:47.733 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 01:35:48.207 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 01:35:48.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:48.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:48.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:48.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:48.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:48.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:48.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:48.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:48.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:48.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:48.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:48.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:48.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:48.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:48.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:48.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:48.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:48.679 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 01:35:49.151 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 01:35:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 01:35:50.096 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 01:35:50.568 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 01:35:51.039 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 01:35:51.513 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 01:35:51.985 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 01:35:52.457 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 01:35:52.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:52.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:52.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:52.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:52.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:52.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:52.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:52.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:52.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:52.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:52.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:52.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:52.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:52.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:52.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:52.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:52.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 01:35:53.401 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 01:35:53.874 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 01:35:54.346 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 01:35:54.817 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 01:35:55.290 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 01:35:55.763 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 01:35:56.235 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 01:35:56.706 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 01:35:56.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:56.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:56.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:56.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:56.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:35:56.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:35:56.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:35:56.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:56.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:56.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:56.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:35:56.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:35:56.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:35:56.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:35:56.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:35:56.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:56.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:35:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 01:35:57.651 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 01:35:58.123 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 01:35:58.594 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 01:35:59.068 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 01:35:59.540 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 01:36:00.012 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 01:36:00.483 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 01:36:00.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:00.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:00.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:00.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:00.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:00.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:00.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:00.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:00.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:00.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:00.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:00.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:00.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:00.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:00.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:00.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:00.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:00.955 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 01:36:01.428 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 01:36:01.900 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 01:36:02.371 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 01:36:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 01:36:03.315 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 01:36:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 01:36:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 01:36:04.731 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 01:36:05.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:05.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:05.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:05.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:05.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:05.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:05.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:05.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:05.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:05.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:05.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:05.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:05.203 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 01:36:05.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:05.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:05.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:05.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:05.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:05.676 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 01:36:06.148 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 01:36:06.619 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 01:36:07.090 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 01:36:07.564 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 01:36:08.035 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 01:36:08.508 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 01:36:08.978 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 01:36:09.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:09.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:09.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:09.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:09.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:09.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:09.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:09.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:09.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:09.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:09.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:09.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:09.449 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 01:36:09.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:09.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:09.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:09.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:09.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:09.920 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 01:36:10.393 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 01:36:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 01:36:11.338 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 01:36:11.809 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 01:36:12.283 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 01:36:12.755 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 01:36:13.227 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 01:36:13.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:13.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:13.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:13.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:13.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:13.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:13.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:13.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:13.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:36:13.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:36:13.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:36:13.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:36:13.690 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:36:13.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:36:13.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:36:18.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:36:18.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:36:18.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:36:18.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:36:18.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:36:18.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:36:18.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:36:18.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:36:18.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:18.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:36:18.705 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:36:18.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:36:18.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:36:18.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:36:18.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:18.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:36:18.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:36:18.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:36:18.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:36:18.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:18.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:36:18.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:36:18.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:36:18.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:18.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:36:18.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:36:18.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:36:18.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:36:18.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:18.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:36:18.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:36:18.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:36:18.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:18.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:36:18.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:36:18.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:36:18.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:36:18.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:18.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:36:18.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:36:18.725 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:36:18.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:18.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:36:18.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:36:18.727 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:18.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:36:23.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:36:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:36:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:36:23.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:36:23.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:36:23.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:36:23.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:36:23.743 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:23.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:36:23.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:36:23.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:36:23.746 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:36:23.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:36:23.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:23.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:36:23.747 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:36:23.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:36:23.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:36:23.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:23.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:36:23.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:36:23.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:36:23.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:23.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:36:23.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:36:23.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:36:23.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:36:23.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:23.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:36:23.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:36:23.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:36:23.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:36:23.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:36:23.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:36:23.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:36:23.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:36:23.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:36:23.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:36:23.754 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:36:23.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:36:23.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:23.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:36:24.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:36:24.283 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:36:24.285 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:36:24.287 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:36:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:24.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:24.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:24.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:24.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:24.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:24.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:24.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:24.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:24.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:24.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:24.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:24.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:24.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:24.709 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:36:24.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:24.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:24.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:25.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:36:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:36:25.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:25.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:25.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:26.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:36:26.599 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:36:26.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:26.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:26.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:26.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:27.072 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:36:27.544 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:36:27.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:27.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:27.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:27.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:28.016 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:36:28.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:28.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:28.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:28.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:28.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:28.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:28.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:28.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:28.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:28.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:28.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:28.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:28.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:28.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:28.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:28.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:28.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:28.487 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:36:28.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:36:28.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:36:28.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:36:28.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:36:28.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:36:29.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:36:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:36:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:36:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:36:31.323 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:36:31.794 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:36:32.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:36:32.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:32.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:32.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:32.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:32.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:32.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:32.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:32.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:32.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:32.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:32.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:32.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:32.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:32.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:32.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:32.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:32.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:32.739 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:36:33.211 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:36:33.683 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:36:34.155 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:36:34.628 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:36:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:36:35.572 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:36:36.044 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:36:36.517 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:36:36.989 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:36:37.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:37.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:37.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:37.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:37.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:37.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:37.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:37.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:37.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:37.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:37.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:37.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:37.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:37.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:37.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:37.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:37.461 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:36:37.932 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:36:38.405 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:36:38.878 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:36:39.350 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:36:39.821 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:36:40.295 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:36:40.767 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:36:41.239 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:36:41.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:41.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:41.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:41.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:41.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:41.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:41.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:41.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:41.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:41.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:41.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:41.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:41.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:41.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:41.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:41.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:41.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:41.710 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:36:42.181 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:36:42.655 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:36:43.127 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:36:43.600 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:36:44.071 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:36:44.544 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:36:45.017 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:36:45.489 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:36:45.963 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:36:46.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:46.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:46.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:46.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:46.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:46.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:46.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:46.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:46.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:46.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:46.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:46.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:46.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:46.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:46.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:46.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:46.435 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:36:46.908 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:36:47.381 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:36:47.854 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:36:48.326 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:36:48.797 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:36:49.271 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:36:49.743 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:36:50.215 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:36:50.686 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:36:50.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:50.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:50.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:50.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:50.899 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=5862 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:36:50.899 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=5862 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:36:50.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:50.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:50.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:50.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:50.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:50.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:50.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:50.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:50.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:50.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:50.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:50.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:51.157 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:36:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:36:52.102 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:36:52.575 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:36:53.048 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:36:53.521 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:36:53.993 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:36:54.464 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:36:54.938 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:36:55.410 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:36:55.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:55.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:55.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:55.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:55.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:36:55.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:36:55.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:36:55.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:55.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:55.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:55.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:36:55.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:36:55.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:36:55.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:36:55.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:36:55.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:36:55.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:55.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:36:55.883 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:36:56.353 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:36:56.824 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:36:57.298 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:36:57.770 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:36:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 01:36:58.713 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 01:36:59.187 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 01:36:59.659 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 01:37:00.131 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 01:37:00.602 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 01:37:00.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:00.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:00.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:00.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:00.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:00.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:00.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:00.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:00.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:00.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:00.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:00.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:00.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:00.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:00.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:00.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:00.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:01.073 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 01:37:01.546 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 01:37:02.019 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 01:37:02.491 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 01:37:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 01:37:03.437 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 01:37:03.909 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 01:37:04.383 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 01:37:04.855 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 01:37:05.327 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 01:37:05.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:05.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:05.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:05.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:05.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:05.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:05.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:05.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:05.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:05.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:05.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:05.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:05.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:37:05.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:05.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:05.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:05.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:05.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:05.798 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 01:37:06.272 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 01:37:06.744 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 01:37:07.217 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 01:37:07.690 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 01:37:08.162 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 01:37:08.635 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 01:37:09.106 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 01:37:09.579 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 01:37:10.052 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 01:37:10.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:10.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:10.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:10.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:10.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:10.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:10.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:10.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:10.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:10.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:10.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:10.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:10.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:10.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:10.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:10.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:10.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:10.524 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 01:37:10.995 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 01:37:11.468 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 01:37:11.941 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 01:37:12.413 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 01:37:12.885 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 01:37:13.358 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 01:37:13.830 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 01:37:14.302 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 01:37:14.773 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 01:37:15.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:15.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:15.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:15.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:15.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:15.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:15.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:15.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:15.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:15.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:15.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:15.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:15.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:15.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:15.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:15.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:15.246 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 01:37:15.719 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 01:37:16.191 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 01:37:16.664 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 01:37:17.137 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 01:37:17.609 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 01:37:18.080 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 01:37:18.551 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 01:37:19.021 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 01:37:19.492 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 01:37:19.963 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 01:37:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:19.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:19.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:19.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:19.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:19.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:19.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:19.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:19.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:19.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:19.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:19.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:20.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:20.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:20.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:20.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:20.436 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 01:37:20.909 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 01:37:21.381 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 01:37:21.852 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 01:37:22.325 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 01:37:22.798 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 01:37:23.269 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 01:37:23.741 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 01:37:24.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:24.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:24.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:24.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:24.069 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=13027 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:37:24.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:24.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:24.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:24.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:24.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:24.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:24.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:24.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:24.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:24.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:24.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:24.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:24.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:24.214 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 01:37:24.686 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 01:37:25.158 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 01:37:25.629 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 01:37:26.103 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 01:37:26.575 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 01:37:27.047 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 01:37:27.520 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 01:37:27.993 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 01:37:28.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:28.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:28.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:28.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:28.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:28.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:28.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:28.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:28.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:28.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:28.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:28.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:28.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:28.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:28.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:28.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 01:37:28.936 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 01:37:29.410 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 01:37:29.882 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 01:37:30.354 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 01:37:30.825 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 01:37:31.298 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 01:37:31.770 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 01:37:32.242 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 01:37:32.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:32.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:32.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:32.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:32.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:32.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:32.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:32.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:32.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:32.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:32.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:32.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:32.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:32.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:32.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:32.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:32.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:32.713 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 01:37:33.186 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 01:37:33.659 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 01:37:34.131 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 01:37:34.602 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 01:37:35.076 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 01:37:35.547 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 01:37:36.019 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 01:37:36.490 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 01:37:36.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:36.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:36.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:36.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:36.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:36.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:36.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:36.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:36.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:36.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:36.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:36.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:36.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:36.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:36.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:36.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:36.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 01:37:37.436 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 01:37:37.908 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 01:37:38.379 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 01:37:38.852 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 01:37:39.324 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 01:37:39.796 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 01:37:40.267 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 01:37:40.741 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 01:37:41.213 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 01:37:41.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:41.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:41.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:41.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:41.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:41.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:41.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:41.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:41.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:41.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:41.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:41.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:41.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:41.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:41.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:41.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:41.685 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 01:37:42.156 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 01:37:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 01:37:43.102 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 01:37:43.574 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 01:37:44.045 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 01:37:44.518 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 01:37:44.991 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 01:37:45.463 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 01:37:45.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:45.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:45.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:45.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:45.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:45.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:45.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:45.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:45.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:45.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:45.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:45.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:45.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:45.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:45.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:45.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:45.934 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 01:37:46.405 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 01:37:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 01:37:47.349 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 01:37:47.821 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 01:37:48.293 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 01:37:48.764 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 01:37:49.238 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 01:37:49.710 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 01:37:49.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:49.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:49.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:49.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:49.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:49.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:49.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:37:49.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:49.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:49.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:49.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:37:49.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:37:49.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:49.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:37:49.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:37:49.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:49.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:50.182 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 01:37:50.653 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 01:37:51.127 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 01:37:51.599 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 01:37:52.071 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 01:37:52.542 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 01:37:53.013 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 01:37:53.486 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 01:37:53.959 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 01:37:54.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:37:54.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:37:54.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:37:54.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:37:54.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:37:54.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:37:54.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:37:54.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:37:54.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:37:54.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:37:54.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:37:54.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:37:54.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:37:54.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:37:54.119 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:37:59.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:37:59.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:37:59.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:37:59.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:37:59.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:37:59.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:37:59.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:37:59.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:37:59.132 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:37:59.132 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:37:59.132 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:37:59.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:37:59.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:37:59.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:37:59.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:37:59.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:37:59.136 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:37:59.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:37:59.136 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:37:59.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:37:59.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:37:59.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:37:59.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:37:59.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:37:59.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:37:59.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:37:59.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:37:59.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:37:59.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:37:59.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:37:59.140 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:37:59.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:37:59.140 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:37:59.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:37:59.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:37:59.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:37:59.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:37:59.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:37:59.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:37:59.145 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:37:59.145 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:37:59.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:37:59.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:37:59.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:37:59.146 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:37:59.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:38:04.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:38:04.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:38:04.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:38:04.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:38:04.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:38:04.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:38:04.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:38:04.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:04.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:38:04.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:38:04.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:38:04.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:38:04.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:38:04.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:04.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:38:04.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:38:04.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:38:04.168 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:38:04.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:04.169 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:38:04.169 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:38:04.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:38:04.170 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:04.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:38:04.170 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:38:04.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:38:04.170 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:38:04.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:04.172 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:38:04.172 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:38:04.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:38:04.173 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:04.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:38:04.173 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:38:04.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:38:04.173 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:38:04.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:38:04.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:38:04.177 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:38:04.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:04.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:04.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:04.181 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:38:04.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:38:04.703 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:38:04.705 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:38:04.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:04.709 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:38:04.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:04.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:04.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:04.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:04.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:04.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:04.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:04.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:04.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:04.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:04.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:04.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:04.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:05.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:38:05.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:05.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:05.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:05.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:05.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:38:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:05.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:05.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:05.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:05.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:05.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:05.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:05.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:05.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:05.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:05.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:05.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:05.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:05.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:05.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:05.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:05.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:06.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:38:06.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:06.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:06.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:06.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:06.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:38:07.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:38:07.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:07.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:07.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:07.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:07.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:07.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:07.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:07.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:07.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:07.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:07.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:07.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:07.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:07.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:07.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:07.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:07.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:07.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:07.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:07.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:07.495 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:38:07.967 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:38:08.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:08.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:08.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:08.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:08.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:08.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:08.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:08.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:08.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:08.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:08.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:08.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:08.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:08.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:08.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:08.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:08.439 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:38:08.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:08.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:08.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:08.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:08.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:08.910 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:38:09.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:09.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:09.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:09.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:09.381 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:38:09.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:09.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:09.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:09.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:09.854 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:38:09.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:09.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:09.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:09.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:09.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:09.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:09.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:09.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:09.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:09.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:09.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:09.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:09.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:38:10.800 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:38:10.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:10.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:10.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:10.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:10.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:10.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:10.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:10.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:10.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:10.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:10.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:10.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:10.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:10.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:10.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:10.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:10.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:11.273 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:38:11.746 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:38:11.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:11.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:11.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:11.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:11.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:11.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:11.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:11.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:11.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:11.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:11.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:11.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:12.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:12.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:12.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:12.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:12.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:12.218 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:38:12.689 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:38:12.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:12.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:12.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:12.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:12.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:12.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:12.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:12.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:12.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:12.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:12.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:12.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:13.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:13.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:13.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:13.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:13.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:13.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:13.162 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:38:13.635 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:38:13.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:13.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:13.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:13.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:14.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:14.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:14.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:14.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:14.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:14.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:14.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:14.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:14.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:14.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:14.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:14.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:14.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:14.107 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:38:14.578 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:38:15.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:15.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:15.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:15.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:15.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:15.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:15.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:15.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:15.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:15.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:15.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:15.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:15.049 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:38:15.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:15.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:15.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:15.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:15.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:15.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:15.520 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:38:15.993 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:38:16.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:16.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:16.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:16.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:16.392 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=2639 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:38:16.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:16.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:16.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:16.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:16.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:16.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:16.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:16.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:16.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:16.466 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:38:16.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:16.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:16.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:16.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:16.938 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:38:17.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:17.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:17.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:17.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:17.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:17.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:17.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:17.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:17.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:17.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:17.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:17.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:17.408 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:38:17.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:17.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:17.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:17.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:17.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:17.880 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:38:18.353 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:38:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:18.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:18.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:18.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:18.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:18.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:18.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:18.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:18.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:18.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:18.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:18.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:18.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:18.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:18.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:18.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:18.825 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:38:19.297 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:38:19.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:19.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:19.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:19.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:19.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:19.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:19.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:19.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:19.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:19.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:19.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:19.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:19.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:19.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:19.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:19.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:19.768 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:38:20.239 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:38:20.712 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:38:20.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:20.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:20.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:20.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:20.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:20.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:20.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:20.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:20.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:20.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:20.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:20.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:20.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:20.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:20.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:20.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:20.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:21.184 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:38:21.656 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:38:22.127 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:38:22.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:22.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:22.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:22.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:22.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:22.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:22.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:22.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:22.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:22.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:22.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:22.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:22.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:22.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:22.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:22.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:22.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:22.598 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:38:23.069 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:38:23.542 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:38:23.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:23.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:23.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:23.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:23.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:23.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:23.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:23.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:23.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:23.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:23.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:23.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:23.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:23.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:23.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:23.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:23.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:24.014 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:38:24.486 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:38:24.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:24.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:24.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:24.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:24.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:24.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:24.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:24.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:24.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:24.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:24.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:24.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:24.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:24.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:24.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:24.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:24.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:24.957 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:38:25.428 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:38:25.902 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:38:26.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:26.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:26.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:26.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:26.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:26.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:26.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:26.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:26.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:26.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:26.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:26.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:26.373 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:38:26.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:26.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:26.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:26.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:26.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:26.845 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:38:27.316 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:38:27.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:27.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:27.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:27.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:27.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:27.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:27.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:27.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:27.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:27.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:27.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:27.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:27.789 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:38:27.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:27.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:27.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:27.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:27.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:28.262 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:38:28.734 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:38:29.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:29.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:29.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:29.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:29.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:29.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:29.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:29.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:29.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:38:29.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:38:29.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:38:29.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:38:29.189 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:38:29.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:38:29.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:38:34.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:38:34.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:38:34.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:38:34.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:38:34.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:38:34.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:38:34.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:38:34.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:38:34.206 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:34.207 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:38:34.207 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:38:34.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:38:34.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:38:34.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:38:34.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:34.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:38:34.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:38:34.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:38:34.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:38:34.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:34.217 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:38:34.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:38:34.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:38:34.218 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:34.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:38:34.218 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:38:34.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:38:34.218 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:38:34.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:34.221 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:38:34.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:38:34.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:38:34.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:38:34.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:38:34.222 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:38:34.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:38:34.222 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:38:34.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:34.225 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:38:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:38:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:38:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:38:34.225 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:38:34.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:38:34.226 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:38:34.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:38:34.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:38:34.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:38:34.758 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:38:34.760 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:38:34.762 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:38:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:34.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:34.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:34.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:34.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:34.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:34.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:34.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:34.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:34.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:34.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:34.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:34.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:34.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:35.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:38:35.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:35.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:35.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:35.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:35.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:38:36.127 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:38:36.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:36.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:36.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:36.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:36.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:38:37.072 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:38:37.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:37.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:37.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:37.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:37.545 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:38:37.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:38.017 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:38:38.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:38.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:38.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:38.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:38.489 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:38:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:38.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:38.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:38.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:38.563 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:38:38.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:38.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:38.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:38.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:38.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:38.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:38.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:38.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:38.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:38.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:38.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:38.963 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:38:39.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:38:39.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:38:39.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:38:39.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:38:39.436 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:38:39.908 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:38:40.382 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:38:40.854 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:38:41.326 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:38:41.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:41.800 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:38:42.273 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:38:42.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:42.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:42.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:42.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:42.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:42.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:42.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:42.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:42.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:42.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:42.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:42.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:42.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:42.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:42.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:42.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:42.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:42.745 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:38:43.216 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:38:43.689 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:38:44.162 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:38:44.634 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:38:45.105 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:38:45.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:45.576 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:38:46.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:46.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:46.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:46.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:46.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:46.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:46.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:46.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:46.046 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:38:46.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:46.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:46.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:46.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:46.520 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:38:46.993 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:38:47.465 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:38:47.936 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:38:48.409 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:38:48.882 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:38:49.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:49.354 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:38:49.825 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:38:49.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:49.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:49.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:49.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:49.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:49.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:49.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:49.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:49.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:49.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:49.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:49.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:49.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:49.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:49.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:49.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:49.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:50.298 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:38:50.770 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:38:51.242 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:38:51.713 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:38:52.184 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:38:52.658 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:38:53.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:53.130 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:38:53.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:53.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:53.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:53.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:53.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:53.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:53.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:53.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:53.572 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:53.572 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:53.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:53.602 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:38:53.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:53.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:53.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:53.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:54.073 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:38:54.547 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:38:55.019 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:38:55.491 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:38:55.962 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:38:56.433 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:38:56.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:56.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:38:56.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:56.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:56.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:56.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:38:56.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:38:56.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:38:56.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:56.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:56.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:56.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:38:56.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:38:56.906 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:38:56.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:38:56.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:38:56.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:38:56.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:56.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:38:57.379 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:38:57.850 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:38:58.322 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:38:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:38:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:38:59.740 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:39:00.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:00.213 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:39:00.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:00.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:00.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:00.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:00.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:00.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:00.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:00.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:00.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:00.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:00.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:00.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:00.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:00.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:00.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:00.685 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:39:01.157 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:39:01.628 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:39:02.102 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:39:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:39:03.046 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:39:03.517 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:39:03.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:03.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:03.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:03.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:03.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:03.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:03.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:39:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:39:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:39:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:39:03.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:39:03.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:39:03.924 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:03.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:08.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:39:08.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:39:08.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:39:08.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:39:08.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:39:08.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:39:08.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:39:08.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:39:08.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:39:08.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:39:08.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:39:08.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:39:08.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:39:08.944 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:39:08.944 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:39:08.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:39:08.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:39:08.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:39:08.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:39:08.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:39:08.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:39:08.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:39:08.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:39:08.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:39:08.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:39:08.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:39:08.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:39:08.950 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:39:08.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:39:08.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:39:08.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:39:09.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:39:09.471 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:39:09.471 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:39:09.472 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:39:09.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:09.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:09.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:09.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:09.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:09.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:09.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:09.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:09.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:09.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:09.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:09.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:09.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:09.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:09.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:39:09.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:09.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:09.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:09.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:10.377 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:39:10.848 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:39:10.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:10.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:10.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:10.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:11.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:39:11.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:39:11.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:11.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:11.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:11.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:12.265 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:39:12.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:12.737 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:39:12.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:12.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:12.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:12.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:13.208 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:39:13.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:13.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:13.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:13.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:13.282 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:13.283 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:13.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:13.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:13.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:13.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:13.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:13.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:13.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:13.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:13.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:13.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:13.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:13.682 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:39:13.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:13.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:13.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:13.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:14.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:39:14.627 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:39:15.100 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:39:15.573 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:39:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:39:16.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:16.519 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:39:16.992 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:39:17.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:17.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:17.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:17.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:17.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:17.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:17.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:17.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:17.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:17.464 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:39:17.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:39:18.405 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:39:18.879 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:39:19.351 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:39:19.824 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:39:20.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:20.297 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:39:20.770 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:39:20.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:20.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:20.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:20.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:20.994 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:20.994 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=2600 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:20.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:20.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:20.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:20.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:20.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:20.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:21.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:21.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:21.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:21.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:21.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:21.242 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:39:21.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:21.716 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:39:21.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:21.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:21.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:21.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:21.953 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=2808 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:21.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:21.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:21.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:21.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:21.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:21.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:21.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:21.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:22.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:22.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:22.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:22.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:22.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:22.188 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:39:22.661 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:39:23.134 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:39:23.606 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:39:24.078 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:39:24.549 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:39:25.023 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:39:25.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:25.495 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:39:25.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:25.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:25.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:25.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:25.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:25.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:25.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:25.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:25.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:25.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:25.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:25.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:25.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:25.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:25.967 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:39:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:39:26.909 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:39:27.380 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:39:27.853 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:39:28.326 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:39:28.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:28.798 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:39:29.272 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:39:29.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:29.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:29.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:29.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:29.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:29.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:29.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:29.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:29.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:29.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:29.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:29.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:29.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:29.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:29.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:29.744 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:39:30.216 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:39:30.690 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:39:31.161 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:39:31.633 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:39:32.105 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:39:32.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:39:33.046 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:39:33.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:33.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:33.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:33.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:33.268 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=5252 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:33.268 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=5252 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:39:33.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:33.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:33.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:33.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:33.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:33.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:33.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:33.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:33.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:33.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:33.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:33.517 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:39:33.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:33.988 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:39:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:34.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:34.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:34.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:34.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:34.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:34.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:34.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:34.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:34.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:34.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:34.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:34.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:34.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:34.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:34.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:34.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:34.458 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:39:34.929 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:39:35.403 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:39:35.875 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:39:36.347 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:39:36.821 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:39:37.293 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:39:37.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:37.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:37.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:37.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:37.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:37.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:37.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:37.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:37.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:37.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:37.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:37.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:37.765 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:39:37.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:37.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:37.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:37.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:38.236 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:39:38.709 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:39:39.182 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:39:39.654 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:39:40.125 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:39:40.598 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:39:40.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:41.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:41.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:41.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:41.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:41.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:41.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:41.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:41.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:41.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:41.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:41.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:41.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:41.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:41.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:41.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:41.071 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:39:41.543 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:39:42.014 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:39:42.485 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:39:42.958 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:39:43.430 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 01:39:43.902 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 01:39:44.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:44.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:44.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:44.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:44.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:44.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:44.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:44.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:44.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:44.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:44.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:44.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:44.373 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 01:39:44.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:44.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:44.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:44.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:44.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:44.844 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 01:39:45.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:45.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:45.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:45.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:45.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:45.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:45.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:45.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:45.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:45.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:45.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:45.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:45.317 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 01:39:45.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:45.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:45.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:45.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:45.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:45.789 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 01:39:46.261 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 01:39:46.732 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 01:39:47.206 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 01:39:47.678 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 01:39:48.150 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 01:39:48.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:48.621 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 01:39:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:49.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:49.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:49.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:49.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:49.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:49.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:49.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:49.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:49.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:49.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:49.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:49.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:49.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:49.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:49.094 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 01:39:49.566 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 01:39:50.038 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 01:39:50.509 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 01:39:50.980 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 01:39:51.451 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 01:39:51.924 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 01:39:52.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:52.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:52.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:52.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:52.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:52.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:52.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:52.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:52.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:52.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:52.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:52.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:52.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:52.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:52.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:52.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:52.397 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 01:39:52.869 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 01:39:53.340 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 01:39:53.813 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 01:39:54.286 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 01:39:54.758 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 01:39:55.229 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 01:39:55.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:55.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:55.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:55.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:55.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:55.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:39:55.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:55.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:55.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:55.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:39:55.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:39:55.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:39:55.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:39:55.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:39:55.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:55.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:55.702 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 01:39:56.174 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 01:39:56.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:56.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:39:56.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:39:56.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:39:56.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:39:56.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:39:56.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:39:56.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:39:56.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:39:56.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:39:56.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:39:56.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:39:56.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:39:56.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:39:56.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:39:56.578 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:40:01.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:01.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:01.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:01.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:01.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:01.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:01.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:01.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:01.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:01.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:01.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:40:01.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:40:01.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:40:01.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:01.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:01.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:01.602 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:40:01.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:01.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:40:01.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:01.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:40:01.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:40:01.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:01.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:01.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:01.605 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:40:01.606 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:01.606 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:40:01.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:01.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:40:01.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:40:01.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:01.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:01.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:01.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:40:01.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:01.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:40:01.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:40:01.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:40:01.611 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:40:01.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:40:01.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:01.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:40:02.094 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:40:02.136 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:02.138 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:40:02.140 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:40:02.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:40:02.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:02.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:02.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:40:02.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:40:02.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:40:02.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:40:02.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:40:02.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:40:02.563 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:40:02.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:02.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:02.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:02.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:03.033 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:40:03.503 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:40:03.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:03.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:03.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:03.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:03.973 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:40:04.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:40:04.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:04.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:04.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:04.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:04.915 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:40:05.386 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:40:05.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:05.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:05.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:05.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:05.856 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:40:06.328 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:40:06.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:06.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:06.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:06.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:06.798 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:40:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:40:07.736 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:40:08.206 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:40:08.677 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:40:09.147 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:40:09.618 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:40:10.089 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:40:10.559 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:40:10.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:10.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:10.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:10.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:10.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:10.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:10.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:10.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:10.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:10.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:10.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:10.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:10.911 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:40:10.911 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:10.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:10.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:10.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:10.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:10.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:10.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:15.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:15.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:15.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:15.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:15.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:15.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:15.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:15.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:15.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:15.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:15.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:40:15.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:40:15.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:40:15.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:15.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:15.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:15.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:40:15.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:15.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:40:15.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:15.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:40:15.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:40:15.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:15.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:15.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:15.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:40:15.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:15.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:40:15.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:15.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:15.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:40:15.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:40:15.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:40:15.935 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:40:15.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:15.940 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:40:16.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:40:16.455 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:16.455 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:40:16.456 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:40:16.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:40:16.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:16.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:16.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:40:16.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:40:16.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:40:16.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:40:16.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:40:16.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:40:16.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:40:16.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:16.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:16.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:16.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:17.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:40:17.827 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:40:17.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:17.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:17.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:17.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:18.298 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:40:18.769 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:40:18.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:18.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:18.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:18.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:19.240 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:40:19.711 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:40:19.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:19.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:19.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:19.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:20.181 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:40:20.654 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:40:20.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:20.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:20.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:20.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:21.127 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:40:21.598 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:40:22.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:40:22.541 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:40:23.011 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:40:23.482 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:40:23.953 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:40:24.423 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:40:24.894 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:40:25.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:25.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:25.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:25.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:25.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:25.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:25.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:25.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:25.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:25.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:25.254 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:40:25.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:25.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:25.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:30.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:30.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:30.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:30.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:30.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:30.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:30.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:30.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:30.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:30.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:30.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:40:30.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:40:30.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:40:30.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:30.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:30.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:30.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:40:30.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:30.276 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:40:30.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:30.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:40:30.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:40:30.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:30.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:30.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:40:30.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:30.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:30.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:40:30.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:30.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:40:30.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:40:30.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:30.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:30.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:30.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:40:30.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:30.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:40:30.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:40:30.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:40:30.288 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:40:30.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:30.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:40:30.770 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:40:30.817 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:30.819 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:40:30.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:40:30.822 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:40:30.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:30.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:30.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:40:31.241 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:40:31.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:31.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:31.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:31.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:31.717 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:40:31.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:40:31.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:40:31.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:40:31.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:40:31.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:40:32.189 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:40:32.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:32.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:32.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:32.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:32.660 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:40:33.131 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:40:33.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:33.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:40:34.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:40:34.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:34.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:34.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:34.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:34.543 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:40:35.014 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:40:35.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:35.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:35.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:35.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:35.484 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:40:35.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:40:36.426 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:40:36.897 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:40:37.366 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:40:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:40:38.304 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:40:38.775 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:40:39.246 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:40:39.716 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:40:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:40:40.658 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:40:41.129 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:40:41.603 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:40:42.075 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:40:42.547 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:40:43.020 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:40:43.493 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:40:43.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:43.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:43.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:43.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:43.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:43.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:43.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:43.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:43.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:43.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:43.627 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:40:43.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:43.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:43.627 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2887 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:40:48.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:48.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:48.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:48.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:48.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:48.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:48.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:48.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:48.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:48.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:40:48.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:40:48.650 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:40:48.650 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:40:48.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:48.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:48.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:48.651 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:40:48.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:40:48.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:40:48.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:48.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:40:48.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:40:48.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:48.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:48.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:48.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:40:48.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:40:48.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:40:48.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:48.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:40:48.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:40:48.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:48.660 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:40:48.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:40:48.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:40:48.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:40:48.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:40:48.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:48.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:40:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:40:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:40:48.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:40:48.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:40:48.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:40:48.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:40:48.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:40:48.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:40:49.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:40:49.192 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:49.193 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:40:49.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:40:49.196 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:40:49.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:49.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:49.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:40:49.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:40:49.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:40:49.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:40:49.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:40:49.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:40:49.620 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:40:49.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:49.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:49.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:49.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:50.091 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:40:50.238 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:50.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:40:50.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:50.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:50.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:50.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:50.764 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:51.037 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:40:51.286 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:51.509 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:40:51.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:51.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:40:52.454 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:40:52.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:52.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:52.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:52.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:52.926 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:40:53.300 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:40:53.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:53.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:53.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:53.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:53.834 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:53.868 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:40:54.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:40:54.351 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:54.814 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:40:54.873 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:55.286 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:40:55.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:40:56.231 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:40:56.703 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:40:56.879 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:40:57.175 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:40:57.649 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:40:58.121 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:40:58.593 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:40:58.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:40:58.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:40:58.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:40:58.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:40:58.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:40:58.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:40:58.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:40:58.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:40:58.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:40:58.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:40:58.932 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:40:58.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:40:58.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:03.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:03.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:03.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:03.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:03.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:03.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:03.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:03.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:03.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:03.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:03.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:03.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:03.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:03.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:03.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:03.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:03.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:03.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:03.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:03.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:03.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:03.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:03.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:03.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:03.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:03.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:03.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:03.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:03.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:03.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:03.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:03.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:03.960 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:03.961 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:03.961 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:03.961 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:03.966 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:41:04.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:41:04.491 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:41:04.494 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:41:04.496 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:41:04.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:04.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:04.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:04.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:04.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:04.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:04.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:04.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:04.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:04.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:04.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:04.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:04.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:04.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:04.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:04.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:04.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:04.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:04.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:04.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:04.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:04.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:04.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:04.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:04.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:04.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:04.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:04.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:04.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:04.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:04.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:04.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:04.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:04.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:04.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:04.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:04.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:41:04.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:04.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:04.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:04.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:04.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:05.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.387 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:41:05.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:05.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:05.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:41:05.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:05.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:05.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:05.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:05.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:05.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:05.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:05.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:05.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:05.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:05.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:05.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:05.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:05.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:05.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:06.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:06.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:06.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:06.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.323 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:41:06.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:06.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:06.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:06.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:06.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:06.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:06.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:06.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:06.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.795 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:41:06.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:06.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:06.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:06.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:06.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:06.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:06.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:06.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:06.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:06.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:06.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:06.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:06.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:06.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:06.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:07.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:07.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:07.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:07.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:07.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:07.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:07.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:07.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:07.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:07.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:07.266 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:41:07.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:07.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:07.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:07.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:07.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:07.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:07.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:07.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:07.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:07.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:07.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:07.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:07.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:07.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:07.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:07.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:07.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:07.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:07.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:07.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:07.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:07.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:07.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:07.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:07.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:07.706 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:07.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:12.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:12.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:12.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:12.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:12.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:12.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:12.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:12.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:12.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:12.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:12.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:12.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:12.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:12.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:12.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:12.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:12.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:12.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:12.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:12.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:12.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:12.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:12.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:12.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:12.728 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:12.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:12.728 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:12.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:12.728 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:12.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:12.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:12.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:12.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:12.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:12.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:12.734 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:12.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:12.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:41:13.218 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:41:13.266 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:41:13.268 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:41:13.270 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:41:13.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:13.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:13.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:13.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:13.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:13.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:13.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:13.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:13.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:13.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 01:41:13.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:13.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:13.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:13.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:13.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:41:13.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:13.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:14.164 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:41:14.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:41:14.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:14.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:14.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:14.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:41:15.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:15.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:15.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:15.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:15.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:15.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:15.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:15.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:15.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:15.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:15.385 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:41:15.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:15.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:15.385 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:41:20.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:20.392 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:20.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:20.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:20.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:20.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:20.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:20.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:20.395 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:20.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:20.395 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:20.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:20.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:20.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:20.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:20.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:20.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:20.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:20.397 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:20.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:20.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:20.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:20.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:20.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:20.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:20.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:20.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:20.401 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:20.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:20.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:20.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:20.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:20.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:20.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:20.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:20.403 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:41:25.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:25.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:25.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:25.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:25.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:25.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:25.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:25.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:25.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:25.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:25.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:25.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:25.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:25.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:25.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:25.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:25.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:25.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:25.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:25.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:25.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:25.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:25.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:25.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:25.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:25.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:25.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:25.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:25.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:25.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:25.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:25.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:25.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:25.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:25.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:25.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:25.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:25.430 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:25.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:25.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:25.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:25.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:25.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:25.431 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:25.431 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:25.431 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:25.436 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:41:25.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:41:25.962 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:41:25.964 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:41:25.966 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:41:25.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:26.386 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:41:26.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:26.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:26.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:26.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:26.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:41:27.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:41:27.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:27.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:27.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:27.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:27.809 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:41:28.281 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:41:28.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:28.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:28.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:28.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:28.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:41:29.230 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:41:29.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:29.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:29.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:29.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:29.701 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:41:30.177 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:41:30.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:30.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:30.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:30.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:30.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:41:31.124 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:41:31.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:31.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:31.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:31.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:31.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:31.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:31.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:31.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:31.450 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:41:31.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:31.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:36.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:36.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:36.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:36.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:36.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:36.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:36.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:36.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:36.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:36.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:36.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:36.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:36.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:36.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:36.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:36.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:36.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:36.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:36.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:36.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:36.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:36.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:36.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:36.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:36.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:36.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:36.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:36.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:36.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:36.489 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:36.489 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:36.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:36.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:36.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:36.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:36.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:36.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:36.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:36.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:36.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:36.499 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:36.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:36.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:41:36.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:41:37.032 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:41:37.034 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:41:37.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:37.036 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:41:37.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:41:37.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:37.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:37.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:37.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:37.928 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:41:38.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:41:38.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:38.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:38.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:38.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:38.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:41:39.346 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:41:39.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:39.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:39.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:39.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:39.818 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:41:40.292 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:41:40.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:40.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:40.764 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:41:41.236 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:41:41.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:41.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:41.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:41.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:41.712 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:41:42.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:42.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:42.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:42.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:42.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:42.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:42.047 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:41:42.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:42.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:47.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:47.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:47.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:47.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:47.060 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:47.060 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:47.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:47.061 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:47.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:47.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:47.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:47.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:47.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:47.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:47.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:47.066 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:47.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:47.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:47.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:47.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:47.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:47.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:47.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:47.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:47.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:47.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:47.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:47.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:47.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:47.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:47.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:47.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:47.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:47.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:47.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:47.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:47.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:47.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:47.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:47.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:47.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:47.081 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:47.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:47.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:47.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:47.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:47.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:47.083 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:47.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:41:52.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:41:52.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:52.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:52.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:52.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:52.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:41:52.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:52.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:52.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:41:52.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:41:52.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:41:52.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:41:52.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:52.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:52.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:41:52.104 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:41:52.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:41:52.104 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:41:52.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:52.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:41:52.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:41:52.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:52.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:52.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:41:52.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:41:52.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:41:52.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:41:52.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:52.113 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:41:52.113 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:41:52.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:52.113 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:41:52.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:41:52.114 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:41:52.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:41:52.114 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:41:52.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:52.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:41:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:41:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:41:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:41:52.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:41:52.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:41:52.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:41:52.120 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:41:52.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:41:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:41:52.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:41:52.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:41:52.649 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:41:52.652 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:41:52.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:41:52.655 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:41:52.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:41:52.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:41:52.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:41:53.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:41:53.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:53.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:53.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:53.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:41:53.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:41:53.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:41:53.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:41:53.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:41:53.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:41:54.023 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:41:54.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:54.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:54.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:54.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:54.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:41:54.967 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:41:55.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:55.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:55.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:55.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:55.440 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:41:55.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:41:56.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:56.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:56.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:56.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:56.382 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:41:56.853 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:41:57.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:41:57.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:41:57.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:41:57.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:41:57.324 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:41:57.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:41:58.265 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:41:58.736 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:41:59.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:41:59.677 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:42:00.149 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:42:00.619 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:42:01.090 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:42:01.561 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:42:02.032 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:42:02.504 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:42:02.977 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:42:03.449 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:42:03.920 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:42:04.393 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:42:04.866 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:42:05.338 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:42:05.809 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:42:06.282 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:42:06.755 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:42:07.226 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:42:07.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:07.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:07.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:07.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:07.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:07.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:07.427 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:42:07.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:07.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:12.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:12.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:12.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:12.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:12.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:42:12.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:12.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:42:12.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:42:12.446 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:42:12.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:42:12.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:42:12.447 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:12.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:12.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:42:12.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:42:12.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:42:12.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:12.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:42:12.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:42:12.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:42:12.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:12.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:12.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:42:12.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:42:12.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:42:12.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:12.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:42:12.456 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:42:12.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:42:12.457 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:12.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:12.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:42:12.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:42:12.457 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:42:12.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:12.462 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:42:12.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:42:12.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:42:12.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:42:12.462 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.463 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:42:12.463 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:42:12.463 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:42:12.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:12.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:12.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:42:12.945 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:42:12.994 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:12.997 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:12.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:12.998 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:42:13.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:13.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:13.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:42:13.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:13.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:13.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:13.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:42:13.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:42:13.037 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:13.041 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:13.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:13.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:13.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:13.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:13.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:13.417 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:42:13.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:13.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:13.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:13.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:13.888 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:42:14.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:42:14.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:14.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:14.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:14.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:14.834 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:42:15.307 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:42:15.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:15.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:15.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:15.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:15.780 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:42:16.253 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:42:16.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:16.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:16.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:16.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:16.725 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:42:17.199 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:42:17.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:17.671 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:42:18.144 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:42:18.617 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:42:19.090 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:42:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:42:20.033 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:42:20.506 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:42:20.979 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:42:21.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:21.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:21.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:21.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:21.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:21.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:21.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:21.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:21.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:21.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:21.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:21.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:21.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:21.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:21.076 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.077 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.078 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.078 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.078 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.078 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.078 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:21.078 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:26.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:26.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:26.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:26.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:26.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:26.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:26.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:26.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:42:26.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:26.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:42:26.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:42:26.109 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:42:26.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:42:26.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:42:26.110 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:26.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:26.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:42:26.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:42:26.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:42:26.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:26.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:42:26.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:42:26.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:42:26.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:26.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:26.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:42:26.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:42:26.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:42:26.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:26.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:42:26.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:42:26.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:42:26.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:26.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:26.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:42:26.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:42:26.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:42:26.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:26.131 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:42:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:42:26.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:42:26.134 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:42:26.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:42:26.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:26.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:26.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:42:26.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:42:26.667 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:26.669 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:26.671 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:42:26.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:26.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:26.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:26.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:42:26.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:26.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:26.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:26.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:42:26.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:42:26.710 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:26.713 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:26.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:26.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:26.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:26.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:26.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:27.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:42:27.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:27.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:27.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:27.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:27.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:42:28.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:42:28.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:28.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:28.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:28.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:42:28.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:42:29.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:29.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:29.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:29.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:42:29.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:42:30.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:30.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:30.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:30.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:30.396 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:42:30.869 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:42:31.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:31.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:31.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:31.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:42:31.815 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:42:32.287 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:42:32.758 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:42:33.232 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:42:33.704 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:42:34.176 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:42:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:42:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:34.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:34.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:34.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:34.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:34.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:34.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:34.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:34.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:34.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:34.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:34.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:34.739 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:42:34.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:34.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:34.739 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:34.739 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:34.740 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:34.740 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:34.740 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:34.740 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:34.740 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:39.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:39.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:39.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:39.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:39.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:39.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:39.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:39.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:42:39.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:39.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:42:39.754 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:42:39.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:42:39.757 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:42:39.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:42:39.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:39.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:39.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:42:39.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:42:39.759 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:42:39.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:39.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:42:39.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:42:39.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:42:39.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:39.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:42:39.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:39.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:42:39.761 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:42:39.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:42:39.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:42:39.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:42:39.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:42:39.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:42:39.768 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:42:39.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:42:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:42:39.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:42:39.772 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:42:40.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:42:40.288 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:40.290 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:40.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:40.292 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:42:40.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:40.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:40.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:42:40.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:40.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:40.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:40.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:42:40.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:42:40.342 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:40.344 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:40.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:40.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:40.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:40.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:40.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:40.721 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:42:40.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:40.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:40.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:40.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:41.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:42:41.666 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:42:41.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:41.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:41.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:41.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:42.137 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:42:42.610 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:42:42.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:42.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:42.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:42.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:43.083 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:42:43.555 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:42:43.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:43.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:43.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:43.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:44.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:42:44.501 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:42:44.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:44.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:44.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:44.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:44.973 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:42:45.446 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:42:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:42:46.392 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:42:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:42:47.338 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:42:47.810 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:42:48.281 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:42:48.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:48.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:48.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:48.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:48.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:48.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:48.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:42:48.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:48.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:48.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:48.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:42:48.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:42:48.417 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:42:48.419 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:42:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:48.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:42:48.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:42:48.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:48.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:48.752 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:42:49.223 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:42:49.696 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:42:50.168 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:42:50.640 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:42:51.111 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:42:51.582 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:42:52.053 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:42:52.527 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:42:52.999 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:42:53.472 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:42:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:42:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:42:54.885 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:42:55.355 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:42:55.829 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:42:56.301 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:42:56.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:42:56.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:42:56.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:42:56.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:42:56.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:42:56.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:42:56.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:42:56.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:42:56.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:42:56.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:42:56.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:42:56.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:42:56.444 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:42:56.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:42:56.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:42:56.444 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:01.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:43:01.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:43:01.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:01.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:01.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:01.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:01.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:01.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:43:01.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:01.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:43:01.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:43:01.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:43:01.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:43:01.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:43:01.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:01.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:01.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:43:01.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:43:01.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:43:01.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:01.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:43:01.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:43:01.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:43:01.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:01.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:01.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:43:01.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:43:01.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:43:01.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:43:01.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:43:01.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:43:01.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:43:01.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:43:01.471 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:43:01.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:43:01.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:01.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:43:01.954 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:43:01.998 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:02.000 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:02.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:02.001 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:43:02.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:02.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:02.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:02.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:02.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:02.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:02.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:02.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:02.046 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:02.050 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:02.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:02.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:02.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:02.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:02.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:02.426 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:43:02.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:02.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:02.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:02.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:02.897 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:43:03.370 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:43:03.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:03.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:03.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:03.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:03.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:43:04.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:43:04.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:04.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:04.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:04.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:04.786 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:43:05.257 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:43:05.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:05.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:05.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:05.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:05.728 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:43:06.201 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:43:06.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:06.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:06.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:06.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:06.674 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:43:07.146 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:43:07.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:43:08.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:43:08.564 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:43:09.035 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:43:09.506 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:43:09.976 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:43:10.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:10.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:10.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:10.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:10.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:10.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:10.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:10.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:10.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:10.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:10.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:10.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:10.113 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:10.118 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:10.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:10.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:10.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:10.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:10.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:10.450 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:43:10.922 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:43:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:43:11.865 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:43:12.336 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:43:12.809 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:43:13.282 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:43:13.754 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:43:14.225 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:43:14.696 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:43:15.169 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:43:15.642 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:43:16.114 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:43:16.588 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:43:17.060 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:43:17.532 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:43:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:43:18.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:18.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:18.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:18.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:18.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:18.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:18.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:18.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:18.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:18.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:18.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:43:18.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:43:18.146 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:43:18.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:18.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:18.146 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:43:23.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:43:23.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:43:23.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:23.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:23.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:23.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:23.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:23.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:43:23.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:23.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:43:23.160 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:43:23.162 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:43:23.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:43:23.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:43:23.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:23.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:23.164 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:43:23.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:43:23.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:43:23.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:23.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:43:23.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:43:23.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:43:23.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:23.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:23.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:43:23.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:43:23.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:43:23.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:23.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:43:23.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:43:23.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:43:23.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:23.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:23.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:43:23.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:43:23.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:43:23.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:43:23.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:43:23.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:43:23.177 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:43:23.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:23.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:23.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:43:23.661 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:43:23.712 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:23.714 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:23.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:23.716 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:43:23.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:23.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:23.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:23.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:23.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:23.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:23.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:23.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:23.800 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:23.804 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:23.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:23.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:23.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:23.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:24.133 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:43:24.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:24.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:24.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:24.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:24.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:24.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:24.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:24.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:24.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:24.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:24.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:24.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:24.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:43:24.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:43:24.330 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:43:24.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:24.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:29.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:43:29.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:43:29.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:29.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:29.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:29.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:29.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:43:29.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:43:29.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:29.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:43:29.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:43:29.344 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:43:29.344 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:43:29.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:43:29.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:29.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:43:29.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:43:29.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:43:29.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:43:29.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:29.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:43:29.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:43:29.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:43:29.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:43:29.346 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:43:29.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:43:29.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:43:29.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:43:29.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:43:29.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:43:29.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:43:29.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:29.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:43:29.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:43:29.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:43:29.349 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:43:29.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:43:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:29.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:43:29.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:43:29.875 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:29.877 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:29.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:29.879 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:43:29.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:29.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:29.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:29.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:29.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:29.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:29.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:29.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:29.925 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:29.929 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:29.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:29.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:29.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:29.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:29.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:30.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:43:30.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:30.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:43:31.251 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:43:31.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:31.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:31.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:31.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:31.724 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:43:32.197 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:43:32.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:32.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:32.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:32.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:32.670 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:43:33.142 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:43:33.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:33.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:33.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:33.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:33.613 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:43:34.085 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:43:34.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:43:34.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:43:34.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:43:34.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:43:34.557 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:43:35.030 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:43:35.502 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:43:35.976 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:43:36.448 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:43:36.921 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:43:37.392 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:43:37.865 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:43:37.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:37.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:37.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:37.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:37.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:37.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:37.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:37.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:37.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:37.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:37.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:37.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:38.000 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:38.005 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:38.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:38.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:38.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:38.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:38.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:38.338 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:43:38.810 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:43:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:43:39.752 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:43:40.225 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:43:40.698 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:43:41.170 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:43:41.641 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:43:42.114 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:43:42.587 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:43:43.059 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:43:43.530 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:43:44.003 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:43:44.476 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:43:44.948 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:43:45.422 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:43:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:43:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:46.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:46.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:46.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:46.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:46.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:46.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:46.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:46.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:46.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:46.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:46.079 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:46.083 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:46.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:46.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:46.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:46.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:46.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:46.367 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:43:46.838 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:43:47.311 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:43:47.784 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:43:48.256 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:43:48.729 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:43:49.202 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:43:49.675 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:43:50.148 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:43:50.621 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:43:51.093 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:43:51.566 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:43:52.039 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:43:52.512 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:43:52.985 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:43:53.458 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:43:53.930 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:43:54.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:54.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:54.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:54.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:54.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:43:54.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:43:54.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:43:54.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:54.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:54.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:54.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:43:54.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:43:54.163 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:43:54.167 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:43:54.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:43:54.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:43:54.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:43:54.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:43:54.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:54.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:43:54.401 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:43:54.874 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:43:55.346 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:43:55.819 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:43:56.290 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:43:56.760 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:43:57.234 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:43:57.707 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:43:58.179 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:43:58.652 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:43:59.125 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:43:59.597 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:44:00.070 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:44:00.543 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:44:01.015 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:44:01.489 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:44:01.961 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:44:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:02.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:02.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:02.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:02.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:02.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:02.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:02.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:02.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:44:02.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:44:02.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:44:02.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:44:02.202 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:44:02.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:44:02.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:44:02.203 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:02.203 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:02.203 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:02.203 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:02.203 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:02.204 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:02.204 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7092 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:07.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:44:07.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:44:07.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:44:07.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:44:07.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:44:07.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:44:07.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:44:07.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:44:07.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:07.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:44:07.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:44:07.219 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:44:07.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:44:07.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:44:07.220 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:07.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:44:07.221 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:44:07.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:44:07.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:44:07.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:07.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:44:07.224 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:44:07.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:44:07.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:07.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:44:07.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:44:07.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:44:07.225 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:44:07.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:07.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:44:07.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:44:07.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:44:07.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:07.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:44:07.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:44:07.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:44:07.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:44:07.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:07.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:44:07.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:44:07.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:44:07.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:44:07.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:44:07.232 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:44:07.232 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:44:07.232 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:07.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:07.237 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:44:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:44:07.756 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:07.758 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:07.760 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:44:07.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:07.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:07.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:44:07.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:07.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:07.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:07.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:44:07.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:44:07.807 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:07.811 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:07.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:07.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:07.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:07.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:07.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:08.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:44:08.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:08.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:08.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:08.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:08.659 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:44:09.129 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:44:09.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:09.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:09.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:09.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:09.603 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:44:10.076 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:44:10.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:10.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:10.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:10.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:10.548 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:44:11.021 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:44:11.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:11.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:11.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:11.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:11.494 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:44:11.966 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:44:12.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:12.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:12.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:12.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:12.437 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:44:12.908 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:44:13.381 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:44:13.853 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:44:14.326 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:44:14.796 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:44:15.267 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:44:15.741 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:44:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:15.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:15.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:15.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:15.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:15.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:15.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:44:15.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:15.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:15.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:15.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:44:15.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:44:15.874 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:15.878 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:15.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:15.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:15.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:15.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:16.213 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:44:16.685 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:44:17.159 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:44:17.631 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:44:18.103 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:44:18.575 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:44:19.048 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:44:19.520 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:44:19.992 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:44:20.464 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:44:20.937 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:44:21.409 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:44:21.882 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:44:22.355 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:44:22.828 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:44:23.300 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:44:23.774 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:44:23.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:23.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:23.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:23.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:23.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:23.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:23.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:23.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:23.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:44:23.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:44:23.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:44:23.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:44:23.908 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:44:23.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:44:23.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:23.908 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:44:28.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:44:28.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:44:28.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:44:28.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:44:28.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:44:28.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:44:28.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:44:28.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:44:28.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:28.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:44:28.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:44:28.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:44:28.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:44:28.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:44:28.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:28.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:44:28.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:44:28.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:44:28.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:44:28.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:44:28.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:44:28.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:44:28.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:44:28.918 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:44:28.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:44:28.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:44:28.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:44:28.920 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:44:28.920 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:44:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:44:28.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:44:29.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:44:29.447 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:29.450 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:29.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:29.452 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:44:29.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:29.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:29.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:44:29.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:29.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:29.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:29.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:44:29.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:44:29.495 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:29.499 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:29.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:29.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:29.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:29.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:29.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:29.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:44:29.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:29.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:29.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:29.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:30.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:44:30.817 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:44:30.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:30.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:30.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:30.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:31.291 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:44:31.763 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:44:31.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:31.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:31.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:31.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:32.235 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:44:32.706 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:44:32.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:32.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:32.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:32.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:33.180 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:44:33.652 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:44:33.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:44:33.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:44:33.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:44:33.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:44:34.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:44:34.595 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:44:35.068 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:44:35.541 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:44:36.013 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:44:36.486 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:44:36.959 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:44:37.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:44:37.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:37.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:37.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:37.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:37.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:37.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:37.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:44:37.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:37.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:37.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:37.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:44:37.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:44:37.568 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:37.573 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:37.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:37.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:37.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:37.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:37.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:37.902 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:44:38.373 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:44:38.844 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:44:39.317 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:44:39.789 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:44:40.261 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:44:40.732 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:44:41.206 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:44:41.678 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:44:42.151 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:44:42.624 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:44:43.096 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:44:43.568 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:44:44.039 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:44:44.513 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:44:44.986 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:44:45.458 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:44:45.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:45.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:45.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:45.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:45.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:45.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:45.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:44:45.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:45.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:45.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:45.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:44:45.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:44:45.641 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:45.644 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:45.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:45.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:45.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:45.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:45.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:45.931 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:44:46.404 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:44:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:44:47.347 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:44:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:44:48.288 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:44:48.762 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:44:49.234 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:44:49.706 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:44:50.177 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:44:50.650 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:44:51.123 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:44:51.595 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:44:52.066 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:44:52.539 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:44:53.011 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:44:53.483 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:44:53.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:53.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:53.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:53.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:53.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:44:53.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:44:53.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:44:53.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:53.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:53.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:53.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:44:53.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:44:53.717 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:44:53.721 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:44:53.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:44:53.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:44:53.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:44:53.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:53.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:44:53.954 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:44:54.425 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:44:54.899 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:44:55.370 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:44:55.843 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:44:56.316 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:44:56.788 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:44:57.260 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:44:57.732 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:44:58.205 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:44:58.677 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:44:59.150 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:44:59.621 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:45:00.094 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:45:00.566 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:45:01.038 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:45:01.509 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:45:01.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:01.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:01.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:01.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:01.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:01.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:01.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:01.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:01.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:45:01.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:45:01.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:45:01.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:45:01.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:45:01.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:45:01.753 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:45:01.753 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:01.753 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:01.753 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:01.753 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:01.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:01.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:01.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7093 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:06.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:45:06.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:45:06.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:45:06.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:45:06.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:45:06.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:45:06.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:45:06.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:45:06.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:45:06.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:45:06.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:45:06.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:45:06.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:45:06.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:45:06.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:45:06.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:45:06.776 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:45:06.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:45:06.776 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:45:06.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:06.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:45:06.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:45:06.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:45:06.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:45:06.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:45:06.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:45:06.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:45:06.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:45:06.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:06.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:45:06.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:45:06.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:45:06.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:45:06.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:45:06.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:45:06.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:45:06.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:45:06.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:45:06.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:45:06.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:45:06.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:45:06.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:45:06.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:45:07.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:45:07.315 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:07.316 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:07.317 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:45:07.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:07.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:07.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:07.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:07.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:07.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:07.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:07.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:07.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:07.365 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:07.369 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:07.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:07.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:07.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:07.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:07.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:45:07.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:07.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:07.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:07.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:08.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:45:08.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:45:08.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:08.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:08.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:08.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:09.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:45:09.633 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:45:09.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:09.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:09.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:09.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:10.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:45:10.576 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:45:10.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:10.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:10.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:10.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:11.049 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:45:11.522 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:45:11.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:45:11.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:45:11.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:45:11.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:45:11.994 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:45:12.464 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:45:12.936 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:45:13.409 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:45:13.881 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:45:14.353 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:45:14.827 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:45:15.299 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:45:15.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:15.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:15.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:15.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:15.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:15.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:15.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:15.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:15.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:15.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:15.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:15.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:15.437 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:15.441 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:15.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:15.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:15.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:15.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:15.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:15.771 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:45:16.242 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:45:16.716 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:45:17.188 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:45:17.660 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:45:18.131 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:45:18.601 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:45:19.072 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:45:19.545 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:45:20.018 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:45:20.490 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:45:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:45:21.435 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:45:21.907 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:45:22.377 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:45:22.849 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:45:23.321 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:45:23.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:23.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:23.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:23.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:23.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:23.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:23.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:23.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:23.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:23.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:23.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:23.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:23.504 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:23.507 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:23.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:23.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:23.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:23.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:23.792 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:45:24.263 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:45:24.736 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:45:25.209 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:45:25.681 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:45:26.152 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:45:26.625 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:45:27.097 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:45:27.569 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:45:28.040 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:45:28.514 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:45:28.986 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:45:29.458 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:45:29.929 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:45:30.402 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:45:30.874 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:45:31.346 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:45:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:31.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:31.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:31.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:31.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:31.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:31.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:31.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:31.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:31.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:31.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:31.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:31.580 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:31.582 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:31.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:31.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:31.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:31.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:31.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:31.817 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:45:32.291 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:45:32.763 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:45:33.235 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:45:33.706 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:45:34.179 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:45:34.651 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:45:35.123 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:45:35.594 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:45:36.067 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:45:36.539 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:45:37.011 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:45:37.482 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:45:37.956 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:45:38.428 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:45:38.900 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:45:39.371 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:45:39.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:39.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:39.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:39.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:39.593 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=7088 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:45:39.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:39.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:39.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:39.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:39.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:39.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:39.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:39.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:39.651 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:39.655 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:39.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:39.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:39.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:39.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:39.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:39.844 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:45:40.317 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:45:40.789 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:45:41.260 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 01:45:41.734 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 01:45:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 01:45:42.678 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 01:45:43.149 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 01:45:43.623 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 01:45:44.095 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 01:45:44.567 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 01:45:45.038 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 01:45:45.509 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 01:45:45.982 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 01:45:46.454 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 01:45:46.926 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 01:45:47.397 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 01:45:47.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:47.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:47.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:47.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:47.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:47.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:47.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:47.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:47.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:47.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:47.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:47.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:47.723 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:47.727 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:47.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:47.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:47.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:47.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:47.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:47.870 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 01:45:48.343 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 01:45:48.815 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 01:45:49.286 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 01:45:49.759 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 01:45:50.232 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 01:45:50.704 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 01:45:51.175 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 01:45:51.648 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 01:45:52.121 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 01:45:52.592 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 01:45:53.064 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 01:45:53.537 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 01:45:54.009 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 01:45:54.482 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 01:45:54.955 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 01:45:55.427 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 01:45:55.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:55.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:55.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:55.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:55.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:45:55.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:45:55.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:45:55.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:55.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:55.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:55.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:45:55.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:45:55.801 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:45:55.805 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:45:55.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:45:55.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:45:55.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:45:55.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:55.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:45:55.899 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 01:45:56.370 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 01:45:56.841 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 01:45:57.315 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 01:45:57.787 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 01:45:58.259 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 01:45:58.730 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 01:45:59.201 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 01:45:59.672 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 01:46:00.142 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 01:46:00.616 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 01:46:01.088 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 01:46:01.560 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 01:46:02.031 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 01:46:02.504 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 01:46:02.977 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 01:46:03.449 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 01:46:03.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:03.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:03.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:03.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:03.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:03.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:03.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:46:03.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:03.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:03.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:03.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:46:03.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:46:03.866 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:46:03.869 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:46:03.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:03.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:03.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:03.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:03.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:03.920 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 01:46:04.391 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 01:46:04.864 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 01:46:05.336 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 01:46:05.808 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 01:46:06.279 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 01:46:06.752 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 01:46:07.225 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 01:46:07.697 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 01:46:08.168 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 01:46:08.641 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 01:46:09.113 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 01:46:09.585 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 01:46:10.056 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 01:46:10.530 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 01:46:11.002 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 01:46:11.474 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 01:46:11.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:11.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:11.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:11.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:11.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:11.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:11.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:11.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:11.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:11.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:11.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:11.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:11.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:46:11.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:46:11.904 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:11.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=14069 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:16.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:46:16.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:46:16.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:16.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:16.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:16.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:16.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:16.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:46:16.913 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:16.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:46:16.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:46:16.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:46:16.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:46:16.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:46:16.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:16.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:16.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:46:16.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:46:16.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:46:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:46:16.918 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:46:16.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:46:16.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:46:16.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:46:16.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:46:16.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:16.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:46:16.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:46:16.926 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:46:16.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:16.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:46:17.408 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:46:17.455 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:46:17.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:17.458 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:46:17.461 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:46:17.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:17.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:17.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:46:17.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:17.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:17.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:17.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:46:17.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:46:17.501 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:46:17.504 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:46:17.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:17.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:17.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:17.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:17.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:17.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:46:17.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:17.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:17.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:17.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:18.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:46:18.825 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:46:18.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:18.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:18.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:18.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:19.298 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:46:19.770 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:46:19.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:19.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:19.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:19.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:20.241 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:46:20.712 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:46:20.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:20.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:20.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:20.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:21.186 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:46:21.658 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:46:21.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:21.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:21.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:21.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:22.130 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:46:22.601 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:46:23.074 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:46:23.547 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:46:24.019 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:46:24.490 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:46:24.964 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:46:25.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:46:25.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:25.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:25.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:25.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:25.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:25.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:25.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:46:25.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:25.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:25.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:25.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:46:25.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:46:25.574 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:46:25.577 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:46:25.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:25.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:25.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:25.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:25.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:25.908 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:46:26.379 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:46:26.852 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:46:27.325 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:46:27.797 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:46:28.268 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:46:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:46:29.210 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:46:29.680 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:46:30.153 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:46:30.626 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:46:31.099 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:46:31.569 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:46:32.043 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:46:32.515 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:46:32.987 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:46:33.458 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:46:33.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:33.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:33.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:33.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:33.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:33.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:33.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:33.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:33.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:33.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:33.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:46:33.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:46:33.613 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:46:33.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:33.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:33.614 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:38.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:46:38.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:46:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:38.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:38.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:38.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:46:38.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:38.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:46:38.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:46:38.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:46:38.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:46:38.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:46:38.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:38.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:38.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:46:38.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:46:38.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:46:38.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:46:38.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:46:38.622 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:46:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:46:38.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:46:38.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:46:38.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:46:38.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:46:38.625 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:46:38.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:38.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:46:39.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:46:39.144 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:46:39.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:39.147 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:46:39.149 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:46:39.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:39.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:39.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:46:39.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:39.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:39.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:39.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:46:39.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:39.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:39.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:39.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:39.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:39.581 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:46:39.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:39.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:39.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:39.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:40.052 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:46:40.525 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:46:40.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:40.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:40.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:40.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:40.998 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:46:41.470 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:46:41.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:41.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:41.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:41.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:41.943 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:46:42.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:46:42.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:42.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:42.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:42.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:42.889 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:46:43.362 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:46:43.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:43.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:43.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:43.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:43.835 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:46:44.306 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:46:44.777 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:46:45.247 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:46:45.721 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:46:46.194 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:46:46.666 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:46:47.140 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:46:47.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:47.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:47.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:47.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:47.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:47.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:47.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:47.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:47.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:47.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:47.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:47.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:47.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:46:47.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:46:47.242 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:47.243 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:46:52.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:46:52.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:46:52.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:52.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:52.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:52.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:52.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:46:52.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:46:52.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:52.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:46:52.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:46:52.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:46:52.258 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:46:52.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:46:52.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:52.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:46:52.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:46:52.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:46:52.259 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:46:52.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:52.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:46:52.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:46:52.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:46:52.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:52.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:46:52.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:46:52.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:46:52.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:46:52.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:46:52.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:46:52.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:46:52.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:46:52.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:46:52.266 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:46:52.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:46:52.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:46:52.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:46:52.790 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:46:52.793 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:46:52.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:52.794 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:46:52.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:46:52.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:46:52.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:46:52.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:52.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:52.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:52.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:46:52.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:46:52.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:46:52.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:46:52.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:46:52.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:52.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:46:53.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:46:53.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:53.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:53.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:53.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:53.692 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:46:54.163 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:46:54.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:54.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:54.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:54.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:54.634 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:46:55.105 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:46:55.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:55.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:55.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:55.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:55.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:46:56.048 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:46:56.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:56.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:56.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:56.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:56.522 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:46:56.994 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:46:57.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:46:57.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:46:57.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:46:57.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:46:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:46:57.938 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:46:58.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:46:58.883 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:46:59.357 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:46:59.829 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:47:00.302 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:47:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:47:00.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:47:00.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:47:00.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:00.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:00.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:00.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:00.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:00.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:00.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:00.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:00.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:00.883 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:00.884 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:05.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:05.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:05.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:05.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:05.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:05.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:05.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:05.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:05.899 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:05.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:05.899 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:47:05.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:47:05.903 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:47:05.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:05.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:05.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:47:05.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:05.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:05.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:47:05.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:05.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:05.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:47:05.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:05.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:05.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:47:05.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:47:05.912 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:47:05.912 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:47:05.912 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:05.917 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:47:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:47:06.435 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:47:06.436 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:47:06.437 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:47:06.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:47:06.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:06.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:06.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:47:06.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:47:06.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:47:06.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:47:06.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:47:06.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:47:06.867 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:47:06.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:06.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:07.339 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:47:07.812 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:47:07.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:07.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:07.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:07.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:08.284 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:47:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:47:08.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:08.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:08.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:08.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:09.227 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:47:09.700 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:47:09.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:09.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:09.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:09.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:10.172 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:47:10.644 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:47:10.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:10.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:10.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:10.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:11.115 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:47:11.588 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:47:12.061 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:47:12.533 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:47:13.007 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:47:13.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:13.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:13.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:13.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:13.137 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:47:13.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:13.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:18.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:18.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:18.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:18.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:18.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:18.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:18.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:18.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:18.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:18.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:18.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:18.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:18.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:47:18.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:18.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:18.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:47:18.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:18.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:47:18.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:47:18.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:18.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:18.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:18.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:47:18.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:18.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:47:18.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:47:18.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:47:18.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:47:18.154 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:47:18.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:18.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:18.158 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:47:18.637 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:47:18.674 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:47:18.676 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:47:18.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:47:18.677 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:47:18.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:18.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:18.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:47:18.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:47:18.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:47:18.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:47:18.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:47:18.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:47:19.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:47:19.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:19.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:19.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:19.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:19.580 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:47:20.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:47:20.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:20.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:20.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:20.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:47:20.998 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:47:21.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:21.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:21.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:21.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:21.469 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:47:21.943 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:47:22.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:22.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:22.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:22.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:22.414 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:47:22.886 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:47:23.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:23.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:23.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:23.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:23.357 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:47:23.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:23.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:23.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:23.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:23.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:23.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:23.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:23.381 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:23.381 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:23.381 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:23.381 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:23.381 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:23.381 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:23.836 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:47:24.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:47:24.796 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:47:25.276 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:47:25.757 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:47:26.236 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:47:26.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:47:27.197 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:47:27.677 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:47:28.157 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:47:28.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:28.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:28.385 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:47:28.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:28.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:28.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:28.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:28.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:28.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:28.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:28.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:28.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:28.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:28.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:47:28.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:47:28.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:47:28.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:28.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:28.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:47:28.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:28.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:28.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:47:28.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:28.399 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:47:28.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:47:28.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:28.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:28.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:28.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:47:28.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:28.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:47:28.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:28.401 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:28.401 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:47:28.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:47:28.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:47:28.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:47:28.404 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:47:28.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:28.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:28.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:28.404 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:47:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:28.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:33.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:33.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:33.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:33.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:33.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:33.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:33.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:33.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:33.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:33.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:47:33.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:47:33.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:47:33.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:33.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:33.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:33.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:47:33.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:33.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:47:33.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:33.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:47:33.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:47:33.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:33.428 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:33.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:33.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:47:33.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:33.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:47:33.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:33.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:47:33.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:47:33.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:33.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:33.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:33.432 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:47:33.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:33.432 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:47:33.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:47:33.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:47:33.436 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:47:33.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:33.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:47:33.919 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:47:33.956 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:47:33.957 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:47:33.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:47:33.958 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:47:33.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:33.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:33.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:47:33.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:47:33.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:47:33.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:47:33.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:47:33.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:47:34.391 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:47:34.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:34.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:34.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:34.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:34.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:47:35.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:47:35.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:47:36.277 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:47:36.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:36.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:36.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:36.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:36.750 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:47:37.222 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:47:37.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:37.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:37.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:37.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:47:38.163 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:47:38.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:38.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:38.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:38.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:47:39.109 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:47:39.581 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:47:39.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:40.052 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:47:40.526 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:47:40.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:40.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:47:41.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:47:41.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:41.941 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:47:42.412 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:47:42.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:42.885 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:47:43.358 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:47:43.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:43.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:43.829 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:47:44.303 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:47:44.775 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:47:45.247 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:47:45.723 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:47:46.195 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:47:46.670 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:47:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:47:47.618 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:47:47.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:48.090 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:47:48.561 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:47:48.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:49.034 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:47:49.506 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:47:49.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:49.979 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:47:50.452 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:47:50.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:50.924 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:47:51.396 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:47:51.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:51.867 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:47:52.340 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:47:52.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:52.812 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:47:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:47:53.755 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:47:54.229 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:47:54.701 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:47:54.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:47:54.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:47:54.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:54.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:54.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:54.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:54.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:54.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:54.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:54.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:54.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:47:54.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:54.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:54.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4621 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:47:59.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:47:59.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:47:59.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:59.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:59.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:59.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:59.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:47:59.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:59.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:59.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:47:59.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:47:59.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:47:59.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:47:59.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:59.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:59.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:47:59.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:47:59.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:47:59.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:47:59.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:47:59.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:47:59.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:47:59.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:59.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:59.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:47:59.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:47:59.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:47:59.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:47:59.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:47:59.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:47:59.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:47:59.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:59.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:47:59.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:47:59.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:47:59.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:47:59.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:47:59.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:47:59.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:47:59.873 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:47:59.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:47:59.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:48:00.356 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:48:00.394 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:48:00.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:00.396 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:48:00.398 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:48:00.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:00.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:00.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:48:00.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:00.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:00.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:00.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:48:00.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:48:00.449 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:48:00.452 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:48:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 01:48:00.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:00.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:00.824 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:48:00.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:00.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:00.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:00.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:01.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 01:48:01.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:01.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:01.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:01.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:01.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:01.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:01.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:01.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:48:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:48:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:48:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:48:01.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:48:01.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:48:01.272 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:48:01.272 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:01.272 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:01.272 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:01.272 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:01.272 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:06.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:48:06.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:48:06.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:48:06.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:48:06.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:48:06.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:48:06.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:48:06.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:48:06.285 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:06.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:48:06.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:48:06.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:48:06.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:48:06.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:48:06.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:06.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:48:06.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:48:06.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:48:06.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:48:06.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:48:06.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:48:06.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:48:06.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:06.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:48:06.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:48:06.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:48:06.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:06.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:48:06.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:48:06.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:48:06.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:48:06.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:48:06.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:48:06.296 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:48:06.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:06.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:48:06.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:48:06.815 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:48:06.816 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:48:06.818 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:48:06.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:06.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:06.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:06.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:48:06.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:06.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:06.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:06.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:48:06.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:48:06.872 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:48:06.875 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:48:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 01:48:06.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:06.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:06.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:06.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:07.250 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:48:07.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:07.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:07.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:07.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:07.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 01:48:07.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:07.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:07.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:07.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:07.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:07.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:07.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:07.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:48:07.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:48:07.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:48:07.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:48:07.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:48:07.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:48:07.699 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:48:07.699 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:07.700 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:48:12.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:48:12.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:48:12.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:48:12.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:48:12.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:48:12.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:48:12.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:48:12.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:48:12.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:12.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:48:12.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:48:12.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:48:12.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:48:12.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:48:12.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:12.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:48:12.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:48:12.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:48:12.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:48:12.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:12.720 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:48:12.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:48:12.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:48:12.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:12.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:48:12.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:48:12.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:48:12.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:48:12.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:12.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:48:12.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:48:12.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:48:12.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:48:12.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:48:12.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:48:12.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:48:12.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:48:12.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:12.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:48:12.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:48:12.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:48:12.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:48:12.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:48:12.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:48:12.732 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:48:12.733 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:48:12.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:48:12.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:48:13.216 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:48:13.262 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:48:13.265 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:48:13.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:13.267 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:48:13.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:13.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:13.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:48:13.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:13.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:13.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:13.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:48:13.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:48:13.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:13.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:13.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:13.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:13.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:13.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:48:13.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:13.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:13.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:13.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:14.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:48:14.633 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:48:14.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:14.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:14.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:14.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:15.106 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:48:15.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:48:15.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:15.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:15.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:15.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:16.051 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:48:16.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:48:16.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:16.996 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:48:17.470 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:48:17.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:48:17.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:48:17.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:48:17.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:48:17.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:48:18.415 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:48:18.888 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:48:19.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:48:19.833 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:48:20.307 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:48:20.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:48:21.252 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:48:21.725 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:48:22.198 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:48:22.670 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:48:23.141 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:48:23.614 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:48:24.087 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:48:24.559 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:48:25.033 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:48:25.505 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:48:25.978 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:48:26.449 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:48:26.919 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:48:27.393 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:48:27.865 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:48:28.338 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:48:28.809 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:48:29.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:29.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:29.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:29.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:29.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:29.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:29.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:48:29.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:29.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:29.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:29.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:48:29.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:48:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:29.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:29.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:29.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:29.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:48:29.755 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:48:30.227 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:48:30.700 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:48:31.173 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:48:31.645 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:48:32.116 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:48:32.590 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:48:33.063 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:48:33.535 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:48:34.006 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:48:34.477 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:48:34.950 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:48:35.423 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:48:35.895 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:48:36.368 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:48:36.841 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:48:37.314 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:48:37.787 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:48:38.260 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:48:38.732 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:48:39.206 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:48:39.678 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:48:40.151 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:48:40.624 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:48:41.097 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:48:41.569 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:48:42.043 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:48:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:48:42.987 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:48:43.458 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:48:43.932 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:48:44.405 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:48:44.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:44.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:44.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:44.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:44.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:48:44.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:48:44.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:48:44.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:44.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:44.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:44.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:48:44.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:48:44.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:48:44.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:48:44.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:48:44.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:44.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:48:44.876 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:48:45.349 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:48:45.822 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:48:46.292 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:48:46.764 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:48:47.237 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 01:48:47.708 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 01:48:48.181 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 01:48:48.654 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 01:48:49.126 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 01:48:49.597 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 01:48:50.071 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 01:48:50.543 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 01:48:51.015 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 01:48:51.489 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 01:48:51.961 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 01:48:52.432 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 01:48:52.903 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 01:48:53.377 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 01:48:53.850 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 01:48:54.323 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 01:48:54.796 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 01:48:55.270 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 01:48:55.742 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 01:48:56.214 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 01:48:56.685 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 01:48:57.159 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 01:48:57.632 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 01:48:58.105 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 01:48:58.578 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 01:48:59.050 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 01:48:59.521 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 01:48:59.995 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 01:49:00.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:00.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:00.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:00.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:00.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:00.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:00.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:49:00.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:00.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:00.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:00.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:49:00.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:49:00.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:00.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:00.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:00.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:00.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:00.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:00.466 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 01:49:00.939 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 01:49:01.410 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 01:49:01.883 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 01:49:02.355 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 01:49:02.828 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 01:49:03.301 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 01:49:03.774 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 01:49:04.246 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 01:49:04.720 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 01:49:05.192 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 01:49:05.665 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 01:49:06.136 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 01:49:06.609 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 01:49:07.082 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 01:49:07.554 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 01:49:08.025 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 01:49:08.496 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 01:49:08.966 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 01:49:09.440 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 01:49:09.912 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 01:49:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 01:49:10.858 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 01:49:11.331 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 01:49:11.803 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 01:49:12.274 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 01:49:12.748 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 01:49:13.220 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 01:49:13.693 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 01:49:14.164 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 01:49:14.637 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 01:49:15.109 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 01:49:15.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:15.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:15.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:15.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:15.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:15.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:15.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:15.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:15.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:15.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:15.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:15.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:15.560 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:49:15.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:15.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:20.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:20.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:20.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:20.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:20.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:20.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:20.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:20.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:20.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:20.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:20.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:49:20.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:49:20.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:49:20.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:20.575 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:20.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:20.576 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:49:20.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:20.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:49:20.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:20.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:49:20.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:49:20.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:20.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:20.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:20.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:49:20.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:20.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:49:20.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:20.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:49:20.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:49:20.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:20.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:20.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:20.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:49:20.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:20.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:49:20.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:20.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:49:20.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:49:20.582 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:49:20.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:20.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:20.583 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:20.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:25.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:25.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:25.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:25.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:25.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:25.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:25.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:25.600 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:25.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:25.601 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:49:25.603 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:49:25.604 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:49:25.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:25.604 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:25.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:25.605 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:49:25.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:25.605 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:49:25.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:25.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:49:25.607 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:49:25.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:25.607 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:25.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:25.608 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:49:25.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:25.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:49:25.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:25.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:25.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:49:25.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:49:25.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:49:25.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:49:25.614 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:49:25.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:25.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:25.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:49:26.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:49:26.135 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:49:26.136 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:49:26.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:26.137 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:49:26.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:26.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:26.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:49:26.161 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:49:26.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:26.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:26.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:26.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:49:26.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:49:26.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:26.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:26.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:26.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:26.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:26.569 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:49:26.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:26.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:26.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:26.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:27.040 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:49:27.513 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:49:27.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:27.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:27.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:27.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:27.986 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:49:28.458 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:49:28.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:28.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:28.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:28.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:28.929 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:49:29.403 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:49:29.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:29.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:29.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:29.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:29.875 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:49:30.348 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:49:30.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:30.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:30.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:30.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:30.819 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:49:31.292 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:49:31.764 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:49:32.236 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:49:32.710 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:49:33.182 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:49:33.654 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:49:34.125 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:49:34.596 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:49:35.070 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:49:35.542 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:49:36.014 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:49:36.485 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:49:36.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:36.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:36.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:36.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:36.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:36.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:36.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:36.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:36.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:36.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:36.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:36.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:36.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:36.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:36.583 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:49:41.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:41.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:41.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:41.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:41.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:41.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:41.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:41.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:41.601 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:41.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:41.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:49:41.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:49:41.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:49:41.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:41.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:41.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:41.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:49:41.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:41.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:49:41.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:41.613 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:49:41.613 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:49:41.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:41.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:41.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:41.615 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:49:41.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:41.615 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:49:41.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:41.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:49:41.618 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:49:41.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:41.619 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:41.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:41.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:49:41.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:41.620 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:49:41.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:41.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:49:41.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:49:41.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:49:41.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:49:41.626 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:49:41.626 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:41.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:49:42.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:49:42.157 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:49:42.159 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:49:42.161 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:49:42.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:42.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:42.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:42.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:49:42.199 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:49:42.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:42.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:42.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:42.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:49:42.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:49:42.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:42.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:42.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:42.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:42.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:42.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:49:42.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:42.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:42.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:42.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:43.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:49:43.527 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:49:43.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:43.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:43.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:43.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:43.999 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:49:44.470 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:49:44.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:44.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:44.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:44.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:44.944 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:49:45.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:49:45.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:45.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:45.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:45.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:45.888 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:49:46.362 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:49:46.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:46.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:46.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:46.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:46.834 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:49:47.307 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:49:47.778 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:49:48.251 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:49:48.724 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:49:49.196 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:49:49.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:49:50.141 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:49:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:49:51.086 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:49:51.559 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:49:52.032 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:49:52.504 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:49:52.977 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:49:53.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:53.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:53.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:53.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:53.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:53.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:53.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:53.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:53.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:53.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:53.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:53.075 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:49:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:53.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:53.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:49:58.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:49:58.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:49:58.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:58.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:58.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:58.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:58.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:49:58.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:58.093 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:58.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:49:58.093 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:49:58.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:49:58.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:49:58.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:58.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:58.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:49:58.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:49:58.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:49:58.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:49:58.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:58.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:49:58.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:49:58.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:58.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:58.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:49:58.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:49:58.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:49:58.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:49:58.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:58.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:49:58.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:49:58.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:49:58.108 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:49:58.108 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:49:58.108 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:49:58.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:49:58.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:49:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:49:58.629 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:49:58.630 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:49:58.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:58.631 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:49:58.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:49:58.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:49:58.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:49:58.655 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:49:58.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:58.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:58.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:58.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:49:58.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:49:58.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:49:58.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:49:58.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:49:58.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:58.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:49:59.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:49:59.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:49:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:49:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:49:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:49:59.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:49:59.549 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:00.008 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:50:00.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:00.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:00.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:00.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:00.481 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:50:00.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:50:01.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:01.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:01.424 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:50:01.897 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:50:02.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:02.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:02.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:02.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:02.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:50:02.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:50:03.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:03.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:03.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:03.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:03.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:50:03.789 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:50:04.261 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:50:04.735 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:50:05.207 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:50:05.680 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:50:06.153 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:50:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:50:07.098 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:50:07.569 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:50:08.042 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:50:08.515 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:50:08.987 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:50:09.460 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:50:09.933 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:50:10.405 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:50:10.876 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:50:11.350 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:50:11.822 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:50:12.295 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:50:12.768 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:50:13.241 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:50:13.713 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:50:14.184 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:50:14.655 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:50:15.129 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:50:15.601 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:50:16.074 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:50:16.547 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:50:17.020 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:50:17.492 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:50:17.966 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:50:18.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:18.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:18.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:50:18.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:50:18.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:18.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:18.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:18.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:18.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:18.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:18.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:50:18.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:50:18.294 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:50:18.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:18.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:18.294 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4358 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:23.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:50:23.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:50:23.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:23.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:23.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:23.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:23.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:23.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:50:23.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:23.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:50:23.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:50:23.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:50:23.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:50:23.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:50:23.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:23.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:23.314 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:50:23.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:50:23.314 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:50:23.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:23.318 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:50:23.318 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:50:23.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:50:23.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:23.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:23.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:50:23.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:50:23.319 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:50:23.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:23.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:50:23.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:50:23.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:50:23.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:23.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:23.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:50:23.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:50:23.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:50:23.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:50:23.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:50:23.329 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:50:23.329 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:23.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:23.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:23.334 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:50:23.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:50:23.857 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:50:23.860 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:50:23.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:23.863 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:50:23.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:50:23.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:50:23.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:50:23.896 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:50:23.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:23.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:50:23.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:50:23.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:50:23.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:50:23.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:23.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:50:23.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:50:23.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:23.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:24.285 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:50:24.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:24.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:24.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:24.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:24.756 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:50:24.770 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:25.229 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:50:25.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:25.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:25.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:25.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:25.702 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:50:25.736 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:26.174 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:50:26.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:26.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:26.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:26.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:26.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:50:26.696 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:27.118 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:50:27.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:27.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:27.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:50:27.662 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:28.063 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:50:28.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:28.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:28.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:28.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:28.534 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:50:28.622 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:29.007 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:50:29.480 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:50:29.588 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:29.952 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:50:30.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:50:30.548 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:30.896 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:50:31.369 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:50:31.514 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:31.842 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:50:32.312 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:50:32.475 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:32.783 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:50:33.257 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:50:33.439 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:33.730 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:50:34.201 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:50:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:34.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:34.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:50:34.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:50:34.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:34.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:34.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:34.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:34.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:34.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:34.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:50:34.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:50:34.306 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:50:34.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:34.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:34.306 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:39.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:50:39.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:50:39.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:39.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:39.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:39.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:39.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:39.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:50:39.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:39.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:50:39.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:50:39.322 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:50:39.322 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:50:39.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:50:39.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:39.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:50:39.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:50:39.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:50:39.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:39.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:50:39.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:50:39.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:50:39.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:39.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:39.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:50:39.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:50:39.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:50:39.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:39.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:50:39.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:50:39.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:50:39.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:50:39.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:39.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:50:39.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:50:39.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:50:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:39.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:50:39.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:50:39.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:50:39.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:50:39.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:50:39.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:50:39.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:50:39.336 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:50:39.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:50:39.341 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:50:39.820 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:50:39.865 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:50:39.866 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:50:39.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:39.867 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:50:39.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:50:39.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:50:39.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:50:39.897 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:50:39.899 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:50:39.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:39.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:50:39.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:50:39.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:50:39.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:50:39.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:39.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:50:39.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:50:39.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:39.918 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:50:39.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:40.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:50:40.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:40.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:40.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:40.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:40.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:50:40.778 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:50:41.236 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:50:41.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:41.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:41.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:41.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:41.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:50:42.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:50:42.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:42.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:42.655 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:50:43.127 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:50:43.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:43.600 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:50:44.071 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:50:44.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:44.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:44.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:44.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:44.544 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:50:45.017 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:50:45.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:50:45.963 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:50:46.435 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:50:46.907 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:50:47.381 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:50:47.853 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:50:48.326 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:50:48.796 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:50:49.267 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:50:49.738 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:50:50.212 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:50:50.409 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:50:50.684 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:50:51.157 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:50:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:50:52.103 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:50:52.575 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:50:53.049 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:50:53.521 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:50:53.994 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:50:54.465 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:50:54.938 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:50:55.411 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:50:55.883 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:50:56.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:50:56.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:50:56.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:50:56.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:50:56.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:50:56.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:50:56.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:50:56.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:50:56.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:50:56.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:50:56.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:50:56.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:50:56.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:50:56.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:50:56.217 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:50:56.218 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:01.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:01.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:01.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:01.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:01.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:01.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:01.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:01.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:01.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:01.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:01.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:01.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:01.228 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:51:01.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:01.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:51:01.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:51:01.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:01.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:01.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:01.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:51:01.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:01.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:51:01.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:01.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:51:01.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:51:01.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:01.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:01.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:01.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:51:01.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:01.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:51:01.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:01.234 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:51:01.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:51:01.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:51:01.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:51:01.234 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:51:01.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:51:01.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:51:01.235 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:51:01.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:01.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:51:01.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:51:01.753 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:51:01.754 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:51:01.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:01.755 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:51:01.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:01.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:01.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:01.788 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:51:01.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:01.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:01.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:01.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:01.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:01.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:01.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:01.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:01.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:01.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:02.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:51:02.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:02.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:02.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:02.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:02.661 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:51:02.677 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:51:03.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:51:03.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:03.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:03.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:03.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:03.606 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:51:04.079 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:51:04.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:04.551 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:51:05.022 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:51:05.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:05.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:05.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:05.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:05.493 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:51:05.964 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:51:06.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:06.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:06.437 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:51:06.910 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:51:07.382 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:51:07.855 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:51:08.328 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:51:08.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:51:09.274 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:51:09.747 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:51:10.219 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:51:10.690 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:51:11.160 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:51:11.631 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:51:11.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:11.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:11.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:11.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:11.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:11.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:11.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:11.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:11.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:11.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:11.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:11.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:11.842 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:51:11.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:11.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:11.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:11.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:11.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:11.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:11.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:11.843 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:11.843 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2292 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:16.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:16.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:16.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:16.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:16.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:16.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:16.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:16.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:16.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:16.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:16.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:16.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:16.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:51:16.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:16.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:51:16.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:51:16.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:16.861 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:16.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:16.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:51:16.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:16.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:51:16.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:16.863 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:16.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:51:16.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:16.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:51:16.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:51:16.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:51:16.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:51:16.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:51:16.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:51:16.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:51:16.866 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:51:16.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:16.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:16.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:16.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:51:17.350 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:51:17.386 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:51:17.388 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:51:17.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:17.390 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:51:17.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:17.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:17.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:17.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:17.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:17.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:17.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:17.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:17.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:17.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:17.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:17.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:17.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:17.822 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:51:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:17.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:17.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:17.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:17.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:17.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:17.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:17.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:17.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:17.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:17.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:17.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:17.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:17.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:17.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:17.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:17.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:17.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:17.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:17.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:17.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:51:18.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:18.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:18.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:18.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:18.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:18.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:18.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:18.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:18.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:18.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:18.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:18.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:18.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:18.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:18.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:18.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:18.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:18.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:18.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:18.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:18.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:18.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:18.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:18.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:18.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:18.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:18.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:18.765 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:51:18.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:18.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:18.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:18.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:19.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:19.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:19.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:19.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:19.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:19.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:19.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:19.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:19.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:19.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:19.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:19.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:19.168 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:51:19.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:19.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:24.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:24.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:24.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:24.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:24.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:24.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:24.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:24.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:24.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:24.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:24.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:51:24.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:51:24.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:51:24.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:24.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:24.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:24.188 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:51:24.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:24.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:51:24.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:24.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:51:24.190 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:51:24.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:24.190 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:24.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:24.190 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:51:24.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:24.190 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:51:24.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:24.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:51:24.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:51:24.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:24.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:24.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:24.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:51:24.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:24.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:51:24.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:24.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:51:24.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:51:24.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:51:24.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:51:24.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:51:24.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:51:24.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:51:24.196 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:51:24.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:24.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:51:24.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:51:24.719 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:51:24.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:24.722 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:51:24.726 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:51:24.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:24.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:24.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:24.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:24.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:24.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:24.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:24.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:24.772 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:51:24.776 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 01:51:24.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:24.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:24.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:24.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:24.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:25.152 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:51:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:25.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:25.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:25.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:25.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:25.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:25.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:25.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:25.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:25.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:25.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:25.177 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:51:30.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:30.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:30.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:30.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:30.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:30.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:30.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:30.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:30.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:30.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:30.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:51:30.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:51:30.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:51:30.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:30.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:30.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:30.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:51:30.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:30.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:51:30.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:30.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:51:30.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:51:30.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:30.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:30.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:30.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:51:30.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:30.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:51:30.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:30.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:30.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:51:30.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:30.202 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:51:30.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:51:30.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:51:30.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:51:30.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:51:30.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:51:30.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:51:30.203 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:51:30.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:30.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:51:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:51:30.728 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:51:30.729 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:51:30.731 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:51:30.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:30.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:30.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:30.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:30.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:30.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:30.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:30.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:30.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:30.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:30.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:30.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:30.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:31.158 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:51:31.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:31.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:31.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:31.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:31.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:51:32.101 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:51:32.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:32.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:32.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:32.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:32.574 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:51:33.047 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:51:33.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:33.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:33.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:33.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:33.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:51:33.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:33.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:33.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:33.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:33.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:33.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:33.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:33.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:33.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:33.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:33.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:33.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:33.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:33.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:51:33.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:33.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:33.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:34.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:34.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:34.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:34.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:34.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:34.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:34.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:51:34.937 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:51:35.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:35.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:35.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:35.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:35.408 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:51:35.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:51:36.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:51:36.828 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:51:37.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:37.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:37.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:37.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:37.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:37.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:37.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:37.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:37.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:37.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:37.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:37.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:37.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:37.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:37.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:37.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:37.300 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:51:37.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:37.773 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:51:38.244 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:51:38.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:51:39.189 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:51:39.661 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:51:40.132 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:51:40.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:40.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:40.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:40.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:40.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:40.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:40.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:40.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:40.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:40.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:40.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:40.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:40.605 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:51:40.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:40.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:40.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:40.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:40.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:40.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:41.078 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:51:41.550 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:51:42.021 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:51:42.494 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:51:42.967 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:51:43.438 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:51:43.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:43.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:43.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:43.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:43.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:43.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:43.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:43.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:43.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:43.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:43.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:43.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:43.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:43.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:43.781 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:51:43.781 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:43.781 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:43.781 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:43.781 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:51:48.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:51:48.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:51:48.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:48.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:48.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:48.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:48.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:51:48.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:48.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:48.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:51:48.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:51:48.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:51:48.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:51:48.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:48.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:48.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:51:48.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:51:48.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:51:48.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:51:48.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:48.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:51:48.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:51:48.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:48.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:48.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:51:48.804 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:51:48.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:51:48.804 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:51:48.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:48.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:51:48.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:51:48.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:48.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:51:48.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:51:48.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:51:48.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:51:48.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:51:48.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:51:48.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:51:48.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:51:48.815 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:51:48.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:51:48.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:51:49.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:51:49.351 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:51:49.353 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:51:49.354 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:51:49.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:51:49.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:51:49.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:51:49.769 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:51:49.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:49.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:49.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:49.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:50.241 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:51:50.711 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:51:50.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:50.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:50.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:50.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:51.185 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:51:51.657 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:51:51.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:51.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:51.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:51.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:52.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:51:52.600 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:51:52.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:52.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:52.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:52.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:53.073 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:51:53.545 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:51:53.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:51:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:51:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:51:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:51:54.017 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:51:54.488 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:51:54.959 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:51:55.432 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:51:55.905 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:51:56.377 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:51:56.848 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:51:57.321 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:51:57.793 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:51:58.265 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:51:58.739 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:51:59.211 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:51:59.683 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:52:00.154 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:52:00.628 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:52:01.100 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:52:01.572 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:52:02.043 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:52:02.516 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:52:02.988 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:52:03.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:03.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:03.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:03.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:03.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:03.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:03.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:03.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:03.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:03.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:52:03.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:52:03.283 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:52:03.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:03.283 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.283 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.284 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.284 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.284 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.284 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.284 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:03.284 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:08.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:52:08.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:52:08.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:08.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:08.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:08.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:08.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:08.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:52:08.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:08.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:52:08.298 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:52:08.301 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:52:08.301 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:52:08.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:52:08.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:08.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:08.302 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:52:08.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:52:08.302 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:52:08.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:52:08.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:52:08.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:52:08.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:08.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:52:08.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:52:08.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:52:08.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:08.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:08.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:52:08.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:52:08.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:52:08.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:52:08.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:52:08.309 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:52:08.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:08.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:52:08.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:52:08.831 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:52:08.833 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:52:08.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:52:08.836 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:52:08.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:08.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:08.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:52:08.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:08.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:52:08.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:52:08.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:52:08.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:52:08.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:52:08.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:52:08.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:52:08.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:08.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:09.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:52:09.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:09.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:09.736 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:52:10.209 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:52:10.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:10.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:10.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:10.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:10.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:52:10.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:10.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:10.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:10.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:52:10.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:10.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:52:10.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:52:10.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:52:10.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:52:11.153 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:52:11.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:11.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:11.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:11.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:11.625 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:52:12.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:52:12.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:12.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:12.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:12.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:12.570 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:52:13.042 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:52:13.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:13.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:13.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:13.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:13.513 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:52:13.984 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:52:14.457 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:52:14.930 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:52:15.402 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:52:15.873 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:52:16.344 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:52:16.816 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:52:17.289 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:52:17.761 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:52:18.232 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:52:18.705 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:52:19.177 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:52:19.649 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:52:20.123 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:52:20.595 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:52:21.067 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:52:21.538 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:52:22.009 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:52:22.480 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:52:22.953 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:52:23.426 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:52:23.897 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:52:24.369 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:52:24.842 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:52:25.315 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:52:25.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:52:25.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:25.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:25.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:25.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:25.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:25.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:25.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:25.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:25.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:25.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:52:25.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:52:25.618 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:52:25.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:25.618 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:25.618 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:25.618 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:25.618 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:25.618 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:30.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:52:30.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:52:30.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:30.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:30.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:30.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:30.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:30.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:52:30.624 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:30.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:52:30.624 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:52:30.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:52:30.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:52:30.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:52:30.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:52:30.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:52:30.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:52:30.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:52:30.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:52:30.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:52:30.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:52:30.630 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:52:30.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:30.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:30.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:30.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:52:31.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:52:31.155 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:52:31.157 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:52:31.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:52:31.160 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:52:31.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:31.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:31.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:52:31.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:31.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:52:31.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:52:31.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:52:31.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:52:31.583 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:52:31.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:31.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:31.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:31.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:32.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:52:32.528 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:52:32.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:32.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:32.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:32.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:33.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:52:33.472 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:52:33.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:33.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:33.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:33.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:33.943 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:52:34.417 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:52:34.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:34.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:34.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:34.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:34.889 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:52:35.361 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:52:35.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:35.832 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:52:36.305 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:52:36.778 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:52:37.250 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:52:37.721 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:52:38.194 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:52:38.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:52:39.138 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:52:39.610 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:52:40.081 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:52:40.554 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:52:41.026 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:52:41.498 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:52:41.969 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:52:42.442 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:52:42.915 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:52:43.387 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:52:43.858 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:52:44.331 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:52:44.804 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:52:45.275 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:52:45.747 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:52:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:52:46.692 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:52:47.164 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:52:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:52:48.109 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:52:48.581 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:52:49.053 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:52:49.524 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:52:49.997 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:52:50.470 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:52:50.942 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:52:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:52:51.888 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:52:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:52:52.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:52.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:52.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:52.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:52.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:52.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:52.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:52.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:52.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:52:52.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:52:52.655 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:52:52.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:52.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:52.655 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:52:57.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:52:57.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:52:57.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:57.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:57.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:57.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:57.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:52:57.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:52:57.662 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:57.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:52:57.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:52:57.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:52:57.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:52:57.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:57.664 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:52:57.664 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:52:57.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:52:57.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:57.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:52:57.664 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:52:57.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:52:57.665 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:52:57.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:52:57.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:52:57.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:52:57.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:52:57.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:52:57.668 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:52:57.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:52:57.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:52:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:52:57.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:52:58.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:52:58.191 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:52:58.194 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:52:58.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:52:58.194 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:52:58.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:52:58.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:52:58.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:52:58.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:52:58.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:52:58.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:52:58.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:52:58.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:52:58.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:52:58.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:58.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:58.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:58.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:52:59.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:52:59.568 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:52:59.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:52:59.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:52:59.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:52:59.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:00.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:53:00.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:53:00.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:00.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:00.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:00.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:00.983 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:53:01.457 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:53:01.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:01.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:01.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:01.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:01.929 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:53:02.401 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:53:02.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:02.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:02.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:02.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:02.872 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:53:03.345 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:53:03.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:53:04.290 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:53:04.761 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:53:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:53:05.707 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:53:06.179 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:53:06.650 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:53:07.123 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:53:07.596 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:53:08.067 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:53:08.539 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:53:09.009 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:53:09.483 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:53:09.955 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:53:10.427 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:53:10.898 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:53:11.371 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:53:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:53:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:53:12.789 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:53:13.262 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:53:13.734 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:53:14.205 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:53:14.678 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:53:15.150 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:53:15.622 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:53:16.093 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:53:16.567 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:53:17.039 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:53:17.511 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:53:17.982 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:53:18.453 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:53:18.924 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:53:19.397 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:53:19.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:53:19.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:53:19.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:19.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:19.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:19.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:19.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:53:19.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:53:19.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:53:19.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:53:19.687 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:53:19.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:53:19.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:53:24.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:53:24.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:53:24.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:53:24.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:53:24.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:53:24.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:53:24.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:53:24.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:53:24.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:53:24.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:53:24.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:53:24.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:53:24.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:53:24.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:53:24.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:53:24.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:53:24.717 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:53:24.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:53:24.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:53:24.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:24.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:53:24.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:53:24.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:53:24.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:53:24.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:53:24.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:53:24.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:53:24.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:53:24.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:24.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:53:24.724 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:53:24.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:53:24.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:53:24.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:53:24.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:53:24.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:53:24.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:53:24.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:53:24.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:53:24.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:53:24.731 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:53:24.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:53:24.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:53:24.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:53:25.211 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:53:25.269 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:53:25.271 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:53:25.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:53:25.273 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:53:25.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:53:25.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:53:25.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:53:25.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:53:25.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:53:25.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:53:25.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:53:25.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:53:25.683 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:53:25.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:25.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:25.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:25.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:26.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:53:26.629 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:53:26.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:26.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:27.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:53:27.572 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:53:27.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:27.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:28.043 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:53:28.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:53:28.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:28.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:28.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:28.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:28.988 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:53:29.460 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:53:29.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:29.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:29.931 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:53:30.405 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:53:30.877 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:53:31.349 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:53:31.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:53:32.293 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:53:32.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:53:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:53:33.709 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:53:34.182 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:53:34.655 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:53:35.127 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:53:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:53:36.069 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:53:36.542 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:53:37.014 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:53:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:53:37.960 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:53:38.432 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:53:38.904 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:53:39.375 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:53:39.849 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:53:40.321 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:53:40.793 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:53:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:53:41.738 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:53:42.210 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:53:42.682 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:53:43.153 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:53:43.626 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:53:44.099 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:53:44.571 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:53:45.045 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:53:45.517 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:53:45.989 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:53:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:53:46.933 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:53:47.406 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:53:47.878 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:53:48.351 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:53:48.824 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:53:49.296 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:53:49.767 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:53:50.240 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:53:50.713 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:53:51.185 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:53:51.659 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:53:52.131 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:53:52.603 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:53:53.074 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:53:53.547 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:53:54.020 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:53:54.492 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:53:54.965 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:53:55.437 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:53:55.909 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:53:56.380 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:53:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:53:57.326 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:53:57.798 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:53:58.269 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:53:58.742 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:53:58.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:53:58.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:53:58.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:53:58.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:53:58.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:53:58.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:53:58.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:53:58.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:53:58.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:53:58.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:53:58.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:53:58.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:53:58.760 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:54:03.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:03.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:03.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:03.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:03.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:03.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:03.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:03.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:03.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:03.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:03.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:54:03.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:54:03.777 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:54:03.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:03.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:03.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:03.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:54:03.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:03.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:54:03.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:03.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:03.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:54:03.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:03.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:54:03.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:54:03.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:03.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:03.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:03.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:54:03.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:03.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:54:03.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:54:03.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:54:03.784 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:54:03.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:03.789 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:54:04.265 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:54:04.306 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:54:04.308 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:54:04.309 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:54:04.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:54:04.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:54:04.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:54:04.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:54:04.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:54:04.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:54:04.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:54:04.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:54:04.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:54:04.736 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:54:04.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:04.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:04.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:04.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:05.208 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:54:05.681 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:54:05.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:05.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:05.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:05.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:06.154 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:54:06.626 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:54:06.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:06.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:06.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:06.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:07.097 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:54:07.568 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:54:07.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:07.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:07.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:07.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:08.041 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:54:08.513 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:54:08.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:08.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:08.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:08.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:08.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:54:09.456 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:54:09.927 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:54:10.400 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:54:10.873 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:54:11.345 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:54:11.816 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:54:12.289 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:54:12.762 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:54:13.234 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:54:13.705 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:54:14.178 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:54:14.650 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:54:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:54:15.593 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:54:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:54:16.539 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:54:17.011 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:54:17.482 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:54:17.955 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:54:18.428 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:54:18.900 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:54:19.371 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:54:19.844 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:54:20.317 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:54:20.789 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:54:21.260 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:54:21.733 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:54:22.205 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:54:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:54:23.148 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:54:23.619 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:54:24.093 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:54:24.565 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:54:25.037 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:54:25.508 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:54:25.981 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:54:26.454 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:54:26.926 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:54:27.397 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:54:27.871 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:54:28.342 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:54:28.814 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:54:29.285 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:54:29.759 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:54:30.231 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:54:30.703 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:54:31.174 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:54:31.648 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:54:31.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:54:31.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:54:31.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:31.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:31.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:31.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:31.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:31.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:31.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:31.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:31.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:31.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:31.805 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:54:31.805 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6055 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:31.805 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6055 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:31.805 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6055 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:31.805 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6055 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:31.805 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6055 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:31.805 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6055 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:36.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:36.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:36.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:36.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:36.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:36.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:36.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:36.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:36.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:36.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:36.819 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:54:36.821 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:54:36.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:54:36.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:36.822 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:36.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:36.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:54:36.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:36.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:54:36.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:36.825 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:54:36.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:54:36.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:36.826 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:36.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:36.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:54:36.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:36.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:54:36.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:36.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:36.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:54:36.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:54:36.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:54:36.833 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:54:36.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:36.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:36.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:36.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:54:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:54:37.362 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:54:37.364 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:54:37.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:54:37.366 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:54:37.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:37.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:37.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:37.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:37.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:37.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:37.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:37.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:37.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:37.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:37.379 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:54:42.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:42.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:42.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:42.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:42.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:42.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:42.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:42.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:42.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:42.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:42.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:54:42.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:54:42.396 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:54:42.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:42.396 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:42.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:42.396 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:54:42.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:42.396 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:54:42.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:42.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:54:42.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:54:42.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:42.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:42.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:42.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:54:42.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:42.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:54:42.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:42.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:54:42.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:54:42.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:42.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:42.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:42.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:54:42.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:42.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:54:42.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:42.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:54:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:54:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:54:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:54:42.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:54:42.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:54:42.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:54:42.412 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:54:42.413 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:42.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:54:42.896 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:54:42.940 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:54:42.942 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:54:42.944 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:54:42.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:54:42.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:42.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:42.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:42.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:42.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:42.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:42.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:42.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:42.962 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:54:42.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:42.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:42.963 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:42.963 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:42.963 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:42.963 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:42.964 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:42.964 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:42.964 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:47.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:47.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:47.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:47.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:47.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:47.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:47.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:47.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:47.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:47.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:47.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:54:47.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:54:47.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:54:47.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:47.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:47.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:47.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:54:47.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:47.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:54:47.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:47.977 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:47.977 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:54:47.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:47.979 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:47.979 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:54:47.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:47.981 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:54:47.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:54:47.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:54:47.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:54:47.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:54:47.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:54:47.982 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:54:47.982 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:54:47.982 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:47.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:47.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:47.987 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:54:48.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:54:48.500 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:54:48.501 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:54:48.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:54:48.502 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:54:48.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:48.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:48.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:48.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:48.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:48.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:48.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:48.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:48.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:48.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:48.515 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:48.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:54:53.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:54:53.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:54:53.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:53.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:53.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:53.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:53.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:54:53.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:53.524 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:53.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:54:53.524 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:54:53.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:54:53.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:54:53.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:53.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:53.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:54:53.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:54:53.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:54:53.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:54:53.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:53.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:54:53.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:54:53.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:53.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:53.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:54:53.531 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:54:53.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:54:53.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:54:53.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:53.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:54:53.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:54:53.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:53.534 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:54:53.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:54:53.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:54:53.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:54:53.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:54:53.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:53.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:54:53.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:54:53.541 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:54:53.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:54:53.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:54:54.023 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:54:54.065 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:54:54.067 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:54:54.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:54:54.069 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:54:54.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:54:54.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:54:54.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:54:54.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:54:54.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:54:54.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:54:54.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:54:54.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:54:54.495 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:54:54.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:54.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:54.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:54.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:54.967 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:54:55.438 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:54:55.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:55.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:55.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:55.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:55.911 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:54:56.383 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:54:56.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:56.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:56.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:56.855 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:54:57.326 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:54:57.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:57.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:57.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:57.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:57.799 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:54:58.272 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:54:58.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:54:58.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:54:58.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:54:58.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:54:58.744 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:54:59.215 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:54:59.688 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:55:00.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:55:00.632 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:55:01.103 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:55:01.576 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:55:02.049 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:55:02.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:02.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:02.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:02.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:02.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:02.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:02.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:02.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:02.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:02.128 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:02.128 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:07.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:07.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:07.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:07.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:07.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:07.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:07.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:07.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:07.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:07.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:07.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:55:07.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:55:07.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:55:07.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:07.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:07.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:07.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:55:07.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:07.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:55:07.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:07.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:55:07.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:55:07.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:07.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:07.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:07.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:55:07.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:07.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:55:07.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:07.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:55:07.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:55:07.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:07.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:07.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:07.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:55:07.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:07.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:55:07.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:07.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:55:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:55:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:55:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:55:07.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:55:07.154 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:55:07.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:07.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:55:07.632 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:55:07.681 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:55:07.683 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:55:07.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:55:07.687 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:55:07.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:07.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:07.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:55:07.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:55:07.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:55:07.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:55:07.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:55:07.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:55:08.105 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:55:08.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:08.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:08.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:08.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:08.576 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:55:09.049 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:55:09.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:09.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:09.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:09.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:09.521 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:55:09.994 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:55:10.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:10.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:10.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:10.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:10.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:55:10.938 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:55:11.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:11.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:11.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:11.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:11.410 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:55:11.883 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:55:12.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:12.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:12.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:12.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:12.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:55:12.828 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:55:13.300 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:55:13.771 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:55:14.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:55:14.717 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:55:15.189 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:55:15.663 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:55:15.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:15.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:15.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:15.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:15.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:15.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:15.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:15.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:15.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:15.742 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:55:15.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:15.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:20.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:20.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:20.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:20.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:20.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:20.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:20.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:20.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:20.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:20.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:20.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:55:20.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:55:20.757 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:55:20.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:20.757 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:20.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:20.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:55:20.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:20.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:55:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:20.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:55:20.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:55:20.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:20.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:20.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:20.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:55:20.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:20.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:55:20.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:20.766 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:20.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:55:20.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:20.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:55:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:55:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:55:20.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:55:20.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:55:20.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:55:20.771 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:55:20.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:20.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:55:21.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:55:21.301 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:55:21.303 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:55:21.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:55:21.307 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:55:21.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:21.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:21.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:55:21.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:55:21.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:55:21.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:55:21.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:55:21.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:55:21.725 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:55:21.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:21.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:21.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:21.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:22.196 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:55:22.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:55:22.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:22.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:22.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:22.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:23.141 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:55:23.613 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:55:23.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:23.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:24.085 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:55:24.556 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:55:24.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:24.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:25.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:55:25.501 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:55:25.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:25.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:25.973 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:55:26.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:55:26.919 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:55:27.392 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:55:27.865 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:55:28.337 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:55:28.809 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:55:29.282 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:55:29.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:29.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:29.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:29.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:29.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:29.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:29.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:29.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:29.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:29.356 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:55:34.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:34.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:34.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:34.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:34.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:34.371 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:34.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:34.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:55:34.375 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:55:34.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:55:34.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:34.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:34.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:34.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:55:34.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:34.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:55:34.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:34.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:55:34.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:55:34.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:34.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:34.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:34.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:55:34.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:34.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:55:34.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:34.382 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:55:34.382 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:55:34.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:34.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:34.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:34.382 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:55:34.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:34.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:55:34.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:34.385 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:55:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:55:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:55:34.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:55:34.385 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:55:34.386 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:55:34.386 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:55:34.386 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:34.391 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:55:34.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:55:34.915 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:55:34.917 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:55:34.919 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:55:34.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:55:34.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:34.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:34.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:55:34.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:55:34.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:55:34.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:55:34.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:55:34.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:55:35.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:55:35.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:35.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:35.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:35.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:35.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:55:36.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:55:36.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:36.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:36.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:36.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:36.755 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:55:37.227 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:55:37.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:37.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:37.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:37.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:37.698 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:55:38.168 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:55:38.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:38.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:38.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:38.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:38.642 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:55:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:55:39.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:39.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:39.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:39.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:39.586 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:55:40.056 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:55:40.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:55:41.001 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:55:41.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:55:41.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:55:42.416 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:55:42.890 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:55:42.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:42.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:42.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:42.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:42.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:42.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:42.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:42.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:42.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:42.972 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:55:42.972 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:42.973 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:42.973 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:42.973 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:42.973 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:42.973 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:42.973 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:47.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:47.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:47.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:47.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:47.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:47.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:47.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:47.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:47.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:47.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:55:47.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:55:47.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:55:47.980 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:55:47.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:47.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:47.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:47.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:55:47.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:55:47.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:55:47.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:47.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:55:47.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:55:47.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:47.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:47.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:47.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:55:47.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:55:47.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:55:47.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:47.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:55:47.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:55:47.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:47.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:55:47.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:47.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:55:47.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:55:47.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:55:47.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:47.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:55:47.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:55:47.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:55:47.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:55:47.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:55:47.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:55:47.992 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:55:47.992 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:55:47.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:55:47.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:55:47.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:55:47.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:55:48.475 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:55:48.523 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:55:48.526 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:55:48.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:55:48.528 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:55:48.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:48.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:48.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:55:48.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:55:48.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:55:48.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:55:48.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:55:48.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:55:48.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:55:48.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:48.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:48.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:48.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:55:49.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:55:49.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:49.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:49.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:49.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:50.364 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:55:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:55:50.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:51.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:51.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:51.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:51.307 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:55:51.780 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:55:52.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:52.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:52.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:52.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:52.253 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:55:52.725 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:55:53.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:53.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:53.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:53.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:53.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:55:53.671 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:55:54.143 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:55:54.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:55:55.087 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:55:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:55:56.032 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:55:56.503 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:55:56.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:55:56.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:55:56.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:55:56.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:55:56.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:55:56.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:55:56.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:55:56.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:55:56.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:55:56.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:55:56.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:55:56.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:55:56.584 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:55:56.585 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:56.585 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:56.585 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:56.585 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:55:56.585 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:01.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:01.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:01.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:01.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:01.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:01.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:01.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:01.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:01.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:01.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:01.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:56:01.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:56:01.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:56:01.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:01.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:01.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:01.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:56:01.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:01.602 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:56:01.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:01.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:01.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:56:01.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:01.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:01.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:56:01.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:56:01.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:56:01.608 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:56:01.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:01.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:56:02.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:56:02.133 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:56:02.135 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:56:02.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:56:02.138 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:56:02.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:02.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:02.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:56:02.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:56:02.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:56:02.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:56:02.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:56:02.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:56:02.562 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:56:02.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:02.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:02.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:02.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:03.033 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:56:03.504 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:56:03.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:03.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:03.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:03.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:03.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:56:04.449 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:56:04.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:04.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:04.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:04.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:04.921 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:56:05.392 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:56:05.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:05.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:05.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:05.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:05.866 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:56:06.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:56:06.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:06.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:06.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:06.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:06.810 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:56:07.281 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:56:07.754 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:56:08.227 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:56:08.699 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:56:09.170 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:56:09.643 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:56:10.115 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:56:10.587 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:56:11.058 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:56:11.531 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:56:12.004 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:56:12.475 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:56:12.947 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:56:13.420 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:56:13.892 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:56:14.364 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:56:14.838 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:56:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:56:15.782 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:56:16.253 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:56:16.727 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:56:17.199 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:56:17.671 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:56:18.142 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:56:18.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:18.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:18.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:18.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:18.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:18.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:18.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:18.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:18.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:18.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:18.204 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:56:18.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:18.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:18.204 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:18.204 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:23.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:23.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:23.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:23.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:23.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:23.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:23.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:23.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:23.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:23.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:23.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:56:23.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:56:23.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:56:23.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:23.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:23.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:23.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:56:23.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:23.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:56:23.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:23.224 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:56:23.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:56:23.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:23.225 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:23.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:23.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:56:23.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:23.225 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:56:23.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:23.227 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:23.227 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:56:23.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:56:23.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:56:23.230 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:56:23.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:23.235 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:56:23.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:56:23.751 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:56:23.752 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:56:23.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:56:23.754 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:56:23.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:23.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:23.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:56:23.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:56:23.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:56:23.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:56:23.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:56:23.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:56:24.186 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:56:24.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:24.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:24.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:24.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:24.657 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:56:25.127 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:56:25.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:25.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:25.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:25.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:56:26.072 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:56:26.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:26.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:26.544 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:56:27.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:56:27.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:27.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:27.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:27.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:27.487 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:56:27.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:56:28.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:28.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:28.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:28.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:28.432 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:56:28.904 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:56:29.375 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:56:29.848 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:56:30.320 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:56:30.792 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:56:31.266 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:56:31.738 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:56:31.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:31.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:31.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:31.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:31.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:31.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:31.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:31.824 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:56:31.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:31.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:31.825 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:36.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:36.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:36.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:36.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:36.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:36.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:36.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:36.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:36.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:36.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:36.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:56:36.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:56:36.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:56:36.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:36.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:36.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:36.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:56:36.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:36.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:56:36.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:36.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:56:36.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:56:36.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:36.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:36.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:36.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:56:36.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:36.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:56:36.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:36.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:56:36.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:56:36.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:36.856 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:36.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:36.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:56:36.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:36.856 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:56:36.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:56:36.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:56:36.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:56:36.863 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:56:36.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:36.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:36.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:56:37.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:56:37.394 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:56:37.397 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:56:37.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:56:37.399 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:56:37.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:37.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:37.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:56:37.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:56:37.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:56:37.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:56:37.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:56:37.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:56:37.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:56:37.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:37.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:37.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:37.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:38.290 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:56:38.763 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:56:38.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:38.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:38.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:38.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:39.235 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:56:39.707 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:56:39.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:39.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:39.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:39.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:40.178 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:56:40.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:56:40.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:41.124 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:56:41.596 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:56:41.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:41.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:41.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:41.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:42.067 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:56:42.540 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:56:43.012 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:56:43.485 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:56:43.957 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:56:44.430 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:56:44.902 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:56:45.373 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:56:45.847 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:56:46.319 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:56:46.791 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:56:47.262 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:56:47.735 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:56:48.208 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:56:48.679 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:56:49.151 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:56:49.624 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:56:50.096 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:56:50.568 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:56:51.039 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:56:51.513 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:56:51.985 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:56:52.457 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:56:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:56:53.399 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:56:53.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:53.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:53.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:53.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:53.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:53.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:53.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:53.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:53.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:53.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:53.457 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:56:53.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:53.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:53.457 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:56:58.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:58.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:58.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:58.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:58.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:58.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:58.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:58.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:58.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:58.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:56:58.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:56:58.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:56:58.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:56:58.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:58.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:58.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:58.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:56:58.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:56:58.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:56:58.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:58.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:56:58.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:56:58.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:58.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:58.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:58.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:56:58.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:56:58.483 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:56:58.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:58.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:56:58.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:56:58.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:58.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:56:58.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:56:58.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:56:58.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:56:58.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:56:58.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:56:58.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:56:58.488 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:56:58.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:56:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:56:58.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:56:59.015 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:56:59.017 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:56:59.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:56:59.020 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:56:59.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:56:59.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:56:59.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:56:59.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:56:59.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:56:59.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:56:59.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:56:59.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:56:59.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:56:59.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:56:59.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:56:59.058 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:56:59.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:56:59.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:04.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:04.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:04.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:04.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:04.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:04.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:04.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:04.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:04.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:04.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:04.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:57:04.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:57:04.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:57:04.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:04.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:04.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:04.075 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:57:04.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:04.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:57:04.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:04.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:57:04.078 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:57:04.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:04.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:04.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:04.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:57:04.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:04.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:57:04.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:04.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:57:04.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:57:04.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:04.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:04.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:04.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:57:04.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:04.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:57:04.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:57:04.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:57:04.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:57:04.089 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:57:04.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:04.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:04.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:04.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:57:04.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:57:04.624 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:57:04.626 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:57:04.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:57:04.629 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:57:04.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:04.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:04.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:04.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:04.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:04.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:04.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:04.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:04.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:04.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:04.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:04.676 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:57:04.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:04.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:04.677 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:09.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:09.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:09.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:09.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:09.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:09.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:09.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:09.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:09.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:09.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:09.688 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:57:09.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:57:09.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:57:09.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:09.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:09.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:09.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:57:09.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:09.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:57:09.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:09.693 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:57:09.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:57:09.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:09.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:09.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:09.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:57:09.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:09.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:57:09.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:09.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:09.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:57:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:09.698 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:57:09.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:57:09.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:57:09.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:57:09.698 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:57:09.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:57:09.699 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:57:09.699 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:57:09.699 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:09.704 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:57:10.175 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:57:10.226 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:57:10.228 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:57:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:57:10.230 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:57:10.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:10.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:10.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:10.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:10.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:10.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:10.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:10.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:10.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:10.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:10.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:10.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:10.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:10.277 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:10.277 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:15.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:15.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:15.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:15.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:15.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:15.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:15.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:15.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:15.293 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:15.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:15.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:57:15.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:57:15.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:57:15.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:15.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:15.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:15.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:57:15.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:15.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:57:15.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:15.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:57:15.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:57:15.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:15.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:15.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:15.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:57:15.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:15.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:57:15.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:15.307 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:57:15.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:57:15.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:15.308 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:15.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:15.308 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:57:15.308 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:15.308 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:57:15.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:15.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:57:15.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:57:15.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:57:15.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:57:15.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:57:15.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:57:15.315 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:57:15.315 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:15.320 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:57:15.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:57:15.840 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:57:15.841 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:57:15.843 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:57:15.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:57:15.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:15.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:15.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:15.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:15.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:15.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:15.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:15.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:15.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:15.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:15.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:15.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:15.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:15.883 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:57:15.883 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:15.883 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:15.883 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:57:20.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:20.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:20.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:20.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:20.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:20.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:20.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:20.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:20.895 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:20.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:20.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:57:20.898 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:57:20.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:57:20.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:20.899 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:20.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:20.899 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:57:20.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:20.900 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:57:20.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:20.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:57:20.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:57:20.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:20.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:20.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:20.904 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:57:20.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:20.904 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:57:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:20.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:57:20.907 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:57:20.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:20.907 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:20.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:20.907 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:57:20.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:20.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:57:20.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:20.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:57:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:57:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:57:20.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:57:20.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:57:20.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:57:20.913 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:57:20.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:20.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:20.918 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:57:21.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:57:21.447 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:57:21.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:57:21.451 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:57:21.453 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:57:21.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:21.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:21.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:21.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:21.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:21.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:21.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:21.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:21.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:21.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:21.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:21.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:21.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:21.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:21.509 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:57:21.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:21.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:26.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:26.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:26.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:26.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:26.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:26.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:26.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:26.522 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:26.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:26.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:26.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:57:26.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:57:26.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:57:26.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:26.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:26.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:26.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:57:26.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:26.529 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:57:26.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:26.531 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:57:26.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:57:26.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:26.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:26.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:26.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:57:26.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:26.533 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:57:26.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:26.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:57:26.535 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:57:26.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:26.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:26.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:26.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:57:26.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:26.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:57:26.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:26.540 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:57:26.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:57:26.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:57:26.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:57:26.540 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:57:26.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:57:26.541 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:57:26.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:26.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:57:27.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:57:27.071 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:57:27.074 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:57:27.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:57:27.076 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:57:27.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:27.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:27.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:27.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:27.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:27.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:27.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:27.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:27.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:27.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:27.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:27.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:27.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:27.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:27.118 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:57:27.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:27.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:32.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:57:32.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:57:32.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:32.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:32.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:32.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:32.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:57:32.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:32.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:32.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:57:32.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:57:32.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:57:32.137 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:57:32.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:32.137 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:32.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:57:32.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:57:32.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:57:32.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:57:32.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:32.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:57:32.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:57:32.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:32.140 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:32.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:57:32.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:57:32.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:57:32.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:57:32.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:32.142 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:57:32.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:57:32.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:57:32.145 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:57:32.145 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:57:32.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:57:32.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:57:32.150 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:57:32.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:57:32.671 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:57:32.673 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:57:32.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:57:32.676 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:57:32.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:57:32.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:57:32.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:57:32.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:57:32.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:57:32.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:57:32.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:57:32.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:57:33.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:57:33.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:33.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:33.570 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:57:34.044 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:57:34.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:34.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:34.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:34.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:34.516 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:57:34.988 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:57:35.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:35.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:35.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:35.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:35.459 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:57:35.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:57:36.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:36.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:36.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:36.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:36.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:57:36.877 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:57:37.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:57:37.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:57:37.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:57:37.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:57:37.350 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:57:37.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:57:38.295 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:57:38.766 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:57:39.239 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:57:39.712 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:57:40.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:57:40.654 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:57:41.125 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 01:57:41.599 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 01:57:42.071 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 01:57:42.543 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 01:57:43.014 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 01:57:43.488 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 01:57:43.960 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 01:57:44.432 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 01:57:44.903 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 01:57:45.377 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 01:57:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 01:57:46.321 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 01:57:46.792 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 01:57:47.265 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 01:57:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 01:57:48.210 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 01:57:48.681 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 01:57:49.154 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 01:57:49.627 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 01:57:50.099 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 01:57:50.570 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 01:57:51.042 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 01:57:51.515 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 01:57:51.987 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 01:57:52.459 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 01:57:52.932 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 01:57:53.404 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 01:57:53.877 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 01:57:54.350 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 01:57:54.823 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 01:57:55.295 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 01:57:55.768 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 01:57:56.241 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 01:57:56.713 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 01:57:57.184 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 01:57:57.657 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 01:57:58.129 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 01:57:58.601 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 01:57:59.072 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 01:57:59.546 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 01:58:00.017 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 01:58:00.489 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 01:58:00.961 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 01:58:01.434 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 01:58:01.906 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 01:58:02.378 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 01:58:02.849 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 01:58:03.322 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 01:58:03.795 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 01:58:04.267 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 01:58:04.738 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 01:58:05.211 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 01:58:05.684 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 01:58:06.156 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 01:58:06.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:58:06.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:58:06.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:06.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:06.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:06.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:06.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:06.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:06.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:06.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:06.171 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:58:06.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:06.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:11.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:11.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:11.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:11.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:11.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:11.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:11.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:11.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:11.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:11.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:11.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:58:11.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:58:11.190 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:58:11.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:11.190 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:11.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:11.191 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:58:11.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:11.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:58:11.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:11.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:58:11.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:58:11.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:11.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:11.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:11.195 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:58:11.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:11.195 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:58:11.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:11.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:58:11.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:58:11.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:11.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:11.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:11.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:58:11.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:11.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:58:11.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:11.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:58:11.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:58:11.202 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:58:11.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:11.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:58:11.684 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:58:11.727 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:58:11.729 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:58:11.731 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:58:11.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:58:12.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:12.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:12.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:12.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:12.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:58:13.102 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:58:13.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:13.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:13.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:13.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:13.574 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:58:14.050 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:58:14.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:14.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:14.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:14.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:14.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:58:14.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:14.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:14.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:14.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:14.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:14.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:14.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:14.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:14.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:14.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:14.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:14.755 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:58:19.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:19.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:19.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:19.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:19.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:19.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:19.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:19.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:19.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:19.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:19.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:58:19.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:58:19.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:58:19.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:19.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:19.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:58:19.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:19.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:19.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:58:19.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:19.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:58:19.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:58:19.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:19.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:19.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:19.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:58:19.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:19.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:58:19.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:19.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:58:19.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:58:19.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:19.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:19.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:19.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:58:19.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:19.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:58:19.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:58:19.788 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:58:19.788 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:58:19.788 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:19.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:19.792 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:58:20.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:58:20.311 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:58:20.312 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:58:20.312 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:58:20.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:20.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:58:20.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:20.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:20.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:20.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:21.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:58:21.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:58:21.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:21.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:21.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:21.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:22.163 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:58:22.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:58:22.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:22.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:22.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:22.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:23.108 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:58:23.583 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:58:23.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:23.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:23.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:23.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:24.055 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:58:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:58:24.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:24.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:24.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:24.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:25.002 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:58:25.478 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:58:25.949 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:26.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:26.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:26.327 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:58:26.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:26.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:31.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:31.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:31.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:31.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:31.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:31.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:31.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:31.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:31.342 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:31.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:31.342 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:58:31.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:58:31.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:58:31.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:31.347 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:31.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:31.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:58:31.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:31.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:58:31.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:31.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:58:31.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:58:31.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:31.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:31.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:31.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:58:31.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:31.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:58:31.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:31.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:58:31.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:58:31.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:31.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:31.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:31.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:58:31.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:31.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:58:31.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:58:31.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:58:31.356 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:58:31.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:58:31.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:58:31.885 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:58:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:31.888 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:58:31.891 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:58:32.308 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:58:32.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:32.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:32.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:32.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:32.780 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:58:33.253 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:58:33.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:33.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:33.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:33.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:33.725 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:58:34.196 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:58:34.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:34.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:34.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:34.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:34.668 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:58:35.143 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:58:35.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:35.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:35.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:35.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:58:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:58:36.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:36.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:36.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:36.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:36.561 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:58:37.033 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:58:37.508 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:58:37.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:37.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:37.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:37.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:37.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:37.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:37.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:37.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:37.905 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:58:37.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:37.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:37.905 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:37.905 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:37.905 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:37.905 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:37.905 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:37.906 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:37.906 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:58:42.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:42.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:42.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:42.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:42.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:42.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:42.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:42.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:42.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:42.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:42.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:58:42.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:58:42.925 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:58:42.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:42.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:42.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:42.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:58:42.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:42.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:58:42.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:42.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:42.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:58:42.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:42.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:42.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:58:42.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:58:42.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:58:42.933 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:58:42.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:42.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:58:43.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:58:43.458 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:58:43.460 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:58:43.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:43.463 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:58:43.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:58:43.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:43.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:43.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:43.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:44.362 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:58:44.834 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:58:44.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:58:45.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:58:45.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:45.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:45.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:45.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:46.253 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:58:46.728 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:58:46.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:46.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:46.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:46.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:47.200 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:58:47.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:58:47.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:47.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:47.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:47.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:48.146 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:58:48.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:58:49.093 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:58:49.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:49.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:49.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:49.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:49.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:49.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:49.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:49.479 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:58:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:54.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:58:54.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:58:54.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:54.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:54.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:54.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:54.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:58:54.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:54.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:54.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:58:54.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:58:54.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:58:54.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:58:54.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:54.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:54.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:58:54.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:58:54.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:58:54.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:58:54.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:54.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:58:54.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:58:54.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:54.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:54.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:58:54.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:58:54.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:58:54.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:58:54.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:54.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:58:54.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:58:54.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:54.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:58:54.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:58:54.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:58:54.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:58:54.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:58:54.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:58:54.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:58:54.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:58:54.517 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:58:54.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:58:54.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:58:54.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:58:54.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:58:55.052 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:58:55.055 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:58:55.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:55.057 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:58:55.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:58:55.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:55.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:55.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:55.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:55.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:58:56.417 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:58:56.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:56.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:56.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:56.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:56.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:58:57.364 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:58:57.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:57.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:57.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:57.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:57.838 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:58:58.310 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:58:58.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:58.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:58.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:58.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:58.782 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:58:59.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:58:59.257 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:58:59.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:58:59.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:58:59.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:58:59.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:58:59.729 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:59:00.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:59:00.676 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:59:01.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:59:01.623 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 01:59:02.099 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 01:59:02.571 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 01:59:03.046 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 01:59:03.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:03.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:03.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:03.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:03.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:03.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:03.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:03.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:03.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:03.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:03.088 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:03.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:08.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:08.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:08.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:08.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:08.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:08.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:08.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:08.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:08.107 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:08.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:08.107 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:08.109 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:08.109 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:08.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:08.110 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:08.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:08.110 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:08.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:08.110 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:08.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:08.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:08.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:08.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:08.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:08.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:08.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:08.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:08.112 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:08.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:08.113 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:08.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:08.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:08.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:08.115 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:08.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:08.120 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:08.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:08.639 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:08.641 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:08.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:08.643 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:09.070 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:59:09.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:09.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:09.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:09.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:09.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:59:10.016 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:59:10.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:10.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:10.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:10.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:10.488 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:59:10.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:59:11.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:11.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:11.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:11.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:11.434 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:59:11.906 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:59:12.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:12.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:12.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:12.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:59:12.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:12.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:12.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:12.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:12.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:12.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:12.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:12.661 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:12.662 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=981 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:17.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:17.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:17.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:17.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:17.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:17.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:17.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:17.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:17.675 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:17.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:17.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:17.677 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:17.677 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:17.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:17.677 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:17.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:17.677 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:17.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:17.678 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:17.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:17.679 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:17.679 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:17.680 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:17.680 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:17.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:17.680 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:17.680 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:17.680 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:17.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:17.682 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:17.682 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:17.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:17.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:17.686 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:17.686 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:17.686 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:17.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:17.690 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:18.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:18.213 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:18.215 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:18.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:18.217 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:18.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:18.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:18.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:18.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:18.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:18.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:18.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:18.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:18.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:18.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:18.237 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:18.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:18.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:18.238 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:18.238 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:18.238 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:23.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:23.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:23.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:23.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:23.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:23.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:23.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:23.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:23.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:23.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:23.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:23.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:23.253 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:23.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:23.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:23.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:23.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:23.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:23.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:23.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:23.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:23.257 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:23.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:23.257 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:23.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:23.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:23.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:23.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:23.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:23.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:23.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:23.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:23.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:23.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:23.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:23.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:23.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:23.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:23.264 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:23.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:23.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:23.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:23.787 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:23.789 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:23.792 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:23.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:23.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:23.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:23.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:23.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:23.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:23.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:23.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:23.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:23.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:23.810 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:23.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:23.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:28.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:28.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:28.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:28.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:28.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:28.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:28.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:28.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:28.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:28.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:28.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:28.848 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:28.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:28.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:28.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:28.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:28.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:28.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:28.852 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:28.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:28.855 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:28.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:28.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:28.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:28.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:28.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:28.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:28.858 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:28.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:28.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:28.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:28.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:28.861 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:28.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:28.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:28.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:28.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:28.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:28.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:28.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:28.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:28.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:28.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:28.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:28.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:28.866 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:28.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:28.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:29.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:29.396 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:29.399 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:29.401 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:29.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:29.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:29.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:29.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:29.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:29.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:29.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:29.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:29.413 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:29.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:29.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:29.414 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 01:59:34.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:34.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:34.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:34.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:34.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:34.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:34.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:34.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:34.429 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:34.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:34.430 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:34.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:34.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:34.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:34.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:34.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:34.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:34.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:34.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:34.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:34.442 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:34.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:34.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:34.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:34.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:34.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:34.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:34.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:34.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:34.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:34.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:34.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:34.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:34.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:34.448 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:34.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:34.448 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:34.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.452 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:34.452 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:34.452 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:34.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:34.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:34.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:34.457 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:34.931 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:34.982 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:34.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:34.985 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:34.987 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:34.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:59:34.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:59:34.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:59:34.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:34.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:59:34.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:59:34.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:59:34.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:59:35.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:59:35.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:35.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:35.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:35.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:35.875 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:59:36.348 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:59:36.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:36.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:36.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:36.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:36.820 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:59:37.292 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:59:37.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:37.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:37.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:37.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:37.763 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:59:38.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:59:38.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:59:38.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:38.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:38.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:59:38.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:59:38.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:38.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:38.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:38.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:38.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:38.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:38.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:38.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:38.101 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:43.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:43.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:43.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:43.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:43.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:43.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:43.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:43.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:43.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:43.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:43.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:43.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:43.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:43.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:43.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:43.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:43.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:43.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:43.126 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:43.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:43.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:43.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:43.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:43.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:43.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:43.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:43.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:43.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:43.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:43.135 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:43.135 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:43.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:43.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:43.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:43.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:43.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:43.136 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:43.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:43.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:43.141 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:43.141 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:43.141 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:43.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:43.146 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:43.624 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:43.671 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:43.674 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:43.675 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:43.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:43.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:59:43.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:59:43.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:59:43.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:43.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:59:43.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:59:43.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:59:43.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:59:44.097 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:59:44.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:44.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:44.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:44.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:44.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:59:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:59:45.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:45.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:45.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:45.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:45.513 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:59:45.986 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:59:46.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:46.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:46.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:46.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:46.456 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:59:46.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:59:46.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:59:46.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:46.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:59:47.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:47.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:47.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:47.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:47.402 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:59:47.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:59:47.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:59:47.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:47.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:47.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:47.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:47.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:47.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:47.424 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 01:59:47.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:47.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:52.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 01:59:52.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 01:59:52.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:52.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:52.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:52.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:52.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 01:59:52.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:52.437 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:52.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 01:59:52.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 01:59:52.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 01:59:52.441 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 01:59:52.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:52.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:52.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 01:59:52.442 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 01:59:52.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 01:59:52.442 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 01:59:52.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:52.445 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 01:59:52.445 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 01:59:52.445 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:52.445 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:52.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 01:59:52.445 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 01:59:52.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 01:59:52.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 01:59:52.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:52.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 01:59:52.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 01:59:52.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:52.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 01:59:52.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 01:59:52.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 01:59:52.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 01:59:52.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 01:59:52.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 01:59:52.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 01:59:52.453 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 01:59:52.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 01:59:52.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 01:59:52.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 01:59:52.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 01:59:52.982 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 01:59:52.983 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 01:59:52.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 01:59:52.984 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 01:59:52.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 01:59:52.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 01:59:52.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 01:59:52.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:52.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:59:52.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:59:52.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 01:59:52.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 01:59:53.406 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 01:59:53.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:53.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:53.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:53.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:53.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 01:59:54.351 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 01:59:54.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:54.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:54.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:54.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:54.823 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 01:59:55.295 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 01:59:55.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:55.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:55.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:55.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:55.766 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 01:59:56.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 01:59:56.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 01:59:56.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:56.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 01:59:56.239 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 01:59:56.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:56.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:56.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:56.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:56.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 01:59:57.184 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 01:59:57.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 01:59:57.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 01:59:57.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 01:59:57.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 01:59:57.655 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 01:59:58.128 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 01:59:58.600 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 01:59:59.073 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 01:59:59.546 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:00:00.018 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:00:00.490 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:00:00.961 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:00:01.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:01.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:01.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:01.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:01.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:01.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:01.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:01.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:01.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:01.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:01.073 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:01.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:06.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:06.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:06.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:06.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:06.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:06.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:06.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:06.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:06.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:06.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:06.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:00:06.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:00:06.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:00:06.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:06.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:06.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:06.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:00:06.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:06.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:00:06.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:06.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:00:06.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:00:06.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:06.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:06.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:06.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:00:06.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:06.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:00:06.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:06.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:00:06.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:00:06.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:06.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:06.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:06.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:00:06.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:06.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:00:06.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:06.099 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:00:06.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:00:06.100 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:00:06.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:06.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:06.105 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:00:06.583 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:00:06.621 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:00:06.622 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:00:06.623 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:00:06.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:06.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:06.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:06.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:00:06.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:06.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:06.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:06.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:00:06.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:00:07.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:00:07.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:07.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:07.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:07.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:07.526 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:00:07.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:00:08.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:08.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:08.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:08.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:08.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:00:08.942 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:00:09.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:09.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:09.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:09.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:09.414 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:00:09.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:09.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:09.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:09.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:09.886 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:00:10.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:10.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:10.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:10.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:10.360 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:00:10.832 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:00:11.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:11.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:11.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:11.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:11.304 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:00:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:00:12.249 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:00:12.721 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:00:13.193 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:00:13.667 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:00:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:00:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:00:14.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:14.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:14.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:14.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:14.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:14.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:14.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:14.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:14.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:14.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:14.721 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:00:14.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:14.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:14.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:19.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:19.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:19.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:19.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:19.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:19.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:19.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:19.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:19.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:19.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:19.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:00:19.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:00:19.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:00:19.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:19.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:19.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:19.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:00:19.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:19.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:00:19.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:19.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:00:19.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:00:19.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:19.747 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:19.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:19.747 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:00:19.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:19.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:00:19.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:19.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:00:19.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:00:19.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:19.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:19.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:19.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:00:19.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:19.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:00:19.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:00:19.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:00:19.757 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:00:19.757 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:00:19.757 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:19.762 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:00:20.240 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:00:20.284 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:00:20.286 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:00:20.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:20.288 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:00:20.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:20.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:20.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:00:20.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:20.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:20.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:20.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:00:20.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:00:20.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:00:20.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:20.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:20.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:20.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:21.183 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:00:21.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:00:21.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:21.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:21.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:21.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:22.129 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:00:22.601 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:00:22.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:22.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:22.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:22.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:23.072 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:00:23.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:23.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:23.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:23.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:23.546 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:00:23.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:23.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:23.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:23.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:24.018 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:00:24.490 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:00:24.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:24.961 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:00:25.435 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:00:25.907 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:00:26.379 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:00:26.850 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:00:27.321 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:00:27.794 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:00:28.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:00:28.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:28.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:28.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:28.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:28.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:28.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:28.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:28.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:28.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:28.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:28.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:28.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:28.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:28.378 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:00:28.378 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:28.378 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:28.378 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:28.378 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:28.378 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:28.378 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:33.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:33.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:33.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:33.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:33.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:33.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:33.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:33.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:33.397 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:33.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:33.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:00:33.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:00:33.400 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:00:33.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:33.400 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:33.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:33.401 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:00:33.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:33.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:00:33.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:33.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:00:33.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:00:33.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:33.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:33.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:33.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:00:33.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:33.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:00:33.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:33.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:00:33.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:00:33.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:33.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:33.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:33.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:00:33.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:33.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:00:33.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:00:33.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:00:33.409 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:00:33.409 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:33.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:00:33.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:00:33.928 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:00:33.929 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:00:33.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:33.929 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:00:33.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:33.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:33.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:00:33.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:33.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:33.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:33.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:00:33.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:00:33.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:33.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:34.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:00:34.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:34.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:34.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:00:35.305 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:00:35.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:35.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:35.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:35.776 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:00:36.250 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:00:36.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:36.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:36.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:36.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:36.722 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:00:37.193 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:00:37.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:37.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:37.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:37.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:37.665 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:00:38.138 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:00:38.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:38.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:38.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:38.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:38.610 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:00:38.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:38.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:38.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:38.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:38.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:38.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:38.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:38.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:38.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:38.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:38.996 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:00:38.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:38.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:44.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:44.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:44.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:44.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:44.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:44.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:44.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:44.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:44.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:00:44.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:00:44.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:00:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:44.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:44.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:44.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:00:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:44.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:00:44.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:44.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:00:44.025 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:00:44.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:44.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:44.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:44.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:00:44.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:44.025 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:00:44.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:44.029 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:00:44.029 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:00:44.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:44.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:44.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:44.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:00:44.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:44.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:00:44.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:00:44.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:00:44.036 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:00:44.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:44.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:00:44.518 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:00:44.567 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:00:44.569 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:00:44.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:44.572 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:00:44.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:44.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:44.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:00:44.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:44.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:44.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:44.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:00:44.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:00:44.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:00:45.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:45.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:45.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:45.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:45.462 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:00:45.935 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:00:46.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:46.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:46.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:46.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:46.407 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:00:46.879 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:00:47.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:00:47.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:47.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:47.821 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:00:48.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:48.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:48.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:48.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:48.295 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:00:48.767 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:00:49.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:49.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:49.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:49.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:49.239 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:00:49.710 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:00:50.183 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:00:50.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:50.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:50.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:50.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:50.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:50.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:50.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:50.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:50.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:50.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:50.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:50.237 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:00:50.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:50.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:55.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:55.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:55.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:55.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:55.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:55.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:55.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:55.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:55.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:55.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:00:55.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:00:55.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:00:55.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:00:55.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:55.256 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:55.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:55.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:00:55.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:00:55.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:00:55.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:55.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:00:55.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:00:55.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:55.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:55.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:55.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:00:55.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:00:55.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:00:55.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:55.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:00:55.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:00:55.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:00:55.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:00:55.264 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:00:55.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:00:55.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:00:55.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:00:55.784 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:00:55.785 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:00:55.786 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:00:55.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:55.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:55.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:55.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:00:55.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:00:55.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:00:55.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:00:55.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:00:55.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:00:56.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:00:56.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:56.690 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:00:57.164 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:00:57.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:57.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:57.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:57.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:57.636 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:00:58.108 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:00:58.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:58.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:58.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:58.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:58.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:00:58.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:00:58.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:00:58.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:00:58.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:00:58.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:00:58.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:00:58.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:00:58.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:00:58.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:00:58.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:00:58.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:00:58.901 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:00:58.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:00:58.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:00:58.901 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:03.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:03.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:03.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:03.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:03.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:03.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:03.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:03.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:03.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:03.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:03.916 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:01:03.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:01:03.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:01:03.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:03.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:03.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:03.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:01:03.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:03.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:01:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:03.925 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:01:03.925 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:01:03.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:03.925 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:03.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:03.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:01:03.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:03.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:01:03.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:03.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:01:03.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:01:03.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:03.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:03.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:01:03.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:03.931 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:01:03.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:01:03.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:01:03.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:01:03.937 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:01:03.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:03.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:01:04.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:01:04.463 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:01:04.466 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:01:04.468 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:04.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:04.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:04.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:04.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:01:04.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:04.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:04.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:04.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:01:04.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:01:04.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:01:04.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:04.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:04.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:05.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:01:05.837 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:01:05.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:05.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:05.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:05.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:06.309 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:01:06.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:01:06.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:06.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:06.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:06.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:07.252 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:01:07.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:07.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:07.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:07.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:07.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:07.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:07.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:07.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:07.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:07.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:07.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:07.573 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:01:07.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:07.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:07.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:07.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:07.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:07.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:07.574 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:07.574 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:07.574 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:12.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:12.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:12.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:12.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:12.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:12.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:12.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:12.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:12.589 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:12.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:12.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:01:12.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:01:12.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:01:12.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:12.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:12.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:12.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:01:12.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:12.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:01:12.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:12.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:01:12.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:01:12.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:12.599 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:12.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:12.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:01:12.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:12.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:01:12.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:12.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:01:12.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:01:12.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:12.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:12.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:12.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:01:12.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:12.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:01:12.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:01:12.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:01:12.607 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:01:12.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:12.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:01:13.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:01:13.137 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:01:13.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:13.140 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:01:13.142 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:13.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:13.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:13.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:01:13.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:13.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:13.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:13.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:01:13.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:01:13.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:13.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:13.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:13.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:13.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:13.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:13.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:13.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:13.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:13.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:13.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:13.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:13.415 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:01:13.415 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:13.415 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:13.415 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:13.415 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:13.415 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:13.415 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:18.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:18.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:18.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:18.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:18.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:18.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:18.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:18.429 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:01:18.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:01:18.431 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:01:18.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:18.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:18.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:18.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:01:18.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:18.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:01:18.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:18.433 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:01:18.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:01:18.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:18.434 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:18.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:18.434 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:01:18.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:18.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:01:18.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:18.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:18.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:01:18.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:01:18.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:01:18.439 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:01:18.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:18.443 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:01:18.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:01:18.963 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:01:18.964 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:01:18.965 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:18.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:18.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:18.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:18.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:01:18.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:18.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:18.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:18.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:01:18.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:01:19.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:19.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:19.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:19.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:19.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:19.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:19.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:19.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:19.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:19.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:19.198 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:01:19.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:19.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:19.198 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:24.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:24.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:24.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:24.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:24.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:24.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:24.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:24.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:24.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:24.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:24.213 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:01:24.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:01:24.217 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:01:24.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:24.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:24.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:24.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:01:24.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:24.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:01:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:24.220 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:01:24.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:01:24.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:24.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:24.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:24.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:01:24.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:24.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:01:24.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:24.224 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:24.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:01:24.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:01:24.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:01:24.228 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:01:24.228 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:01:24.228 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:24.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:24.232 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:01:24.711 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:01:24.751 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:01:24.753 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:01:24.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:24.755 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:24.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:24.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:24.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:01:24.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:24.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:24.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:24.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:01:24.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:01:25.183 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:01:25.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:25.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:25.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:25.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:01:26.125 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:01:26.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:26.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:26.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:26.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:26.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:01:27.066 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:01:27.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:27.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:27.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:27.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:27.537 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:01:28.011 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:01:28.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:28.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:28.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:28.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:28.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:01:28.955 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:01:29.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:29.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:29.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:29.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:29.426 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:01:29.897 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:01:30.369 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:01:30.842 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:01:31.314 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:01:31.785 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:01:32.259 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:01:32.731 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:01:33.203 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:01:33.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:33.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:33.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:33.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:33.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:33.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:33.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:33.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:33.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:33.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:33.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:33.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:33.568 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:01:38.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:38.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:38.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:38.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:38.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:38.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:38.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:38.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:38.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:38.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:38.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:01:38.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:01:38.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:01:38.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:38.586 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:38.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:38.587 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:01:38.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:38.587 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:01:38.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:38.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:01:38.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:01:38.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:38.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:38.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:38.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:01:38.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:38.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:01:38.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:38.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:38.591 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:01:38.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:01:38.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:01:38.594 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:01:38.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:38.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:01:39.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:01:39.119 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:01:39.121 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:01:39.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:39.125 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:39.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:39.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:39.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:01:39.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:39.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:39.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:39.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:01:39.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:01:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:01:39.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:39.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:39.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:39.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:40.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:01:40.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:01:40.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:40.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:40.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:40.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:40.965 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:01:41.437 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:01:41.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:41.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:41.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:41.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:41.908 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:01:42.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:01:42.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:42.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:42.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:42.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:42.852 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:01:43.324 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:01:43.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:43.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:43.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:43.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:43.797 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:01:44.268 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:01:44.741 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:01:45.213 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:01:45.685 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:01:46.156 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:01:46.630 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:01:47.102 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:01:47.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:01:47.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:47.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:47.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:47.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:47.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:47.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:47.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:47.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:47.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:47.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:47.943 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:01:47.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:47.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:47.943 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:47.943 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:47.944 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:47.944 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:47.944 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:47.944 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:47.944 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:01:52.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:52.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:52.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:52.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:52.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:52.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:52.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:52.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:52.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:52.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:01:52.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:01:52.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:01:52.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:01:52.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:52.958 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:52.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:52.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:01:52.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:01:52.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:01:52.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:52.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:01:52.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:01:52.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:52.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:52.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:52.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:01:52.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:01:52.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:01:52.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:52.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:01:52.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:01:52.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:52.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:01:52.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:01:52.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:01:52.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:01:52.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:01:52.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:01:52.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:01:52.969 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:01:52.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:01:52.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:01:53.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:01:53.495 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:01:53.497 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:01:53.499 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:53.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:53.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:53.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:53.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:01:53.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:53.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:53.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:53.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:01:53.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:01:53.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:01:53.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:53.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:53.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:53.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:54.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:01:54.868 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:01:54.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:54.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:54.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:54.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:55.340 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:01:55.812 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:01:55.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:55.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:55.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:55.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:56.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:01:56.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:01:56.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:01:56.567 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:56.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:01:56.614 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.655 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.692 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.733 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:01:56.775 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.812 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.853 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.895 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.932 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.973 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:56.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:56.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:56.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:56.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:57.015 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:57.052 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:01:57.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:01:57.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:01:57.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:01:57.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:01:57.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:01:57.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:01:57.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:01:57.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:01:57.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:01:57.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:01:57.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:01:57.101 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:01:57.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:01:57.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:02.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:02.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:02.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:02.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:02.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:02.158 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:02.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:02.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:02.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:02.159 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:02.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:02.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:02.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:02.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:02.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:02.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:02.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:02.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:02.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:02.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:02.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:02.162 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:02.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:02.164 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:02.164 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:02.164 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:02.169 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:02.633 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:02.678 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:02.679 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:02.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:02.679 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:02.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:02.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:02.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:02.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:02.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:02.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:02.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:02.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:02.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:02.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:02.717 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:02.717 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:02.717 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:02.717 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:02.717 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:02.717 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:02.717 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:02.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:07.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:07.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:07.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:07.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:07.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:07.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:07.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:07.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:07.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:07.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:07.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:07.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:07.724 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:07.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:07.724 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:07.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:07.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:07.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:07.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:07.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:07.725 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:07.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:07.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:07.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:07.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:07.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:07.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:07.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:07.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:07.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:07.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:07.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:07.728 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:07.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:07.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:07.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:07.728 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:07.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:07.729 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:07.729 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:07.729 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:07.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:07.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:08.210 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:08.252 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:08.253 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:08.255 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:08.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:08.682 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:02:08.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:08.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:08.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:08.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:09.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:02:09.616 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:02:09.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:09.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:09.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:09.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:10.082 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:02:10.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:02:10.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:10.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:10.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:10.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:11.028 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:02:11.503 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:02:11.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:11.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:11.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:11.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:11.975 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:02:12.448 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:02:12.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:12.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:12.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:12.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:12.916 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:02:13.386 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:02:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:02:14.324 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:02:14.792 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:02:15.257 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:02:15.723 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:02:16.196 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:02:16.659 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:02:17.121 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:02:17.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:17.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:17.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:17.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:17.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:17.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:17.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:17.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:17.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:17.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:17.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:17.272 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:22.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:22.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:22.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:22.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:22.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:22.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:22.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:22.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:22.277 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:22.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:22.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:22.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:22.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:22.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:22.281 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:22.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:22.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:22.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:22.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:22.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:22.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:22.287 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:22.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:22.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:22.291 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:22.757 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:22.798 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:22.799 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:22.799 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:22.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:23.223 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:02:23.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:23.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:23.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:23.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:23.687 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:02:24.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:02:24.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:24.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:24.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:24.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:24.621 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:02:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:02:25.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:25.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:25.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:25.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:25.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:02:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:02:26.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:26.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:26.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:26.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:26.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:02:26.955 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:02:27.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:27.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:27.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:02:27.888 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:02:28.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:02:28.822 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:02:29.289 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:02:29.756 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:02:30.223 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:02:30.688 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:02:31.154 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:02:31.616 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:02:31.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:31.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:31.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:31.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:31.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:31.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:31.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:31.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:31.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:31.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:31.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:31.812 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:36.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:36.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:36.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:36.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:36.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:36.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:36.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:36.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:36.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:36.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:36.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:36.826 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:36.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:36.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:36.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:36.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:36.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:36.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:36.827 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:36.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:36.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:36.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:36.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:36.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:36.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:36.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:36.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:36.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:36.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:36.833 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:36.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:36.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:36.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:36.837 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:36.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:36.842 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:37.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:37.354 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:37.355 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:37.355 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:37.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:37.775 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:02:37.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:37.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:37.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:37.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:38.240 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:02:38.707 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:02:38.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:38.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:38.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:38.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:39.172 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:02:39.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:02:39.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:39.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:39.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:39.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:40.107 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:02:40.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:40.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:40.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:40.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:40.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:40.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:40.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:40.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:40.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:40.379 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:40.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:40.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:40.379 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:45.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:45.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:45.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:45.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:45.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:45.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:45.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:45.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:45.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:45.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:45.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:45.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:45.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:45.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:45.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:45.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:45.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:45.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:45.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:45.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:45.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:45.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:45.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:45.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:45.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:45.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:45.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:45.396 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:45.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:45.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:45.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:45.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:45.911 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:45.912 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:45.913 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:45.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:45.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:02:45.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:02:45.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:02:45.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:02:45.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:02:45.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:02:45.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:02:45.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:02:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:45.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:02:45.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:02:45.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:02:45.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:02:46.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:02:46.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:46.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:02:46.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:02:46.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:02:46.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:46.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:46.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:46.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:46.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:46.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:46.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:46.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:46.374 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:46.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:46.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:46.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:51.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:51.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:51.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:51.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:51.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:51.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:51.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:51.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:51.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:51.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:51.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:51.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:51.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:51.386 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:51.386 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:51.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:51.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:51.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:51.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:51.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:51.390 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:51.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:51.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:51.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:51.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:51.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:51.913 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:51.916 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:51.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:51.918 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:51.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:51.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:51.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:51.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:51.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:51.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:51.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:51.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:51.935 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:51.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:51.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:51.935 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.935 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.936 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.936 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.936 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.936 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:51.936 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:02:56.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:56.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:56.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:56.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:56.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:56.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:56.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:02:56.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:02:56.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:02:56.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:02:56.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:56.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:56.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:56.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:02:56.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:02:56.951 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:02:56.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:56.952 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:02:56.952 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:02:56.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:56.953 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:56.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:56.953 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:02:56.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:02:56.953 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:02:56.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:56.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:02:56.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:02:56.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:56.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:02:56.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:02:56.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:02:56.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:02:56.956 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:02:56.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:56.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:02:56.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:02:56.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:02:56.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:02:56.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:02:56.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:02:56.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:02:56.959 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:02:56.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:02:56.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:02:56.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:02:57.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:02:57.481 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:02:57.482 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:02:57.483 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:02:57.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:02:57.914 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:02:57.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:57.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:57.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:57.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:58.384 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:02:58.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:02:58.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:58.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:58.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:58.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:59.329 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:02:59.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:02:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:02:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:02:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:02:59.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:02:59.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:02:59.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:02:59.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:02:59.502 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:02:59.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:02:59.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:04.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:04.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:04.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:04.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:04.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:04.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:04.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:04.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:04.511 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:04.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:04.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:04.512 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:04.512 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:04.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:04.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:04.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:04.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:04.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:04.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:04.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:04.514 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:04.514 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:04.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:04.515 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:04.515 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:04.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:04.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:04.517 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:04.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:04.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:05.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:05.046 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:05.048 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:05.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:05.051 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:05.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:05.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:05.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:03:05.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:03:05.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:03:05.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:03:05.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:03:05.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:03:05.473 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:05.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:05.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:05.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:05.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:06.417 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:06.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:06.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:06.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:06.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:06.889 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:03:07.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:07.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:07.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:07.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:07.832 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:03:07.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:07.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:07.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:07.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:07.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:07.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:07.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:07.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:07.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:07.858 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:12.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:12.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:12.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:12.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:12.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:12.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:12.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:12.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:12.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:12.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:12.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:12.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:12.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:12.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:12.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:12.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:12.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:12.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:12.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:12.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:12.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:12.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:12.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:12.882 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:12.882 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:12.882 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:12.882 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:12.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:12.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:12.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:12.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:12.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:12.884 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:12.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:12.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:12.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:12.884 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:12.885 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:12.885 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:12.885 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:12.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:13.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:13.409 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:13.411 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:13.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:13.413 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:13.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:13.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:13.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:03:13.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:03:13.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:03:13.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:03:13.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:03:13.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:03:13.840 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:13.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:13.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:13.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:13.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:14.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:14.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:14.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:14.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:14.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:14.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:15.257 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:15.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:15.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:15.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:15.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:15.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:15.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:15.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:15.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:15.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:15.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:15.518 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:15.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:15.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:20.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:20.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:20.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:20.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:20.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:20.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:20.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:20.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:20.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:20.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:20.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:20.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:20.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:20.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:20.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:20.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:20.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:20.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:20.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:20.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:20.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:20.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:20.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:20.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:20.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:20.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:20.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:20.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:20.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:20.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:20.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:20.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:20.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:20.549 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:20.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:20.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:20.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:21.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:21.073 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:21.076 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:21.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:21.078 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:21.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:21.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:21.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:03:21.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:03:21.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:03:21.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:03:21.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:03:21.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:03:21.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:21.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:21.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:21.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:21.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:21.975 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:22.448 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:22.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:22.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:22.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:22.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:23.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:03:23.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:23.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:23.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:23.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:23.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:03:23.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:23.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:23.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:23.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:23.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:23.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:23.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:23.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:23.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:23.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:23.893 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:23.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:23.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:28.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:28.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:28.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:28.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:28.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:28.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:28.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:28.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:28.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:28.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:28.908 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:28.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:28.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:28.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:28.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:28.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:28.912 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:28.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:28.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:28.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:28.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:28.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:28.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:28.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:28.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:28.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:28.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:28.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:28.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:28.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:28.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:28.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:28.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:28.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:28.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:28.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:28.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:28.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:28.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:28.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:28.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:28.921 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:28.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:28.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:29.404 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:29.450 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:29.452 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:29.454 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:29.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:29.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:29.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:03:29.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:03:29.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:03:29.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:03:29.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:03:29.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:03:29.876 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:29.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:29.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:29.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:29.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:30.347 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:30.818 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:30.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:30.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:30.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:30.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:31.291 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:31.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:31.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:31.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:31.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:31.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:31.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:31.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:31.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:31.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:31.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:31.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:31.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:31.541 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:36.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:36.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:36.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:36.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:36.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:36.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:36.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:36.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:36.554 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:36.554 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:36.554 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:36.558 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:36.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:36.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:36.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:36.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:36.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:36.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:36.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:36.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:36.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:36.562 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:36.562 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:36.562 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:36.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:36.563 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:36.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:36.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:36.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:36.566 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:36.566 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:36.566 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:36.566 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:36.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:36.566 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:36.567 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:36.567 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:36.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:36.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:36.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:36.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:36.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:36.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:36.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:36.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:36.570 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:36.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:36.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:36.575 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:37.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:37.092 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:37.094 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:37.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:37.095 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:37.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:37.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:37.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:03:37.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:03:37.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:03:37.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:03:37.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:03:37.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:03:37.525 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:37.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:37.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:37.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:37.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:37.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:38.467 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:38.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:38.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:38.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:38.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:38.941 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:39.413 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:03:39.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:39.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:39.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:39.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:39.885 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:03:40.359 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:03:40.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:40.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:40.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:40.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:40.831 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:03:40.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:40.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:40.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:40.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:40.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:40.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:40.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:40.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:40.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:40.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:40.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:40.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:40.857 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:45.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:45.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:45.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:45.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:45.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:45.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:45.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:45.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:45.867 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:45.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:45.868 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:45.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:45.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:45.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:45.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:45.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:45.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:45.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:45.869 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:45.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:45.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:45.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:45.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:45.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:45.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:45.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:45.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:45.873 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:45.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:45.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:45.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:46.356 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:46.401 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:46.404 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:46.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:46.406 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:46.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:46.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:46.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:03:46.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:03:46.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:03:46.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:03:46.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:03:46.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:03:46.828 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:46.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:47.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:47.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:47.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:47.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:47.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:47.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:48.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:48.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:03:48.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:48.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:48.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:48.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:49.188 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:03:49.662 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:03:49.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:49.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:49.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:49.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:50.134 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:03:50.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:03:50.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:03:50.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:50.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:50.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:50.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:50.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:50.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:50.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:50.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:50.400 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:50.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:50.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:50.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=977 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:03:55.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:55.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:55.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:55.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:55.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:55.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:55.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:55.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:55.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:55.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:03:55.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:03:55.413 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:03:55.413 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:03:55.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:55.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:55.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:55.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:03:55.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:03:55.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:03:55.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:55.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:03:55.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:03:55.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:55.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:55.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:55.416 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:03:55.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:03:55.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:03:55.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:55.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:03:55.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:03:55.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:55.419 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:03:55.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:03:55.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:03:55.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:03:55.419 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:03:55.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:55.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:03:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:03:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:03:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:03:55.421 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:03:55.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:03:55.422 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:03:55.422 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:03:55.422 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:03:55.427 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:03:55.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:03:55.949 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:03:55.952 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:03:55.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:03:55.952 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:03:56.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:03:56.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:56.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:56.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:56.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:56.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:03:57.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:03:57.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:57.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:57.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:57.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:57.799 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:03:57.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:03:57.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:03:57.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:03:57.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:03:57.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:03:57.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:03:57.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:03:57.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:03:57.967 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:03:57.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:03:57.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:02.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:02.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:02.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:02.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:02.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:02.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:02.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:02.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:02.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:02.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:02.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:02.985 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:02.985 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:02.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:02.985 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:02.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:02.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:02.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:02.986 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:02.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:02.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:02.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:02.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:02.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:02.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:02.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:02.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:02.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:02.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:02.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:02.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:02.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:02.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:02.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:02.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:02.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:02.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:02.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:02.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:02.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:02.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:02.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:02.996 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:02.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:02.997 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:02.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:03.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:03.480 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:03.523 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:03.525 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:03.526 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:03.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:03.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:04:03.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:04:03.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:04:03.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:03.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:03.952 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:04:04.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:04.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:04.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:04.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:04.428 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:04:04.899 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:04:05.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:05.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:05.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:05.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:05.374 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:04:05.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:04:06.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:06.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:06.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:06.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:06.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:04:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:06.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:06.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:06.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:06.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:06.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:06.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:06.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:06.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:06.587 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:06.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:06.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:11.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:11.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:11.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:11.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:11.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:11.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:11.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:11.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:11.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:11.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:11.604 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:11.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:11.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:11.607 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:11.607 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:11.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:11.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:11.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:11.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:11.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:11.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:11.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:11.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:11.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:11.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:11.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:11.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:11.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:11.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:11.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:11.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:11.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:11.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:11.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:11.612 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:11.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:11.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:11.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:11.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:11.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:11.616 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:11.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:11.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:11.620 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:12.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:12.141 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:12.143 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:12.145 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:12.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:12.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:04:12.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:04:12.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:04:12.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:12.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:12.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:12.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:12.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:12.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:12.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:12.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:12.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:12.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:12.194 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:12.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:12.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:12.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:17.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:17.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:17.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:17.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:17.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:17.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:17.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:17.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:17.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:17.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:17.208 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:17.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:17.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:17.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:17.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:17.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:17.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:17.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:17.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:17.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:17.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:17.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:17.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:17.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:17.221 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:17.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:17.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:17.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:17.747 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:17.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:17.751 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:17.753 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:17.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:04:17.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:04:17.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:04:17.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:17.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:18.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:04:18.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:18.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:18.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:18.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:18.649 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:04:19.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:04:19.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:19.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:19.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:19.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:04:20.067 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:04:20.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:20.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:20.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:20.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:20.539 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:04:20.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:20.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:20.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:20.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:20.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:20.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:20.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:20.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:20.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:20.818 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:25.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:25.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:25.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:25.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:25.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:25.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:25.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:25.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:25.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:25.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:25.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:25.831 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:25.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:25.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:25.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:25.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:25.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:25.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:25.837 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:25.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:25.837 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:25.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:25.837 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:25.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:25.837 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:25.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.841 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:25.841 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:25.841 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:25.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:25.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:25.846 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:26.324 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:26.371 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:26.374 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:26.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:26.377 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:26.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:04:26.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:04:26.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:04:26.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:26.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:26.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:26.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:26.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:26.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:26.431 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:26.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:31.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:31.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:31.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:31.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:31.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:31.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:31.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:31.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:31.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:31.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:31.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:31.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:31.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:31.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:31.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:31.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:31.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:31.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:31.458 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:31.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:31.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:31.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:31.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:31.462 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:31.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:31.462 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:31.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:31.463 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:31.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:31.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:31.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:31.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:31.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:31.465 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:31.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:31.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:31.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:31.469 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:31.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:31.470 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:31.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:31.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:31.953 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:31.996 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:31.998 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:31.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:31.999 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:32.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:32.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:32.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:32.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:32.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:32.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:32.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:32.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:32.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:32.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:32.017 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:32.017 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:32.017 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:32.017 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:32.017 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:32.017 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:32.018 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:32.018 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:37.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:37.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:37.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:37.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:37.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:37.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:37.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:37.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:37.028 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:37.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:37.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:37.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:37.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:37.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:37.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:37.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:37.033 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:37.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:37.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:37.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:37.035 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:37.035 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:37.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:37.037 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:37.037 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:37.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:37.037 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:37.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:37.038 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:37.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:37.038 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:37.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:37.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:37.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:37.041 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:37.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:37.523 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:37.571 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:37.574 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:37.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:37.576 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:37.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:37.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:37.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:37.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:37.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:37.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:37.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:37.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:37.588 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:37.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:37.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:42.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:42.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:42.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:42.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:42.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:42.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:42.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:42.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:42.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:42.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:42.603 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:42.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:42.609 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:42.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:42.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:42.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:42.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:42.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:42.609 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:42.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:42.613 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:42.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:42.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:42.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:42.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:42.614 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:42.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:42.614 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:42.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:42.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:42.618 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:42.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:42.618 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:42.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:42.618 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:42.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:42.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:42.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:42.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:42.625 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:43.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:43.155 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:43.157 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:43.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:43.159 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:43.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:43.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:43.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:43.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:43.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:43.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:43.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:43.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:43.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:43.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:43.174 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:43.175 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:48.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:48.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:48.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:48.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:48.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:48.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:48.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:48.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:48.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:48.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:48.190 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:48.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:48.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:48.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:48.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:48.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:48.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:48.193 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:48.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:48.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:48.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:48.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:48.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:48.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:48.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:48.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:48.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:48.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:48.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:48.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:48.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:48.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:48.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:48.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:48.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:48.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:48.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:48.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:48.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:48.206 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:48.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:48.690 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:48.731 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:48.733 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:48.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:48.735 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:48.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:48.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:48.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:48.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:48.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:48.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:48.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:48.754 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:48.754 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:04:53.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:53.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:53.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:53.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:53.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:53.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:53.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:53.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:53.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:53.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:04:53.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:04:53.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:04:53.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:04:53.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:53.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:53.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:53.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:04:53.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:04:53.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:04:53.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:53.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:04:53.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:04:53.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:53.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:04:53.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:04:53.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:53.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:04:53.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:04:53.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:04:53.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:04:53.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:04:53.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:53.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:04:53.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:04:53.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:04:53.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:04:53.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:04:53.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:04:53.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:04:53.776 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:04:53.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:04:54.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:04:54.300 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:04:54.302 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:04:54.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:54.306 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:04:54.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:04:54.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:54.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:54.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:54.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:55.205 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:04:55.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:04:55.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:55.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:55.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:55.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:56.149 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:04:56.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:04:56.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:56.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:56.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:56.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:57.095 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:04:57.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:04:57.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:04:57.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:04:57.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:04:57.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:04:57.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:04:57.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:04:57.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:04:57.567 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:04:57.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:57.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:57.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:57.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:58.038 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:04:58.511 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:04:58.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:58.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:58.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:58.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:58.984 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:04:59.457 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:04:59.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:04:59.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:04:59.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:04:59.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:04:59.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:04:59.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:04:59.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:04:59.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:04:59.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:04:59.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:04:59.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:04:59.588 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:04:59.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:04:59.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:04.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:04.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:04.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:04.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:04.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:04.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:04.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:04.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:04.601 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:04.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:04.601 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:04.603 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:04.604 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:04.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:04.604 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:04.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:04.605 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:04.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:04.605 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:04.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:04.606 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:04.606 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:04.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:04.607 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:04.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:04.607 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:04.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:04.607 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:04.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:04.609 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:04.609 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:04.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:04.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:04.614 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:04.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:04.618 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:05.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:05.145 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:05.147 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:05.148 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:05.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:05.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:05.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:05.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:05.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:05.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:05.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:05.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:05.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:05.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:05.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:05.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:05.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:05.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:05.180 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:05.180 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:10.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:10.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:10.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:10.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:10.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:10.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:10.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:10.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:10.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:10.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:10.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:10.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:10.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:10.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:10.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:10.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:10.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:10.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:10.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:10.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:10.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:10.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:10.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:10.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:10.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:10.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:10.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:10.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:10.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:10.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:10.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:10.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:10.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:10.201 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:10.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:10.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:10.206 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:10.683 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:10.723 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:10.723 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:10.723 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:10.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:10.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:10.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:10.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:10.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:10.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:10.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:10.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:10.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:10.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:10.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:10.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:10.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:10.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:10.752 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:15.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:15.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:15.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:15.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:15.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:15.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:15.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:15.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:15.767 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:15.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:15.767 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:15.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:15.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:15.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:15.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:15.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:15.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:15.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:15.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:15.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:15.772 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:15.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:15.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:15.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:15.774 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:15.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:15.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:15.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:15.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:15.777 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:15.777 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:15.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:15.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:15.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:15.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:16.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:16.297 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:16.299 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:16.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:16.302 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:16.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:16.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:16.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:16.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:16.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:16.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:16.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:16.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:16.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:16.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:16.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:16.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:16.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:16.362 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:16.363 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:21.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:21.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:21.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:21.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:21.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:21.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:21.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:21.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:21.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:21.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:21.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:21.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:21.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:21.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:21.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:21.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:21.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:21.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:21.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:21.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:21.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:21.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:21.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:21.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:21.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:21.409 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:21.409 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:21.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:21.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:21.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:21.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:21.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:21.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:21.411 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:21.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:21.411 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:21.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:21.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:21.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:21.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:21.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:21.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:21.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:21.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:21.416 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:21.416 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:21.421 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:21.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:21.943 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:21.945 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:21.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.947 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:21.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:21.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:21.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:21.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:21.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:21.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:21.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:21.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:21.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:21.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:21.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:21.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:21.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:21.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:21.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:21.989 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:21.990 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:26.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:26.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:26.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:26.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:26.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:26.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:27.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:27.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:27.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:27.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:27.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:27.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:27.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:27.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:27.005 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:27.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:27.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:27.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:27.006 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:27.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:27.007 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:27.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:27.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:27.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:27.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:27.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:27.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:27.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:27.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:27.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:27.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:27.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:27.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:27.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:27.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:27.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:27.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:27.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:27.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:27.012 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:27.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:27.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:27.535 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:27.537 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:27.540 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:27.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:27.542 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 02:05:27.542 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 200
2026-04-19 02:05:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 02:05:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:27.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:27.969 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:05:28.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:28.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:28.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:28.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:28.446 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:05:28.922 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:05:28.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:29.167 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 02:05:29.167 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 0
2026-04-19 02:05:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 02:05:29.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:29.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:29.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:29.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:29.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:29.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:29.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:29.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:29.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:29.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:29.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:29.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:29.174 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:29.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:29.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:34.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:34.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:34.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:34.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:34.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:34.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:34.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:34.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:34.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:34.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:34.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:34.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:34.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:34.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:34.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:34.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:34.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:34.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:34.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:34.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:34.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:34.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:34.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:34.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:34.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:34.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:34.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:34.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:34.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:34.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:34.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:34.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:34.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:34.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:34.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:34.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:34.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:34.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:34.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:34.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:34.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:34.211 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:34.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:34.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:34.747 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:34.749 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:34.752 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:34.754 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 02:05:34.754 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 200
2026-04-19 02:05:34.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 02:05:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:35.163 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:05:35.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:35.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:35.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:35.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:35.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:35.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:05:35.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:35.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:05:36.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.391 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 02:05:36.392 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 0
2026-04-19 02:05:36.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 02:05:36.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:36.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:36.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:36.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:36.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:36.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:36.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:36.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:36.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:36.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:36.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:36.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:36.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:36.403 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=474 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=474 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:36.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:41.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:41.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:41.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:41.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:41.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:41.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:41.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:41.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:41.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:41.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:41.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:41.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:41.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:41.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:41.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:41.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:41.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:41.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:41.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:41.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:41.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:41.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:41.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:41.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:41.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:41.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:41.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:41.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:41.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:41.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:41.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:41.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:41.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:41.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:41.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:41.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:41.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:41.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:41.430 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:41.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:41.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:41.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:41.910 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:41.955 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:41.956 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:41.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:41.958 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:41.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:41.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:41.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:41.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:41.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:41.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:41.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:41.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:41.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:41.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:41.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:41.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:41.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:41.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:41.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:41.995 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:41.995 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:46.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:46.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:46.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:46.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:46.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:46.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:47.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:47.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:47.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:47.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:47.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:47.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:47.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:47.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:47.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:47.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:47.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:47.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:47.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:47.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:47.014 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:47.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:47.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:47.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:47.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:47.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:47.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:47.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:47.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:47.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:47.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:47.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:47.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:47.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:47.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:47.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:47.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:47.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:47.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:47.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:47.021 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:47.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:47.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:47.505 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:47.546 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:47.548 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:47.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:47.550 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:47.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:47.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:47.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:47.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:47.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:47.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:47.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:47.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:47.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:47.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:47.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:47.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:47.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:47.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:47.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:47.612 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:47.612 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:05:52.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:05:52.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:05:52.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:52.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:52.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:52.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:52.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:05:52.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:52.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:52.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:05:52.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:05:52.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:05:52.633 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:05:52.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:52.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:52.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:05:52.634 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:05:52.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:05:52.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:05:52.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:52.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:05:52.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:05:52.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:52.639 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:52.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:05:52.639 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:05:52.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:05:52.639 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:05:52.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:52.642 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:05:52.643 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:05:52.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:52.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:05:52.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:05:52.643 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:05:52.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:05:52.643 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:05:52.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:52.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:05:52.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:05:52.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:05:52.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:05:52.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:05:52.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:05:52.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:05:52.648 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:05:52.648 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:05:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:05:52.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:05:53.131 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:05:53.181 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:05:53.184 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:05:53.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:53.186 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:05:53.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:53.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:53.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:53.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:53.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:53.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:05:53.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:05:53.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:53.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:53.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:53.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:53.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:53.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:53.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:53.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:53.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:53.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:53.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:53.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:05:53.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:05:53.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:53.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:53.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:53.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:53.602 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:05:53.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:53.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:53.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:53.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:54.074 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:05:54.546 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:05:54.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:54.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:54.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:54.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:55.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:05:55.492 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:05:55.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:55.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:55.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:55.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:55.965 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:05:56.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:56.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:56.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:56.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:56.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:56.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:56.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:56.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:56.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:05:56.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:05:56.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:56.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:56.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:56.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:56.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:56.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:56.437 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:05:56.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:56.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:56.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:56.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:56.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:56.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:05:56.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:05:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:56.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:56.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:56.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:56.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:56.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:56.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:56.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:56.910 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:05:57.383 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:05:57.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:05:57.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:05:57.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:05:57.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:05:57.856 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:05:58.329 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:05:58.801 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:05:59.272 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:05:59.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:59.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:59.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:59.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:59.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:05:59.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:05:59.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:05:59.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:59.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:59.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:59.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:05:59.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:05:59.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:05:59.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:05:59.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:05:59.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:59.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:05:59.745 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:06:00.218 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:06:00.690 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:06:01.161 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:06:01.634 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:06:02.107 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:06:02.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:02.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:02.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:02.579 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:06:02.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:02.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:02.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:02.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:02.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:02.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:02.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:02.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:02.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:02.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:02.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:02.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:02.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:02.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:02.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:02.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:02.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:02.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:02.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:02.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:02.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:02.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:02.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:02.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:02.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.050 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:06:03.521 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:06:03.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:03.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:03.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:03.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:03.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:03.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:03.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:03.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:03.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:03.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:03.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:03.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:03.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:03.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:03.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:03.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:03.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:03.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:03.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:03.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:03.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:03.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:03.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:03.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:03.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:03.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:03.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:03.993 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:06:04.466 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:06:04.938 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:06:05.409 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:06:05.880 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:06:06.354 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:06:06.826 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:06:06.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:06.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:06.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:06.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:06.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:06.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:06.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:06.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:06.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:06.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:06.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:06.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:06.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:06.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:06.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:06.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:07.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:07.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:07.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:07.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:07.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:07.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:07.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:07.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:07.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:07.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:07.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:07.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:07.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:07.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:07.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:07.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:07.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:07.298 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:06:07.769 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:06:08.242 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:06:08.715 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:06:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:06:09.658 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:06:10.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:10.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:10.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:10.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:10.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:10.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:10.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:10.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:10.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:10.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:10.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:10.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:10.128 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:06:10.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:10.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:10.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:10.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:10.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:10.599 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:06:11.073 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:06:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:06:12.017 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:06:12.488 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:06:12.962 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:06:13.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:13.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:13.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:13.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:13.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:13.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:13.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:13.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:13.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:13.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:13.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:13.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:13.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:13.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:13.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:13.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:13.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:13.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:13.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:13.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:13.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:13.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:13.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:13.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:13.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:13.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:13.434 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:06:13.906 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:06:14.377 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:06:14.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:14.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:14.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:14.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:14.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:14.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:14.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:14.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:14.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:14.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:14.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:14.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:14.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:14.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:14.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:14.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:14.850 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:06:14.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:14.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:14.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:14.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:14.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:14.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:14.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:14.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:14.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:14.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:14.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:14.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:15.322 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:06:15.794 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:06:16.265 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:06:16.738 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:06:17.211 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:06:17.683 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:06:17.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:17.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:17.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:17.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:17.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:17.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:17.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:17.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:17.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:17.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:17.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:17.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:17.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:17.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:17.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:17.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:17.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:18.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:18.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:18.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:18.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:18.153 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:06:18.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:18.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:18.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:18.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:18.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:18.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:18.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:18.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:18.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:18.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:18.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:18.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:18.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:18.624 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:06:19.095 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:06:19.566 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:06:20.039 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:06:20.512 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:06:20.984 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:06:21.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:21.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:21.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:21.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:21.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:21.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:21.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:21.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:21.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:21.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:21.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:21.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:21.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:21.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:21.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:21.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:21.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:21.455 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:06:21.926 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:06:22.397 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:06:22.870 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:06:23.342 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:06:23.815 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:06:24.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:24.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:24.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:24.285 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:06:24.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:24.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:24.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:24.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:24.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:24.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:24.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:24.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:24.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:24.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:24.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:24.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:24.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:24.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:24.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:24.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:24.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:24.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:24.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:24.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:24.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:24.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:24.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:24.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:24.756 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:06:25.227 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:06:25.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:25.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:25.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:25.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:25.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:25.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:25.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:25.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:25.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:25.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:25.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:25.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:25.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:25.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:25.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:25.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:25.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:25.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:25.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:25.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:25.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:25.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:25.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:25.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:25.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:25.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:25.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:25.698 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:06:26.171 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:06:26.644 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:06:27.116 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:06:27.587 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:06:28.060 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:06:28.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:28.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:28.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:28.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:28.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:28.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:28.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:28.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:28.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:28.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:28.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:28.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:28.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:28.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.532 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:06:28.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:28.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:28.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:28.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:28.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:28.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:28.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:28.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:28.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:28.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:28.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:28.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:28.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:28.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:28.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:29.003 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:06:29.475 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:06:29.946 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:06:30.419 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:06:30.891 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:06:31.363 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:06:31.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:31.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:31.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:31.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:31.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:31.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:31.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:31.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:31.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:31.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:31.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:31.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:31.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:31.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:31.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:31.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:31.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:31.834 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:06:32.305 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:06:32.778 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:06:33.251 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:06:33.723 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:06:34.194 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:06:34.667 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:06:34.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:34.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:34.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:34.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:34.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:34.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:34.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:34.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:34.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:34.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:34.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:34.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:34.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:34.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:34.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:34.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:34.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:35.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:35.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:35.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:35.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:35.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:35.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:35.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:35.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:35.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:35.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:35.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:35.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:35.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:35.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:35.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:35.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:35.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:35.139 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:06:35.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:35.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:35.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:35.611 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:06:35.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:35.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:35.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:35.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:35.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:35.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:35.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:35.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:35.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:35.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:35.621 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:35.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:40.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:40.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:40.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:40.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:40.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:40.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:40.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:40.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:06:40.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:40.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:06:40.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:06:40.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:06:40.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:06:40.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:06:40.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:40.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:40.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:06:40.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:06:40.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:06:40.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:40.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:06:40.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:06:40.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:06:40.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:40.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:40.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:06:40.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:06:40.644 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:06:40.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:40.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:06:40.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:06:40.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:06:40.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:40.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:40.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:06:40.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:06:40.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:06:40.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:40.654 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:06:40.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:06:40.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:06:40.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:06:40.654 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:06:40.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:06:40.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:06:40.655 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:06:40.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:40.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:40.660 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:06:41.139 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:06:41.186 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:06:41.187 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:06:41.188 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:06:41.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:41.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:41.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:41.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:41.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:41.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:41.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:41.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:41.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:41.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:41.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:41.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:06:41.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:41.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:41.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:41.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:41.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:41.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:41.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:41.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:41.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:41.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:41.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:41.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:41.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:41.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:41.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:41.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:41.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:41.714 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:06:41.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:41.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:41.715 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:41.715 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:41.715 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:41.715 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:41.715 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:41.715 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:41.716 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=228 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:46.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:46.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:46.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:46.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:46.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:46.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:46.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:46.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:06:46.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:46.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:06:46.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:06:46.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:06:46.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:06:46.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:06:46.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:46.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:46.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:06:46.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:06:46.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:06:46.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:46.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:06:46.735 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:06:46.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:06:46.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:46.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:46.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:06:46.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:06:46.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:06:46.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:46.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:06:46.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:06:46.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:06:46.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:46.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:46.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:06:46.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:06:46.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:06:46.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:06:46.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:06:46.742 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:06:46.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:46.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:46.747 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:06:47.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:06:47.265 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:06:47.267 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:06:47.268 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:06:47.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:47.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:47.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:47.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:47.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:47.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:47.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:47.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:47.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:47.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:47.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:47.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:47.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:47.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:06:47.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:47.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:47.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:47.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:48.169 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:06:48.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:48.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:48.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:48.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:48.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:48.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:48.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:48.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:48.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:48.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:48.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:48.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:48.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:48.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.640 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:06:48.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:48.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:48.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:48.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:48.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:48.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:48.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:48.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:48.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:48.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:48.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:48.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:48.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:48.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:48.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:48.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:48.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:48.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:48.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:49.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:49.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:49.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:49.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:49.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:49.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:49.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:49.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:49.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:49.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:49.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:49.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:49.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:49.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:49.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:49.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:49.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:49.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:06:49.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:49.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:49.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:49.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:49.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:49.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:49.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:49.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:49.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:49.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:49.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:49.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:49.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:49.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:49.520 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:06:49.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:49.521 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:06:54.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:54.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:54.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:54.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:54.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:06:54.529 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:54.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:06:54.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:06:54.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:06:54.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:06:54.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:06:54.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:54.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:54.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:06:54.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:06:54.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:06:54.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:06:54.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:06:54.534 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:06:54.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:06:54.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:06:54.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:06:54.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:06:54.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:06:54.539 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:06:54.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:06:54.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:06:54.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:06:55.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:06:55.060 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:06:55.061 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:06:55.062 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:06:55.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:55.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:55.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:55.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:55.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:55.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:55.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:06:55.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:55.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:55.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:55.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:55.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:55.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:55.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:55.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:55.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.964 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:06:55.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:55.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:55.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:06:55.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:55.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:55.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:55.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:06:55.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:06:56.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:56.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:06:56.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:06:56.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:56.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:56.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:06:56.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:06:56.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:06:56.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:06:56.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:06:56.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:06:56.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:06:56.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:06:56.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:06:56.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:06:56.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:06:56.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:06:56.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:06:56.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:06:56.357 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:07:01.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:01.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:01.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:01.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:01.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:01.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:01.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:01.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:01.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:01.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:01.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:07:01.381 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:07:01.382 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:07:01.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:01.382 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:01.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:07:01.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:01.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:01.383 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:07:01.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:01.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:07:01.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:07:01.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:01.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:01.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:01.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:07:01.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:01.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:07:01.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:01.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:07:01.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:07:01.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:01.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:01.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:01.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:07:01.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:01.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:07:01.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:01.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:07:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:07:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:07:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:07:01.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:07:01.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:07:01.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:07:01.396 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:07:01.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:01.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:01.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:07:01.879 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:07:01.920 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:07:01.922 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:07:01.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:01.924 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:07:01.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:01.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:01.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:01.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:01.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:01.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:01.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:01.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:01.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:01.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:01.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:01.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:01.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:02.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:02.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:02.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:02.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:02.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:02.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:02.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:02.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:02.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:02.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:02.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:02.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:02.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:07:02.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:02.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:02.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:02.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:02.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:02.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:02.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:02.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:02.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:02.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:02.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:02.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:02.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:02.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:02.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:02.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:02.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:02.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:02.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:02.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:02.822 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:07:02.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:02.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:02.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:02.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:02.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:02.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:02.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:02.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:02.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:02.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:02.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:02.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:03.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:03.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:03.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:03.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:03.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:03.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:03.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:03.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:03.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:03.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:03.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:03.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:03.230 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:07:03.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:03.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:03.230 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:03.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:03.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:03.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:03.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:03.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:03.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:08.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:08.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:08.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:08.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:08.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:08.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:08.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:08.239 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:08.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:08.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:08.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:07:08.242 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:07:08.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:07:08.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:08.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:08.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:08.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:07:08.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:08.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:07:08.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:08.244 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:07:08.244 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:07:08.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:08.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:08.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:08.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:07:08.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:08.245 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:07:08.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:08.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:08.246 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:07:08.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:08.248 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:07:08.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:07:08.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:07:08.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:07:08.248 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:07:08.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:07:08.249 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:07:08.249 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:07:08.249 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:08.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:08.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:08.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:07:08.731 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:07:08.771 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:07:08.774 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:07:08.776 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:07:08.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:08.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:08.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:08.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:08.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:08.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:08.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:08.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:08.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:08.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:08.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:08.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:08.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:08.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:09.203 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:07:09.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:09.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:09.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:09.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:09.674 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:07:10.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:07:10.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:10.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:10.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:10.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:10.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:07:10.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:10.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:10.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:10.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:10.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:10.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:10.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:10.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:10.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:10.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:10.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:10.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:10.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:10.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:10.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:10.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:11.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:07:11.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:11.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:11.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:11.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:11.562 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:07:12.034 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:07:12.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:12.505 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:07:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:12.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:12.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:12.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:12.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:12.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:12.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:12.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:12.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:12.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:12.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:12.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:12.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:12.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:12.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:12.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:12.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:12.975 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:07:13.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:13.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:13.449 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:07:13.921 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:07:14.394 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:07:14.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:14.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:14.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:14.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:14.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:14.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:14.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:14.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:14.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:14.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:14.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:14.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:14.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:14.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:14.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:14.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:14.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:14.864 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:07:15.338 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:07:15.810 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:07:16.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:16.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:16.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:16.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:16.282 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:07:16.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:16.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:16.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:16.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:16.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:16.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:16.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:16.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:16.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:16.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:16.291 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:07:16.291 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:16.292 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:16.292 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:16.292 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:16.292 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:16.292 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:16.292 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:21.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:21.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:21.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:21.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:21.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:21.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:21.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:21.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:21.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:21.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:21.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:07:21.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:07:21.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:07:21.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:21.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:21.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:21.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:07:21.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:21.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:07:21.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:21.315 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:07:21.315 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:07:21.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:21.315 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:21.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:21.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:07:21.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:21.316 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:07:21.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:21.319 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:21.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:07:21.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:07:21.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:07:21.323 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:07:21.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:21.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:21.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:07:21.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:07:21.853 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:07:21.855 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:07:21.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:21.857 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:07:21.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:21.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:21.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:21.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:21.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:21.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:21.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:21.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:21.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:21.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:21.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:21.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:21.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:22.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:07:22.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:22.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:22.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:22.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:22.752 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:07:23.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:07:23.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:23.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:23.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:23.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:23.696 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:07:23.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:23.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:23.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:23.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:23.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:23.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:23.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:23.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:23.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:23.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:23.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:23.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:23.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:23.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:23.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:23.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:23.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:07:24.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:24.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:24.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:24.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:24.642 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:07:25.114 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:07:25.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:25.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:25.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:25.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:25.585 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:07:25.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:25.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:25.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:25.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:25.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:25.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:25.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:25.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:25.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:25.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:25.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:25.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:25.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:25.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:25.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:25.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:25.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:26.058 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:07:26.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:26.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:26.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:26.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:26.531 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:07:27.002 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:07:27.474 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:07:27.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:27.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:27.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:27.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:27.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:27.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:27.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:27.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:27.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:27.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:27.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:27.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:27.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:27.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:27.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:27.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:27.945 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:07:28.418 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:07:28.890 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:07:29.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:29.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:29.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:29.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:29.361 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:07:29.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:29.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:29.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:29.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:29.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:29.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:29.372 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:07:29.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:29.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:29.373 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:29.373 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:29.373 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:29.373 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:29.373 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:29.373 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:29.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:34.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:34.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:34.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:34.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:34.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:34.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:34.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:34.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:34.384 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:34.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:34.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:07:34.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:07:34.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:07:34.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:34.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:34.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:34.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:07:34.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:34.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:07:34.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:34.395 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:07:34.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:07:34.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:34.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:34.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:34.396 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:07:34.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:34.396 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:07:34.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:34.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:34.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:07:34.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:34.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:07:34.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:07:34.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:07:34.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:07:34.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:07:34.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:07:34.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:07:34.405 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:07:34.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:34.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:34.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:07:34.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:07:34.933 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:07:34.935 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:07:34.936 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:07:34.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:34.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:34.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:34.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:34.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:34.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:34.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:34.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:34.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:35.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:35.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:35.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:35.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:35.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:35.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:35.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:35.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:35.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:35.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:35.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:35.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:35.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:35.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:35.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:35.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:35.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:35.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:35.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:35.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:35.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:35.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:35.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:07:35.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:35.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:35.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:35.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:35.831 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:07:36.302 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:07:36.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:36.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:36.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:36.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:07:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:07:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:37.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:37.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:37.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:37.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:37.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:37.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:37.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:37.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:37.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:37.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:37.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:37.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:37.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:37.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:37.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:37.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:37.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:37.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:37.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:37.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:37.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:37.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:37.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:37.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:37.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:37.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:37.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:37.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:37.714 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:07:38.185 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:07:38.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:38.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:38.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:38.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:38.656 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:07:39.126 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:07:39.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:39.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:39.597 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:07:39.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:39.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:39.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:39.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:39.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:39.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:39.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:39.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:39.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:39.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:39.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:39.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:39.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:39.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:39.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:39.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:39.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:40.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:40.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:40.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:40.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:40.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:40.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:40.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:40.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:40.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:40.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:40.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:40.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:40.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:07:40.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:40.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:40.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:40.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:40.543 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:07:41.015 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:07:41.486 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:07:41.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:07:42.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:42.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:42.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:42.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:42.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:42.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:42.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:42.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:42.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:42.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:42.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:42.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:42.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:42.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.430 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:07:42.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:42.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:42.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:42.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:42.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:42.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:42.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:42.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:42.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:42.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:42.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:42.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:42.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:42.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:42.903 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:07:43.375 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:07:43.845 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:07:44.316 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:07:44.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:44.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:44.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:44.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:44.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:44.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:44.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:44.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:44.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:44.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:44.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:44.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:44.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:44.789 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:07:44.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:44.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:44.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:44.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:45.262 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:07:45.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:45.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:45.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:45.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:45.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:45.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:45.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:45.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:45.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:45.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:45.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:45.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:45.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:45.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:45.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:45.734 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:07:46.205 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:07:46.678 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:07:47.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:47.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:47.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:47.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:47.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:47.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:47.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:47.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:47.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:47.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:47.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:47.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:47.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.150 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:07:47.622 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:07:47.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:47.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:47.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:47.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:47.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:47.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:47.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:47.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:47.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:47.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:47.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:47.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:47.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:47.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:47.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:48.093 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:07:48.567 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:07:49.039 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:07:49.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:49.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:49.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:49.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:49.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:49.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:49.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:49.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:49.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:49.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:49.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:49.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:49.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:49.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:49.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:49.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:49.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:49.510 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:07:49.982 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:07:50.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:50.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:50.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:50.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:50.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:50.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:50.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:50.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:50.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:50.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:50.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:50.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:50.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:50.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:50.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:50.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:50.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:50.453 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:07:50.926 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:07:51.398 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:07:51.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:51.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:51.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:51.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:51.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:51.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:51.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:51.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:51.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:51.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:51.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:51.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:51.870 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:07:51.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:51.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:51.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:51.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:51.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:52.341 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:07:52.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:52.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:52.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:52.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:52.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:52.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:52.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:52.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:52.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:52.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:52.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:52.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:52.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:52.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:52.814 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:07:53.287 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:07:53.759 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:07:54.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:54.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:54.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:54.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:54.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:54.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:54.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:54.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:54.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:54.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:54.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:54.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:54.167 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:07:54.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:54.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:54.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:07:59.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:07:59.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:07:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:59.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:59.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:07:59.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:59.182 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:59.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:07:59.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:07:59.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:07:59.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:07:59.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:59.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:07:59.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:07:59.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:07:59.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:07:59.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:07:59.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:07:59.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:07:59.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:59.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:59.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:07:59.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:07:59.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:07:59.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:07:59.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:07:59.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:07:59.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:07:59.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:59.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:07:59.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:07:59.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:07:59.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:07:59.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:07:59.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:07:59.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:07:59.205 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:07:59.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:07:59.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:07:59.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:07:59.733 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:07:59.736 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:07:59.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:59.738 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:07:59.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:59.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:59.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:59.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:59.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:59.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:59.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:59.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:59.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:59.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:59.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:59.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:59.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:59.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:59.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:59.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:59.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:59.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:59.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:59.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:59.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:59.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:59.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:59.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:59.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:59.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:59.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:07:59.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:07:59.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:07:59.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:59.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:59.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:07:59.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:07:59.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:07:59.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:07:59.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:07:59.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:07:59.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:00.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:00.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:00.161 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:00.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:00.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:00.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:00.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:00.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:00.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:00.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:00.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:00.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:00.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:00.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:00.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:00.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:00.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:00.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:00.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:00.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:00.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:00.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:00.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:00.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:00.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:00.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:01.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:01.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:01.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:01.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:01.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:01.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:08:01.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:01.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:01.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:01.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:01.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:01.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:01.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:01.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:01.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:01.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:01.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:01.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:01.201 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:01.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:01.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:01.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:06.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:06.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:06.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:06.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:06.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:06.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:06.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:06.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:06.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:06.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:06.215 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:06.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:06.217 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:06.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:06.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:06.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:06.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:06.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:06.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:06.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:06.220 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:06.220 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:06.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:06.220 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:06.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:06.220 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:06.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:06.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:06.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:06.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:06.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:06.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:06.224 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:06.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:06.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:06.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:06.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:06.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:06.228 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:06.228 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:06.228 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:06.233 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:06.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:06.758 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:06.762 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:06.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:06.765 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:06.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:06.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:06.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:06.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:06.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:06.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:06.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:06.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:06.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:06.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:06.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:06.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:06.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.184 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:07.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:07.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:07.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:07.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:07.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:07.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:07.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:07.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:07.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:07.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:07.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:07.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:07.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:07.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:07.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:07.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:07.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:07.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:07.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:07.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:07.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:07.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:07.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:07.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:07.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:07.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:07.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:07.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:07.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:07.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:07.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:07.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:07.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:08:08.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:08.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:08.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:08.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:08.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:08.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:08.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:08.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:08.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:08.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:08.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:08.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:08.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:08.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:08.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:08.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:08.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:08.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:08:08.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:08.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:08.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:08.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:08.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:08.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:08.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:08.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:08.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:08.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:08.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:08.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:08.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:08.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:08.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:09.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:09.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:09.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:09.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:09.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:09.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:09.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:09.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:09.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:09.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:09.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:09.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:09.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.071 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:08:09.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:09.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:09.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:09.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:09.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:09.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:09.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:09.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:09.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:09.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:09.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:09.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:09.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:09.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:09.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:09.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:09.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:09.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:08:09.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:09.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:09.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:09.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:09.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:09.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:09.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:09.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:09.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:09.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:09.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:10.014 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:08:10.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:10.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:10.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:10.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:10.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:10.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:10.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:10.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:10.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:10.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:10.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:10.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:10.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:10.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:10.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:10.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:10.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:10.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:10.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:10.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:10.425 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:10.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:10.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:10.426 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:10.426 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:10.426 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:10.426 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:10.427 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:10.427 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:10.427 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=907 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:15.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:15.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:15.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:15.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:15.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:15.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:15.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:15.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:15.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:15.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:15.444 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:15.446 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:15.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:15.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:15.447 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:15.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:15.447 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:15.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:15.448 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:15.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:15.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:15.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:15.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:15.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:15.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:15.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:15.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:15.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:15.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:15.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:15.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:15.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:15.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:15.453 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:15.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:15.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:15.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:15.978 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:15.980 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:15.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:15.983 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:16.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:16.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:16.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:16.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:16.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:16.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:16.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:16.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:16.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:16.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:16.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:16.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:16.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:17.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:17.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:17.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:17.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:17.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:17.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:17.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:17.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:17.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:17.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:17.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:17.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:17.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:17.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:17.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:17.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:17.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:17.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:17.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:17.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:17.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:17.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:17.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:17.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:17.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:17.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:17.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:17.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:17.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:17.283 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:17.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:17.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:22.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:22.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:22.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:22.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:22.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:22.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:22.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:22.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:22.294 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:22.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:22.295 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:22.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:22.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:22.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:22.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:22.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:22.300 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:22.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:22.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:22.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:22.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:22.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:22.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:22.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:22.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:22.305 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:22.305 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:22.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:22.307 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:22.307 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:22.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:22.307 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:22.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:22.307 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:22.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:22.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:22.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:22.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:22.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:22.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:22.313 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:22.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:22.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:22.318 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:22.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:22.854 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:22.856 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:22.856 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:22.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:22.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:22.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:22.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:22.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:22.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:22.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:22.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:22.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:22.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:22.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:22.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:22.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:22.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:23.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:23.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:23.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:23.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:23.741 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:23.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:23.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:23.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:23.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:23.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:23.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:23.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:23.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:23.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:23.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:23.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:23.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:23.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:23.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:23.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:23.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:24.212 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:08:24.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:24.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:24.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:24.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:24.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:08:24.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:24.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:24.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:24.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:24.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:24.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:24.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:24.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:24.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:24.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:24.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:24.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:24.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:24.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:24.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:24.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:24.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:25.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:08:25.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:25.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:25.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:25.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:08:25.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:25.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:25.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:25.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:25.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:25.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:25.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:25.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:25.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:25.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:25.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:25.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:25.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:25.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:25.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:25.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:25.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:26.102 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:08:26.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:26.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:26.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:26.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:26.576 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:08:26.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:26.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:26.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:26.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:26.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:26.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:26.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:26.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:26.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:26.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:26.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:26.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:26.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:26.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:26.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:26.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:26.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:27.047 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:08:27.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:27.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:27.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:27.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:27.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:08:27.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:27.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:27.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:27.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:27.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:27.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:27.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:27.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:27.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:27.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:27.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:27.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:27.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:27.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:27.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:27.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:27.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:27.989 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:08:28.460 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:08:28.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:28.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:28.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:28.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:28.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:28.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:28.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:28.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:28.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:28.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:28.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:28.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:28.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:28.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:28.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:28.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:28.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:28.931 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:08:29.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:29.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:29.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:29.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:29.404 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:08:29.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:29.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:29.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:29.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:29.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:29.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:29.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:29.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:29.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:29.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:29.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:29.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:29.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:29.877 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:08:30.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:30.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:30.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:30.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:30.349 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:08:30.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:30.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:30.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:30.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:30.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:30.359 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:30.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:30.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:30.360 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:35.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:35.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:35.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:35.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:35.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:35.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:35.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:35.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:35.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:35.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:35.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:35.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:35.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:35.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:35.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:35.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:35.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:35.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:35.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:35.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:35.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:35.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:35.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:35.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:35.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:35.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:35.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:35.376 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:35.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:35.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:35.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:35.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:35.377 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:35.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:35.377 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:35.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:35.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:35.380 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:35.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:35.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:35.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:35.863 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:35.915 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:35.917 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:35.919 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:35.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:35.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:35.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:35.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:35.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:35.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:35.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:35.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:35.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:35.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:35.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:35.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:35.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:35.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:36.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:36.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:36.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:36.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:36.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:36.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:36.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:36.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:36.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:36.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:36.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:36.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:36.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:36.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.335 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:36.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:36.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:36.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:36.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:36.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:36.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:36.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:36.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:36.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:36.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:36.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:36.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.806 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:36.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:36.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:36.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:36.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:36.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:36.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:36.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:36.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:36.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:36.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:36.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:36.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:36.979 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:36.979 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:36.980 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:36.980 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:36.980 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:36.980 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:36.980 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:36.980 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:41.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:41.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:41.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:41.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:41.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:41.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:41.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:41.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:41.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:41.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:41.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:41.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:41.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:41.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:41.997 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:41.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:41.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:41.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:41.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:41.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:42.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:42.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:42.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:42.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:42.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:42.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:42.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:42.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:42.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:42.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:42.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:42.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:42.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:42.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:42.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:42.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:42.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:42.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:42.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:42.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:42.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:42.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:42.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:42.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:42.012 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:42.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:42.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:42.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:42.544 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:42.547 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:42.548 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:42.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:42.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:42.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:42.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:42.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:42.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:42.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:42.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:42.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:42.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:42.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:42.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:42.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:42.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:42.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:42.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:42.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:42.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:42.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:42.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:42.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:42.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:42.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:42.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:42.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:42.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:42.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:42.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:42.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:42.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:42.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:42.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:42.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:42.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:42.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:42.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:42.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:42.964 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:43.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:43.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:43.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:43.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:43.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:43.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:43.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:43.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:43.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:43.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:43.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:43.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:43.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:43.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:43.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:43.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:43.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:43.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:43.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:43.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:43.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:43.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:43.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:43.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:43.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:43.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:43.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:43.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:43.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:43.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:43.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:43.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:43.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:43.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:43.600 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:43.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:43.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:43.600 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:48.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:48.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:48.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:48.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:48.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:48.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:48.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:48.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:48.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:48.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:48.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:48.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:48.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:48.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:48.619 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:48.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:48.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:48.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:48.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:48.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:48.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:48.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:48.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:48.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:48.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:48.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:48.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:48.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:48.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:48.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:48.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:48.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:48.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:48.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:48.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:48.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:48.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:48.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:48.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:48.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:48.636 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:48.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:48.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:48.641 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:49.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:49.173 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:49.174 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:49.175 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:49.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:49.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:49.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:49.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:49.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:49.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.592 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:49.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:49.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:49.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:49.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:49.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:49.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:49.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:49.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:49.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:49.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:49.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:49.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:49.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:49.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:49.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:49.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:50.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:50.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:50.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:50.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:50.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:50.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:50.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:50.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:50.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:50.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:50.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:50.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:50.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:50.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:50.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:50.236 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:50.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:50.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:50.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:50.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:50.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:50.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:50.237 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:08:55.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:55.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:55.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:55.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:55.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:55.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:55.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:55.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:55.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:55.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:08:55.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:08:55.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:08:55.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:08:55.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:55.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:55.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:55.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:08:55.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:08:55.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:08:55.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:55.262 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:08:55.262 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:08:55.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:55.262 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:55.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:55.263 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:08:55.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:08:55.263 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:08:55.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:55.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:08:55.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:08:55.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:55.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:08:55.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:08:55.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:08:55.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:08:55.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:08:55.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:08:55.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:08:55.271 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:08:55.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:08:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:08:55.276 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:08:55.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:08:55.805 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:08:55.807 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:08:55.809 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:08:55.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:55.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:55.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:55.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:55.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:55.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:55.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:55.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:55.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:55.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:55.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:55.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:55.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:55.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:55.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:55.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:55.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:55.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:55.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:55.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:55.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:55.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:55.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:55.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:55.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:55.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:56.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:56.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:56.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:56.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:56.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:56.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:56.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:56.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:56.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:56.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:56.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:56.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:56.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:56.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:08:56.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:56.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:56.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:56.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:56.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:56.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:56.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:56.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:56.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:56.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:56.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:56.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:56.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:08:56.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:56.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:56.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:08:56.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:08:56.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:56.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:08:56.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:08:56.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.696 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:08:56.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:08:56.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:08:56.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:08:56.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:08:56.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:08:56.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:08:56.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:08:56.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:08:56.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:08:56.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:08:56.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:08:56.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:08:56.858 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:08:56.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:08:56.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:01.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:01.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:01.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:01.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:01.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:01.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:01.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:01.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:01.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:01.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:01.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:01.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:01.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:01.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:01.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:01.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:01.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:01.872 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:01.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:01.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:01.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:01.873 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:01.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:01.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:01.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:01.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:01.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:01.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:01.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:01.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:01.875 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:01.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:01.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:02.358 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:02.395 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:02.396 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:02.397 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:02.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:02.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:02.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:02.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:02.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:02.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:02.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:02.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:02.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:02.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:02.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:02.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:02.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:02.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:02.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:02.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:02.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:02.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:02.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:02.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:02.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:09:02.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:02.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:02.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:02.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:02.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:02.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:02.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:02.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:03.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:09:03.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:03.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:03.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:03.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:03.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:03.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:03.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:03.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:03.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:03.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:03.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:03.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:03.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:03.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:03.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:03.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:03.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:03.775 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:09:03.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:03.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:03.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:03.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:04.247 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:09:04.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:04.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:04.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:04.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:04.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:04.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:04.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:04.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:04.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:04.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:04.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:04.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:04.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:04.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:04.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:04.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:04.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:09:04.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:04.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:04.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:04.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:05.191 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:09:05.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:05.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:05.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:05.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:05.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:05.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:05.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:05.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:05.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:05.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:05.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:05.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:05.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:05.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:05.525 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:05.525 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:05.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:05.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:05.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:05.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:05.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:05.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:10.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:10.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:10.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:10.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:10.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:10.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:10.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:10.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:10.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:10.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:10.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:10.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:10.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:10.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:10.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:10.533 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:10.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:10.533 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:10.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:10.533 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:10.533 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:10.533 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:10.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:10.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:10.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:10.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:10.537 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:10.537 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:10.537 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:10.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:10.542 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:11.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:11.058 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:11.059 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:11.059 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:11.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:11.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:11.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:11.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:11.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:11.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:11.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:11.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:11.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:11.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:11.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:11.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:11.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:11.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:11.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:11.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:11.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:11.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:11.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:11.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:11.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:11.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:09:11.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:11.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:11.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:11.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:11.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:11.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:11.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:11.964 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:09:11.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:11.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:11.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:11.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:11.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:11.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:11.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:12.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:12.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:12.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:12.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:12.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:12.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:12.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:12.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:12.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:12.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:09:12.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:12.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:12.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:12.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:12.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:09:13.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:13.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:13.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:13.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:13.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:13.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:13.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:13.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:13.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:13.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:13.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:13.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:13.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:13.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:13.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:13.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:13.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:13.377 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:09:13.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:13.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:13.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:13.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:13.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:09:14.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:14.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:14.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:14.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:14.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:14.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:14.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:14.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:14.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:14.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:14.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:14.181 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:14.182 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:14.182 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:14.182 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:14.182 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:14.182 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:14.182 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:19.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:19.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:19.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:19.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:19.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:19.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:19.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:19.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:19.187 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:19.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:19.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:19.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:19.188 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:19.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:19.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:19.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:19.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:19.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:19.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:19.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:19.191 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:19.191 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:19.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:19.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:19.193 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:19.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:19.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:19.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:19.198 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:19.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:19.716 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:19.716 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:19.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:19.717 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:19.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:19.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:19.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:19.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:19.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:19.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:19.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:19.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:19.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:19.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:19.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:19.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:19.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:20.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:20.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:20.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:20.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:20.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:20.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:20.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:20.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:20.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:20.149 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:09:20.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:20.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:20.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:20.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:20.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:20.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:20.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:20.621 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:09:20.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:20.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:20.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:20.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:20.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:20.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:20.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:20.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:20.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:20.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:20.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:20.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:20.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:20.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:20.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:21.094 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:09:21.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:21.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:21.566 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:09:21.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:21.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:21.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:21.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:21.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:21.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:21.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:21.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:21.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:21.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:21.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:21.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:21.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:21.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:21.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:21.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:21.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:22.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:09:22.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:22.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:22.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:22.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:22.510 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:09:22.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:22.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:22.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:22.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:22.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:22.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:22.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:22.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:22.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:22.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:22.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:22.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:22.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:22.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:22.843 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:27.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:27.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:27.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:27.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:27.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:27.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:27.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:27.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:27.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:27.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:27.857 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:27.859 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:27.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:27.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:27.860 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:27.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:27.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:27.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:27.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:27.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:27.863 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:27.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:27.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:27.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:27.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:27.864 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:27.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:27.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:27.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:27.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:27.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:27.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:27.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:27.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:27.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:27.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:27.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:27.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:27.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:27.874 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:27.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:27.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:28.358 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:28.404 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:28.407 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:28.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:28.409 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:28.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:28.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:28.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:28.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:28.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:28.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:28.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:28.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:28.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:28.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:28.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:28.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:28.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:28.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:28.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:28.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:28.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:28.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:28.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:28.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:28.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:09:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:28.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:28.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:28.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:28.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:28.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:28.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:28.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:29.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:09:29.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:29.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:29.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:29.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:29.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:29.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:29.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:29.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:29.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:29.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:29.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:29.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:29.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:29.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:29.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:29.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:29.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:29.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:09:29.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:29.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:29.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:29.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:30.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:09:30.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:30.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:30.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:30.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:30.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:30.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:30.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:30.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:30.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:30.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:30.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:30.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:30.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:30.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:30.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:30.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:30.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:30.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:09:30.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:30.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:30.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:30.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:31.189 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:09:31.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:31.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:31.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:31.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:31.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:31.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:31.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:31.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:31.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:31.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:31.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:31.517 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:36.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:36.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:36.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:36.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:36.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:36.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:36.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:36.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:36.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:36.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:36.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:36.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:36.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:36.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:36.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:36.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:36.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:36.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:36.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:36.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:36.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:36.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:36.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:36.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:36.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:36.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:36.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:36.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:36.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:36.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:36.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:36.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:36.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:36.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:36.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:36.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:36.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:36.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.556 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:36.556 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:36.556 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:36.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:36.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:36.561 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:37.040 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:37.087 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:37.089 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:37.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:37.091 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:37.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:37.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:37.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:37.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:37.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:37.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:37.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:37.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:37.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:37.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:37.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:37.127 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:37.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:37.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:42.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:42.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:42.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:42.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:42.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:42.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:42.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:42.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:42.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:42.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:42.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:42.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:42.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:42.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:42.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:42.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:42.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:42.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:42.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:42.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:42.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:42.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:42.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:42.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:42.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:42.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:42.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:42.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:42.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:42.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:42.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:42.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:42.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:42.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:42.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:42.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:42.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:42.151 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:42.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:42.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:42.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:42.635 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:42.678 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:42.680 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:42.682 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:42.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:42.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:42.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:42.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:42.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:42.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:42.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:42.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:42.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:42.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:42.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:42.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:42.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:42.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:42.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:42.731 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:42.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:42.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:47.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:47.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:47.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:47.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:47.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:47.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:47.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:47.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:47.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:47.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:47.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:47.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:47.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:47.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:47.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:47.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:47.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:47.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:47.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:47.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:47.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:47.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:47.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:47.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:47.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:47.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:47.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:47.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:47.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:47.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:47.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:47.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:47.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:47.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:47.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:47.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:47.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:47.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:47.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:47.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:47.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:47.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:47.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:47.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:47.759 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:47.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:47.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:48.241 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:48.280 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:48.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:48.282 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:48.283 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:48.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:48.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:48.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:48.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:48.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:48.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:48.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:48.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:48.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:48.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:48.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:48.312 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:48.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:48.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:48.312 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:09:53.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:53.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:53.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:53.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:53.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:53.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:53.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:53.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:53.324 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:53.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:53.324 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:53.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:53.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:53.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:53.329 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:53.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:53.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:53.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:53.330 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:53.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:53.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:53.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:53.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:53.334 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:53.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:53.334 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:53.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:53.334 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:53.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:53.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:53.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:53.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:53.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:53.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:53.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:53.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:53.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:53.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:53.344 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:53.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:53.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:53.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:53.344 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.345 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:53.345 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:53.345 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:53.346 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:53.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:53.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:53.348 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:09:58.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:09:58.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:09:58.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:58.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:58.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:58.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:58.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:09:58.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:58.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:58.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:09:58.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:09:58.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:09:58.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:09:58.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:58.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:58.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:09:58.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:09:58.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:09:58.376 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:09:58.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:58.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:09:58.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:09:58.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:58.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:58.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:09:58.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:09:58.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:09:58.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:09:58.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:58.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:09:58.383 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:09:58.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:58.383 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:09:58.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:09:58.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:09:58.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:09:58.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:09:58.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:09:58.389 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:09:58.389 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:09:58.389 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:09:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:09:58.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:09:58.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:09:58.915 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:09:58.916 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:09:58.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:58.918 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:09:58.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:58.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:58.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:58.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:58.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:58.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:58.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:58.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:09:58.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:58.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:58.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:58.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:58.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:59.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:09:59.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:09:59.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:09:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:09:59.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:09:59.816 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:09:59.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:09:59.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:59.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:59.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:59.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:09:59.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:09:59.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:09:59.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:09:59.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:09:59.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:09:59.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:09:59.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:00.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:00.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:00.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:00.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:00.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:00.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:10:00.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:00.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:00.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:00.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:00.762 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:10:00.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:00.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:00.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:00.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:00.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:00.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:00.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:00.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:00.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:00.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:00.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:00.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:00.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:00.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:00.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:00.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:00.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:01.234 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:10:01.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:01.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:01.705 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:10:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:01.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:01.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:01.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:01.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:01.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:01.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:01.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:01.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:01.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:01.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:01.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:01.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:01.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:01.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:01.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:01.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:02.176 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:10:02.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:02.647 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:10:02.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:02.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:02.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:02.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:02.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:02.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:02.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:02.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:02.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:02.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:02.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:02.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:02.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:02.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:02.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:02.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:02.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:03.119 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:10:03.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:03.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:03.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:03.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:03.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:03.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:03.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:03.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:03.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:03.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:03.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:03.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:03.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:03.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:03.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:03.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:03.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:03.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:03.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:03.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:03.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:03.592 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:10:04.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:04.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:04.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:04.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:04.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:04.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:04.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:04.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:04.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:04.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:04.064 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:10:04.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:04.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:04.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:04.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.536 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:10:04.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:04.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:04.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:04.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:04.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:04.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:04.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:04.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:04.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:04.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:04.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:04.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:04.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:04.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:04.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:04.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:05.008 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:10:05.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:05.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:05.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:05.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:05.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:05.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:05.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:05.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:05.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:05.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:05.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:05.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:05.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:05.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:05.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:05.481 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:10:05.953 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:10:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:06.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:06.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:06.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:06.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:06.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:06.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:06.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:06.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:06.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:06.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:06.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:06.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.424 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:10:06.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:06.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:06.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:06.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:06.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:06.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:06.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:06.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:06.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:06.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:06.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:06.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:06.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:06.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:06.897 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:10:07.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:07.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:07.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:07.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:07.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:07.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:07.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:07.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:07.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:07.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:07.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:07.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:07.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:07.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.369 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:10:07.842 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:10:07.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:07.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:07.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:07.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:07.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:07.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:07.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:07.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:07.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:07.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:07.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:07.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:07.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:07.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:08.314 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:10:08.787 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:10:08.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:08.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:08.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:08.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:08.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:08.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:08.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:08.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:08.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:08.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:08.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:08.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:08.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:08.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:08.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:08.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:08.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:09.259 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:10:09.730 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:10:09.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:09.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:09.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:09.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:09.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:09.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:09.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:09.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:09.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:09.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:09.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:09.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:09.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:09.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:09.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:09.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:09.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:10.203 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:10:10.675 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:10:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:10.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:10.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:10.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:10.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:10.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:10.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:10.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:10.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:10.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:10.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:10.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:10.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:10.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:10.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:10.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:10.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:11.146 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:10:11.618 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:10:11.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:11.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:11.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:11.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:11.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:11.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:11.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:11.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:11.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:11.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:11.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:11.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:11.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:11.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:11.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:11.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:11.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:12.089 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:10:12.562 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:10:12.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:12.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:12.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:12.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:12.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:12.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:12.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:12.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:12.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:12.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:12.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:12.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:12.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:12.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:12.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:12.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:12.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:13.034 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:10:13.506 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:10:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:13.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:13.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:13.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:13.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:13.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:13.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:13.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:13.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:13.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:13.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:13.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:13.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:13.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:13.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:13.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:13.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:13.977 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:10:14.448 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:10:14.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:14.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:14.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:14.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:14.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:14.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:14.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:14.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:14.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:14.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:14.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:14.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:14.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:14.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:14.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:14.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:14.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:14.919 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:10:15.390 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:10:15.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:15.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:15.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:15.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:15.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:15.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:15.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:15.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:15.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:15.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:10:15.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:10:15.540 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:10:20.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:10:20.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:10:20.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:20.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:20.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:20.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:20.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:20.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:10:20.556 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:20.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:10:20.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:10:20.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:10:20.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:10:20.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:10:20.563 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:20.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:20.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:10:20.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:10:20.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:10:20.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:20.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:10:20.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:10:20.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:10:20.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:20.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:20.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:10:20.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:10:20.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:10:20.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:10:20.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:10:20.570 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:10:20.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:20.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:10:20.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:10:20.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:10:20.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:10:20.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:10:20.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:10:20.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:10:20.575 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:10:20.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:20.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:10:21.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:10:21.104 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:10:21.106 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:10:21.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.108 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:10:21.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:21.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:21.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:21.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:21.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:21.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:21.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:10:21.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:21.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:21.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:21.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:21.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:21.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:21.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:21.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:21.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:21.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:10:21.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:21.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:21.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:21.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:10:21.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:10:22.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:22.001 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:10:22.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:10:22.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:10:22.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:22.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:22.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:10:22.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:10:22.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:10:22.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:10:22.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:22.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:22.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:22.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:22.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:22.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:22.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:22.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:22.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:10:22.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:10:22.187 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:10:27.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:10:27.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:10:27.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:27.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:27.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:27.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:27.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:27.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:10:27.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:27.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:10:27.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:10:27.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:10:27.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:10:27.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:10:27.219 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:27.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:27.220 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:10:27.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:10:27.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:10:27.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:27.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:10:27.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:10:27.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:10:27.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:27.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:27.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:10:27.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:10:27.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:10:27.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:10:27.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:10:27.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:10:27.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:10:27.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:10:27.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:10:27.230 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:10:27.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:27.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:27.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:10:27.713 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:10:28.185 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:10:28.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:10:29.132 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:10:29.608 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:10:30.080 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:10:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:10:31.027 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:10:31.502 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:10:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:10:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:10:32.909 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:10:33.381 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:10:33.853 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:10:34.329 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:10:34.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:10:35.276 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:10:35.748 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:10:36.221 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:10:36.694 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:10:37.166 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:10:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:10:38.112 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:10:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:10:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:10:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:10:40.002 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:10:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:10:40.948 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:10:41.420 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:10:41.895 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:10:42.367 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:10:42.841 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:10:43.313 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:10:43.785 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:10:44.259 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:10:44.731 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:10:45.203 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:10:45.678 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:10:46.150 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:10:46.626 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:10:47.101 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:10:47.573 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:10:48.045 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:10:48.520 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:10:48.992 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:10:49.468 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:10:49.940 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:10:50.415 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:10:50.887 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:10:51.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:51.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:51.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:51.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:51.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:10:51.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:10:51.254 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:10:51.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5181 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:10:51.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5181 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:10:51.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5181 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:10:51.254 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5181 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:10:56.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:10:56.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:10:56.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:56.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:56.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:56.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:56.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:10:56.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:10:56.271 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:56.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:10:56.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:10:56.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:10:56.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:10:56.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:10:56.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:56.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:10:56.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:10:56.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:10:56.276 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:10:56.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:10:56.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:10:56.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:10:56.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:10:56.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:56.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:10:56.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:10:56.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:10:56.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:10:56.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:10:56.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:10:56.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:10:56.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:10:56.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:10:56.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:10:56.285 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:10:56.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:10:56.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:10:56.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:10:56.290 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:10:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:10:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:10:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:10:56.290 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:10:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:10:56.291 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:10:56.291 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:10:56.291 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:10:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:10:56.296 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:10:56.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:10:57.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:10:57.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:10:58.193 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:10:58.665 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:10:59.139 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:10:59.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:11:00.083 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:11:00.548 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:11:01.012 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:11:01.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:11:01.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:11:02.434 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:11:02.906 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:11:03.381 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:11:03.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:11:04.328 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:11:04.800 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:11:05.276 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:11:05.748 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:11:06.223 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:11:06.695 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:11:07.170 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:11:07.642 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:11:08.116 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:11:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:11:09.060 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:11:09.534 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:11:10.006 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:11:10.478 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:11:10.949 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:11:11.422 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:11:11.895 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:11:12.367 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:11:12.842 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:11:13.313 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:11:13.784 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:11:14.260 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:11:14.732 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:11:15.207 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:11:15.679 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:11:16.154 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:11:16.626 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:11:17.102 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:11:17.592 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:11:18.064 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:11:18.539 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:11:19.011 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:11:19.487 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:11:19.959 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:11:20.434 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:11:20.906 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:11:21.381 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:11:21.853 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:11:22.329 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:11:22.801 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:11:23.271 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:11:23.747 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:11:24.219 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:11:24.694 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:11:25.166 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:11:25.641 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:11:26.113 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:11:26.589 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:11:27.061 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:11:27.536 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:11:28.008 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:11:28.483 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:11:28.955 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:11:29.431 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:11:29.902 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:11:30.378 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:11:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:11:31.325 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:11:31.797 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:11:32.271 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:11:32.743 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:11:33.215 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:11:33.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:33.690 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:11:34.162 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:11:34.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:34.636 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:11:35.109 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:11:35.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:35.580 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:11:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:11:36.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:11:37.003 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:11:37.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:37.475 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:11:37.951 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:11:38.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:38.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:11:38.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:11:38.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:11:38.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:11:38.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:11:38.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:11:38.329 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:11:43.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:11:43.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:11:43.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:11:43.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:11:43.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:11:43.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:11:43.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:11:43.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:11:43.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:11:43.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:11:43.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:11:43.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:11:43.347 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:11:43.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:11:43.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:11:43.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:11:43.348 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:11:43.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:11:43.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:11:43.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:43.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:11:43.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:11:43.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:11:43.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:11:43.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:11:43.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:11:43.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:11:43.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:11:43.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:43.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:11:43.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:11:43.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:11:43.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:11:43.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:11:43.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:11:43.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:11:43.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:11:43.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.355 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:11:43.355 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:11:43.355 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:11:43.355 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:11:43.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:11:43.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:11:43.839 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:11:43.881 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:11:43.883 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:11:43.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:43.887 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:11:43.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:43.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:43.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:11:43.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:43.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:43.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:43.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:11:43.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:11:43.932 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:11:43.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:43.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:43.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:43.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:43.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:44.311 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:11:44.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:44.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:44.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:44.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:44.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:11:44.797 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:11:45.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:11:45.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:45.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:45.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:45.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:45.727 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:11:46.200 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:11:46.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:46.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:46.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:46.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:46.672 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:11:47.143 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:11:47.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:47.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:47.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:47.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:47.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:11:47.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:47.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:47.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:47.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:47.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:47.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:47.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:11:47.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:47.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:47.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:47.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:11:47.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:11:47.752 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:11:47.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:47.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:47.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:47.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:47.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:48.084 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:11:48.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:48.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:48.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:48.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:48.555 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:11:48.884 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:11:49.028 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:11:49.501 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:11:49.973 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:11:50.444 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:11:50.917 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:11:51.390 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:11:51.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:51.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:51.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:51.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:51.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:51.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:51.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:11:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:51.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:51.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:51.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:11:51.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:11:51.806 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:11:51.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:51.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:51.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:51.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:51.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:51.861 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:11:52.297 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:11:52.333 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:11:52.806 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:11:53.278 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:11:53.750 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:11:54.221 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:11:54.692 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:11:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:11:55.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:55.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:55.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:55.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:55.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:55.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:55.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:11:55.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:55.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:55.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:55.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:11:55.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:11:55.629 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:11:55.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:55.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:11:55.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:11:55.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:55.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:55.637 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:11:56.109 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:11:56.498 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:11:56.580 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:11:56.969 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:11:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:11:57.526 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:11:57.916 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:11:57.998 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:11:58.469 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:11:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:11:59.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:11:59.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:11:59.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:11:59.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:11:59.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:11:59.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:11:59.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:11:59.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:11:59.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:11:59.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:11:59.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:11:59.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:11:59.346 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:11:59.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:11:59.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:11:59.346 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:04.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:12:04.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:12:04.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:04.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:04.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:04.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:04.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:04.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:12:04.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:04.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:12:04.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:12:04.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:12:04.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:12:04.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:12:04.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:04.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:04.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:12:04.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:12:04.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:12:04.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:04.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:12:04.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:12:04.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:12:04.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:04.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:04.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:12:04.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:12:04.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:12:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:04.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:12:04.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:12:04.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:12:04.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:04.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:04.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:12:04.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:12:04.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:12:04.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:12:04.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:12:04.366 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:12:04.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:04.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:04.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:12:04.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:12:04.890 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:12:04.893 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:04.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:04.895 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:12:04.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:04.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:04.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:04.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:04.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:04.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:04.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:04.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:04.941 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:04.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:04.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:04.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:04.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:04.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:05.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:12:05.326 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:05.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:05.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:05.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:05.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:05.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:12:05.806 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:05.808 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:12:06.265 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:12:06.286 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:06.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:06.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:06.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:06.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:06.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:12:06.772 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:07.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:12:07.252 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:07.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:07.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:07.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:07.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:07.684 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:12:07.732 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:08.156 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:12:08.218 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:08.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:08.629 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:12:08.698 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:09.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:12:09.178 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:09.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:09.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:09.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:09.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:09.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:12:09.664 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:10.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:12:10.144 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:10.521 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:12:10.624 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:10.993 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:12:11.110 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:11.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:12:11.590 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:11.939 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:12:12.071 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:12.412 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:12:12.557 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:12.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:12.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:12.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:12.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:12.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:12.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:12.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:12.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:12.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:12.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:12.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:12.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:12.593 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:12.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:12.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:12.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:12.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:12.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:12.884 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:12:13.278 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:13.355 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:12:13.757 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:13.760 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:12:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:12:14.237 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:14.301 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:12:14.723 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:14.773 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:12:15.203 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:15.244 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:12:15.683 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:15.715 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:12:16.163 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:16.185 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:12:16.643 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:16.656 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:12:17.123 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:17.127 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:12:17.598 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:12:17.603 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:18.071 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:12:18.083 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:18.544 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:12:18.569 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:19.016 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:12:19.049 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:19.489 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:12:19.529 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:19.962 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:12:20.016 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:20.434 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:12:20.495 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:20.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:20.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:20.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:20.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:20.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:20.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:20.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:20.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:20.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:20.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:20.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:20.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:20.522 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:20.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:20.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:20.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:20.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:20.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:20.869 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:20.905 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:12:21.339 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:21.342 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:12:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:12:21.810 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:21.849 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:12:22.301 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:22.322 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:12:22.757 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:22.794 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:12:23.228 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:23.265 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:12:23.699 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:23.736 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:12:24.170 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:24.209 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:12:24.640 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:24.681 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:12:25.117 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:25.154 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:12:25.588 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:25.625 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:12:26.059 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:26.098 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:12:26.529 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:26.570 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:12:27.006 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:27.042 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:12:27.477 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:27.513 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:12:27.948 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:27.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:27.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:27.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:27.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:27.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:27.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:27.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:27.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:27.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:27.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:27.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:27.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:27.979 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:27.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:27.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:27.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:27.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:27.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:27.986 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:12:28.373 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:28.458 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:12:28.849 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:28.851 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:12:28.931 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:12:29.319 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:29.322 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:12:29.404 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:12:29.790 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:29.876 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:12:30.266 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:30.269 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:12:30.348 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:12:30.737 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:30.820 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:12:31.208 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:31.293 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:12:31.684 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:31.765 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:12:32.154 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:32.236 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:12:32.625 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:32.710 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:12:33.096 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:33.182 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:12:33.573 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:33.654 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:12:34.043 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:34.125 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:12:34.514 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:34.599 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:12:34.985 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:35.071 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:12:35.461 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:35.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:35.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:35.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:35.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:35.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:35.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:35.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:12:35.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:12:35.479 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:12:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:35.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:35.479 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:40.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:12:40.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:12:40.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:40.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:40.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:40.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:40.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:40.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:12:40.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:40.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:12:40.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:12:40.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:12:40.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:12:40.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:12:40.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:40.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:40.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:12:40.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:12:40.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:12:40.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:40.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:12:40.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:12:40.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:12:40.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:40.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:40.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:12:40.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:12:40.504 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:12:40.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:40.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:12:40.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:12:40.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:12:40.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:40.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:40.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:12:40.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:12:40.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:12:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:12:40.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:12:40.511 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:12:40.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:40.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:40.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:12:40.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:12:41.039 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:12:41.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:41.039 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:41.040 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:12:41.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:41.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:41.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:41.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:41.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:41.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:41.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:41.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:41.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:41.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:41.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:41.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:41.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:41.466 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:12:41.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:41.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:41.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:41.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:41.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:12:42.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:12:42.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:42.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:42.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:42.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:42.884 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:12:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:43.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:43.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:43.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:43.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:43.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:43.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:43.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:43.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:43.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:43.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:43.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:43.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:43.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:43.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:43.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:43.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:43.357 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:12:43.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:43.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:43.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:43.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:43.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:12:44.301 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:12:44.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:44.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:44.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:44.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:44.774 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:12:45.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:12:45.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:45.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:45.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:45.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:45.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:45.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:45.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:45.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:45.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:45.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:45.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:45.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:45.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:45.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:45.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:45.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:45.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:45.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:45.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:45.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:45.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:12:46.192 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:12:46.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:12:47.138 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:12:47.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:47.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:47.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:47.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:47.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:47.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:47.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:47.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:47.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:47.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:47.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:47.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:47.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:12:47.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:12:47.554 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:12:47.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:47.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:12:52.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:12:52.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:12:52.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:52.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:52.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:52.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:52.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:52.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:12:52.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:52.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:12:52.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:12:52.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:12:52.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:12:52.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:12:52.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:52.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:52.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:12:52.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:12:52.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:12:52.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:52.572 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:12:52.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:12:52.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:12:52.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:52.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:52.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:12:52.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:12:52.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:12:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:12:52.575 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:12:52.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:12:52.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:52.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:12:52.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:12:52.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:12:52.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:12:52.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:12:52.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:12:52.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:12:52.579 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:12:52.579 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:12:52.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:12:53.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:12:53.109 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:12:53.111 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:12:53.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:53.114 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:12:53.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:53.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:53.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:53.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:53.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:53.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:53.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:53.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:53.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:53.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:53.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:53.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:53.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:53.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:12:53.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:53.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:53.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:53.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:54.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:12:54.481 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:12:54.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:54.953 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:12:55.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:55.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:55.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:55.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:55.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:55.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:55.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:12:55.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:55.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:55.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:55.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:12:55.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:12:55.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:55.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:12:55.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:12:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:55.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:12:55.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:55.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:55.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:55.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:55.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:12:56.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:12:56.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:56.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:56.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:56.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:56.843 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:12:57.316 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:12:57.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:12:57.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:12:57.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:12:57.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:12:57.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:12:57.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:12:57.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:12:57.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:12:57.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:12:57.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:12:57.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:12:57.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:12:57.450 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:12:57.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:12:57.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:02.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:02.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:02.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:02.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:02.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:02.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:02.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:02.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:02.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:02.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:02.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:02.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:02.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:02.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:02.467 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:02.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:02.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:02.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:02.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:02.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:02.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:02.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:02.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:02.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:02.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:02.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:02.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:02.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:02.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:02.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:02.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:02.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:02.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:02.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:02.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:02.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:02.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:02.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:02.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:02.475 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:02.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:02.479 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:02.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:02.999 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:03.001 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:03.003 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:03.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:03.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:03.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:03.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:03.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:03.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:03.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:03.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:03.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:03.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:03.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:03.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:03.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:03.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:03.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:03.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:03.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:03.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:13:04.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:13:04.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:04.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:04.848 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:13:05.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:05.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:05.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:05.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:05.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:05.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:05.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:05.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:05.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:05.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:05.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:05.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:05.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:05.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:05.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:05.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:05.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:05.320 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:13:05.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:05.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:05.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:05.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:05.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:13:06.266 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:13:06.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:06.739 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:13:07.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:13:07.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:07.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:07.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:07.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:07.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:07.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:07.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:07.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:07.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:07.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:07.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:07.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:07.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:07.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:07.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:07.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:07.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:07.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:07.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:07.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:07.682 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:13:08.155 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:13:08.628 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:13:09.101 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:13:09.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:09.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:09.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:09.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:09.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:09.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:09.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:09.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:09.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:09.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:09.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:09.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:09.513 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:09.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:09.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:14.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:14.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:14.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:14.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:14.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:14.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:14.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:14.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:14.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:14.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:14.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:14.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:14.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:14.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:14.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:14.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:14.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:14.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:14.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:14.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:14.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:14.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:14.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:14.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:14.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:14.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:14.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:14.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:14.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:14.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:14.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:14.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:14.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:14.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:14.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:14.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:14.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:14.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:14.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:14.540 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:14.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:14.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:15.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:15.064 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:15.066 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:15.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:15.069 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:15.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:15.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:15.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:15.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:15.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:15.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:15.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:15.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:15.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:15.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:15.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:15.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:15.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:15.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:15.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:15.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:15.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:15.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:15.966 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:13:16.438 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:13:16.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:16.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:16.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:16.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:16.909 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:13:17.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:17.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:17.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:17.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:17.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:17.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:17.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:17.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:17.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:17.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:17.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:17.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:17.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:17.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:17.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:17.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:17.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:17.379 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:13:17.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:17.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:17.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:17.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:17.850 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:13:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:13:18.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:18.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:18.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:18.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:18.794 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:13:19.267 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:13:19.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:19.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:19.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:19.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:19.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:19.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:19.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:19.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:19.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:19.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:19.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:19.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:19.403 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:19.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:19.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:19.403 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:24.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:24.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:24.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:24.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:24.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:24.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:24.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:24.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:24.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:24.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:24.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:24.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:24.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:24.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:24.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:24.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:24.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:24.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:24.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:24.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:24.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:24.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:24.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:24.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:24.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:24.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:24.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:24.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:24.424 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:24.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:24.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:24.902 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:24.951 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:24.954 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:24.956 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:24.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:24.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:24.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:24.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:24.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:24.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:24.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:24.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:24.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:25.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:25.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:25.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:25.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:25.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:25.372 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:25.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:25.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:25.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:25.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:25.845 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:13:26.317 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:13:26.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:26.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:26.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:26.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:26.788 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:13:27.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:27.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:27.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:27.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:27.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:27.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:27.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:27.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:27.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:27.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:27.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:27.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:27.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:27.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:27.201 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:27.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:27.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:27.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:27.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:27.201 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:32.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:32.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:32.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:32.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:32.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:32.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:32.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:32.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:32.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:32.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:32.213 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:32.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:32.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:32.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:32.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:32.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:32.217 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:32.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:32.218 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:32.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:32.219 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:32.220 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:32.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:32.220 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:32.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:32.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:32.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:32.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:32.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:32.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:32.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:32.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:32.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:32.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:32.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:32.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:32.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:32.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:32.232 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:32.232 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:32.232 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:32.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:32.715 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:32.767 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:32.768 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:32.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:32.769 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:32.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:32.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:32.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:32.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:32.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:32.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:32.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:32.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:32.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:32.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:32.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:32.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:33.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:33.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:33.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:33.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:33.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:33.659 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:13:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:13:34.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:34.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:34.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:34.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:34.603 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:13:34.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:34.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:34.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:34.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:34.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:34.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:34.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:34.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:34.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:34.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:34.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:34.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:34.989 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:34.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:34.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:39.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:39.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:39.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:39.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:39.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:39.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:40.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:40.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:40.001 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:40.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:40.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:40.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:40.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:40.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:40.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:40.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:40.005 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:40.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:40.006 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:40.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:40.007 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:40.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:40.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:40.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:40.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:40.008 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:40.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:40.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:40.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:40.010 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:40.010 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:40.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:40.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:40.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:40.011 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:40.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:40.011 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:40.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:40.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:40.016 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:40.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:40.020 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:40.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:40.545 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:40.545 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:40.547 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:40.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:40.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:40.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:40.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:40.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:40.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:40.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:40.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:40.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:40.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:40.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:40.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:40.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:40.971 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:41.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:41.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:41.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:41.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:41.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:41.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:41.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:41.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:41.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:41.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:41.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:41.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:41.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:41.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:41.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:41.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:41.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:41.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:41.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:41.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:41.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:41.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:41.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:41.442 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:13:41.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:41.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:41.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:41.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:41.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:41.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:41.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:41.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:41.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:41.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:41.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:41.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:41.458 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:41.458 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:41.459 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:41.459 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:41.459 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:41.459 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:41.459 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:41.459 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:46.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:46.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:46.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:46.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:46.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:46.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:46.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:46.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:46.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:46.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:46.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:46.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:46.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:46.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:46.467 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:46.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:46.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:46.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:46.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:46.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:46.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:46.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:46.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:46.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:46.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:46.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:46.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:46.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:46.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:46.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:46.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:46.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:46.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:46.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:46.479 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:46.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:46.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:46.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:47.007 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:47.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:47.010 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:47.012 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:47.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:47.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:47.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:47.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:47.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:47.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:47.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:47.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:47.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:47.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:47.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.435 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:47.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:47.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:47.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:47.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:47.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:47.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:47.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:47.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:47.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:47.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:47.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:47.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:47.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:47.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:47.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:47.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:47.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:47.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:47.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:47.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:47.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:47.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:47.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:47.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:47.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:47.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:47.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:47.922 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:47.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:47.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:47.923 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:47.923 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:47.923 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:47.923 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:47.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:47.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:47.924 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:52.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:52.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:52.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:52.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:52.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:52.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:52.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:52.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:52.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:52.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:52.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:52.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:52.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:52.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:52.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:52.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:52.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:52.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:52.945 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:52.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:52.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:52.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:52.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:52.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:52.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:52.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:52.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:52.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:52.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:52.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:52.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:52.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:52.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:52.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:52.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:52.953 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:52.953 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:52.953 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:52.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:52.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:53.437 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:53.477 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:53.480 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:53.482 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:13:53.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:53.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:53.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:53.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:53.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:53.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:53.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:53.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:53.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:53.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:53.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:53.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:53.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:53.907 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:13:53.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:53.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:53.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:53.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:53.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:53.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:53.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:53.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:53.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:53.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:53.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:13:53.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:53.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:53.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:53.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:13:53.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:13:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:53.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:13:53.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:13:53.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:53.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:13:54.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:13:54.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:54.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:13:54.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:13:54.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:54.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:54.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:54.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:54.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:54.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:54.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:54.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:54.431 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:13:54.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:54.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:54.431 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=320 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:13:59.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:13:59.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:13:59.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:59.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:59.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:59.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:59.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:13:59.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:59.443 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:59.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:13:59.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:13:59.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:13:59.446 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:13:59.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:59.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:59.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:13:59.447 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:13:59.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:13:59.447 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:13:59.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:13:59.449 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:13:59.449 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:13:59.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:59.450 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:59.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:13:59.450 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:13:59.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:13:59.450 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:13:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:13:59.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:13:59.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:13:59.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:59.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:13:59.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:13:59.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:13:59.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:13:59.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:13:59.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:13:59.461 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:13:59.461 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:13:59.461 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:13:59.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:13:59.466 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:13:59.944 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:13:59.988 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:13:59.990 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:13:59.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:13:59.992 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:00.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:00.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:00.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:00.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:00.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:00.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:00.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:00.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:00.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:00.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:00.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:00.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:00.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:00.417 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:00.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:00.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:00.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:00.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:00.888 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:14:01.361 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:14:01.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:01.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:01.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:01.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:14:02.306 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:14:02.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:02.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:02.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:02.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:02.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:14:03.248 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:14:03.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:03.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:03.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:03.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:03.721 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:14:04.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:04.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:04.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:04.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:04.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:04.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:04.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:04.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:04.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:04.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:04.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:04.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:04.103 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:09.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:09.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:09.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:09.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:09.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:09.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:09.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:09.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:09.117 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:09.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:09.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:09.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:09.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:09.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:09.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:09.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:09.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:09.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:09.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:09.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:09.123 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:09.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:09.123 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:09.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:09.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:09.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:09.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:09.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:09.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:09.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:09.135 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:09.135 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:09.135 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:09.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:09.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:09.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:09.662 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:09.665 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:09.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:09.667 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:09.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:09.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:09.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:09.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:09.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:09.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:09.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:09.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:09.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:09.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:09.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:09.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:09.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:09.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:09.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:09.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:09.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:10.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:10.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:10.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:10.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:10.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:10.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:10.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:10.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:10.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:10.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:10.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:10.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:10.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:10.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:10.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:10.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:10.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:10.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:10.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:10.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:10.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:10.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:10.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:10.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:10.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:10.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:10.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:10.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:10.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:10.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:10.278 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:10.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:10.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:10.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:10.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:10.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:10.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:10.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:10.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:10.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:15.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:15.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:15.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:15.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:15.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:15.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:15.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:15.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:15.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:15.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:15.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:15.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:15.290 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:15.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:15.290 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:15.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:15.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:15.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:15.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:15.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:15.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:15.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:15.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:15.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:15.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:15.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:15.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:15.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:15.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:15.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:15.295 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:15.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:15.295 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:15.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:15.295 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:15.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:15.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:15.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:15.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:15.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:15.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:15.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:15.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:15.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:15.298 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:15.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:15.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:15.821 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:15.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:15.824 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:15.828 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:15.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:15.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:15.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:15.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:15.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:15.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:15.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:15.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:15.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:15.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:15.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:15.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:15.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:16.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:16.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:16.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:16.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:16.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:16.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:14:17.197 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:14:17.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:17.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:17.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:17.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:17.670 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:14:18.142 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:14:18.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:18.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:18.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:18.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:18.613 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:14:19.084 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:14:19.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:19.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:19.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:19.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:19.558 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:14:19.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:19.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:19.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:19.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:19.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:19.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:19.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:19.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:19.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:19.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:19.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:19.938 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:19.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:24.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:24.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:24.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:24.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:24.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:24.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:24.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:24.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:24.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:24.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:24.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:24.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:24.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:24.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:24.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:24.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:24.957 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:24.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:24.957 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:24.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:24.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:24.958 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:24.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:24.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:24.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:24.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:24.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:24.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:24.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:24.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:24.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:24.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:24.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:24.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:24.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:24.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:24.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:24.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.963 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:24.963 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:24.963 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:24.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:24.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:24.968 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:25.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:25.489 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:25.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:25.492 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:25.495 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:25.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:25.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:25.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:25.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:25.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:25.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:25.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:25.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:25.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:25.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:25.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:25.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:25.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:25.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:25.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:25.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:25.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:25.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:26.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:26.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:26.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:26.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:26.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:26.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:26.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:26.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:26.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:26.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:26.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:26.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:26.327 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:26.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:26.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:26.328 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:31.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:31.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:31.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:31.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:31.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:31.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:31.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:31.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:31.338 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:31.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:31.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:31.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:31.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:31.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:31.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:31.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:31.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:31.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:31.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:31.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:31.348 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:31.348 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:31.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:31.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:31.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:31.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:31.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:31.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:31.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:31.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:31.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:31.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:31.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:31.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:31.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:31.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:31.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:31.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:31.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:31.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:31.358 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:31.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:31.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:31.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:31.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:31.884 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:31.885 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:31.886 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:31.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:31.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:31.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:31.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:31.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:31.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:31.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:31.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:31.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:31.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:31.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:31.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:31.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:31.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:32.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:32.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:32.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:32.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:32.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:32.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:32.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:32.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:32.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:32.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:32.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:32.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:32.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:32.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:32.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:32.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:32.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:32.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:32.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:32.725 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.726 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.727 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.727 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:32.727 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:37.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:37.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:37.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:37.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:37.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:37.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:37.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:37.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:37.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:37.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:37.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:37.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:37.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:37.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:37.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:37.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:37.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:37.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:37.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:37.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:37.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:37.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:37.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:37.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:37.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:37.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:37.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:37.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:37.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:37.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:37.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:37.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:37.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:37.755 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:37.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:37.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:37.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:38.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:38.283 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:38.286 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:38.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:38.288 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:38.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:38.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:38.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:38.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:38.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:38.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:38.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:38.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:38.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:38.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:38.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:38.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:38.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:38.706 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:38.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:38.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:38.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:38.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:39.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:39.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:39.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:39.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:39.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:39.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:39.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:39.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:39.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:39.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:39.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:39.112 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:39.112 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:39.112 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:44.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:44.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:44.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:44.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:44.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:44.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:44.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:44.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:44.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:44.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:44.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:44.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:44.133 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:44.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:44.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:44.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:44.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:44.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:44.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:44.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:44.138 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:44.138 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:44.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:44.138 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:44.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:44.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:44.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:44.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:44.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:44.142 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:44.142 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:44.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:44.142 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:44.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:44.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:44.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:44.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:44.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:44.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:44.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:44.147 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:44.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:44.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:44.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:44.149 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:44.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:44.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:44.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:44.631 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:44.671 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:44.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:44.675 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:44.678 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:44.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:44.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:44.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:44.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:44.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:44.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:44.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:44.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:44.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:44.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:44.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:44.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:44.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:45.101 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:45.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:45.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:45.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:45.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:14:45.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:45.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:45.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:45.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:45.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:45.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:45.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:45.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:45.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:45.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:45.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:45.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:45.646 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:45.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:45.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:45.646 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:50.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:50.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:50.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:50.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:50.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:50.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:50.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:50.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:50.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:50.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:50.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:50.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:50.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:50.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:50.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:50.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:50.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:50.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:50.664 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:50.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:50.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:50.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:50.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:50.667 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:50.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:50.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:50.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:50.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:50.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:50.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:50.671 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:50.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:50.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:50.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:50.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:50.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:50.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:50.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:50.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:50.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:50.679 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:50.679 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:50.679 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:50.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:50.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:50.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:51.162 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:51.208 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:51.210 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:51.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:51.212 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:51.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:51.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:51.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:51.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:51.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:51.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:51.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:51.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:51.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:51.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:51.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:51.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:51.634 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:51.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:51.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:51.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:51.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:52.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:52.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:52.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:52.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:52.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:52.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:52.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:52.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:52.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:52.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:52.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:52.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:52.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:52.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:52.040 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:52.040 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:14:57.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:57.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:57.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:57.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:57.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:57.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:57.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:57.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:57.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:57.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:14:57.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:14:57.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:14:57.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:14:57.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:57.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:57.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:14:57.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:14:57.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:14:57.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:57.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:14:57.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:14:57.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:57.061 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:14:57.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:14:57.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:57.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:14:57.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:14:57.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:14:57.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:14:57.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:14:57.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:57.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:14:57.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:14:57.065 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:14:57.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:14:57.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:14:57.546 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:14:57.610 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:14:57.612 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:14:57.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:57.614 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:14:57.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:57.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:57.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:14:57.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:57.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:57.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:57.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:14:57.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:14:57.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:57.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:14:57.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:14:57.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:57.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:58.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:14:58.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:58.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:58.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:58.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:58.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:14:58.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:14:58.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:14:58.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:14:58.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:14:58.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:14:58.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:14:58.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:14:58.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:14:58.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:14:58.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:14:58.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:14:58.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:14:58.555 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:14:58.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:14:58.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:03.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:03.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:03.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:03.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:03.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:03.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:03.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:03.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:03.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:03.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:03.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:15:03.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:15:03.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:15:03.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:03.579 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:03.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:03.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:15:03.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:03.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:15:03.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:03.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:03.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:15:03.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:03.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:03.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:15:03.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.585 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:15:03.585 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:15:03.585 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:15:03.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:03.590 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:15:04.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:15:04.106 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:15:04.108 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:15:04.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:15:04.110 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:15:04.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:04.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:04.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:15:04.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:04.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:04.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:04.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:15:04.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:15:04.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:15:04.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:04.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:04.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:05.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:15:05.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:15:05.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:15:05.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:05.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:05.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:05.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:05.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:15:05.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:05.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:05.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:05.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:15:05.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:15:05.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:15:05.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:05.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:05.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:05.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:05.952 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:15:06.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:06.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:15:06.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:06.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:06.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:06.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:06.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:06.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:06.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:06.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:06.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:06.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:06.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:06.470 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:15:06.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:06.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:11.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:11.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:11.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:11.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:11.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:11.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:11.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:11.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:11.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:11.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:11.488 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:15:11.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:15:11.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:15:11.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:11.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:11.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:15:11.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:11.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:11.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:15:11.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:11.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:15:11.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:15:11.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:11.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:11.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:11.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:15:11.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:11.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:15:11.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:11.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:15:11.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:15:11.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:11.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:11.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:11.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:15:11.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:11.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:15:11.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:11.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:15:11.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:15:11.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:15:11.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:15:11.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:15:11.506 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:15:11.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:15:11.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:11.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:11.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:15:11.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:15:12.029 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:15:12.031 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:15:12.033 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:15:12.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:15:12.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:12.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:12.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:15:12.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:12.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:12.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:12.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:15:12.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:15:12.459 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:15:12.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:12.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:12.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:12.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:12.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:15:13.404 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:15:13.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:13.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:13.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:13.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:13.876 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:15:14.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:15:14.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:14.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:14.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:14.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:14.822 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:15:15.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:15:15.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:15.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:15.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:15.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:15.766 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:15:16.237 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:15:16.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:16.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:16.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:16.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:16.711 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:15:16.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:16.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:16.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:16.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:16.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:17.183 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:15:17.655 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:15:18.139 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:15:18.611 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:15:19.084 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:15:19.557 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:15:20.029 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:15:20.502 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:15:20.975 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:15:21.447 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:15:21.920 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:15:22.393 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:15:22.864 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:15:23.336 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:15:23.809 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:15:24.282 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:15:24.754 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:15:25.227 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:15:25.700 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:15:26.172 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:15:26.646 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:15:27.118 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:15:27.590 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:15:28.063 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:15:28.536 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:15:29.008 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:15:29.482 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:15:29.954 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:15:30.426 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:15:30.900 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:15:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:15:31.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:31.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:31.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:31.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:31.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:31.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:31.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:31.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:31.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:31.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:31.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:31.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:31.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:31.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:31.709 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:15:36.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:36.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:36.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:36.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:36.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:36.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:36.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:36.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:36.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:36.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:36.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:15:36.725 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:15:36.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:15:36.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:36.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:36.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:36.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:15:36.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:36.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:15:36.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:36.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:15:36.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:15:36.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:36.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:36.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:36.728 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:15:36.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:36.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:15:36.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:36.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:15:36.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:15:36.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:36.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:36.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:36.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:15:36.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:36.732 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:15:36.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:15:36.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:15:36.738 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:15:36.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:36.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:15:37.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:15:37.270 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:15:37.271 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:15:37.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:15:37.273 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:15:37.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:37.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:37.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:15:37.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:37.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:37.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:37.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:15:37.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:15:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:15:37.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:37.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:37.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:37.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:38.165 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:15:38.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:15:38.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:38.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:38.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:38.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:39.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:15:39.583 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:15:39.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:39.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:39.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:39.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:40.054 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:15:40.527 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:15:40.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:40.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:40.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:40.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:41.000 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:15:41.471 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:15:41.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:41.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:41.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:41.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:41.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:15:42.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:42.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:42.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:42.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:42.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:42.415 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:15:42.888 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:15:43.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:15:43.833 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:15:44.302 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:15:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:15:45.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:15:45.705 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:15:46.179 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:15:46.651 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:15:47.125 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:15:47.599 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:15:48.071 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:15:48.542 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:15:49.015 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:15:49.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:49.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:49.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:49.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:49.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:49.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:49.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:49.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:49.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:49.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:49.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:49.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:49.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:49.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:49.196 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:49.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2694 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:15:54.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:15:54.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:15:54.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:54.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:54.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:54.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:54.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:15:54.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:54.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:54.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:15:54.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:15:54.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:15:54.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:15:54.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:54.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:15:54.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:15:54.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:15:54.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:15:54.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:54.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:15:54.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:15:54.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:54.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:15:54.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:15:54.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:54.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:15:54.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:15:54.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:15:54.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:15:54.221 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:15:54.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:15:54.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:15:54.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:15:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:15:54.745 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:15:54.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:15:54.749 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:15:54.751 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:15:54.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:15:54.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:15:54.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:15:54.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:54.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:54.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:54.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:15:54.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:15:55.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:15:55.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:55.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:55.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:55.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:55.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:15:56.120 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:15:56.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:56.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:56.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:56.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:15:57.064 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:15:57.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:57.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:57.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:57.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:57.535 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:15:58.009 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:15:58.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:58.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:58.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:58.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:58.481 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:15:58.953 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:15:59.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:15:59.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:15:59.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:15:59.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:15:59.424 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:15:59.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:15:59.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:15:59.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:15:59.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:59.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:15:59.897 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:16:00.370 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:16:00.842 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:16:01.314 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:16:01.788 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:16:02.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:16:02.733 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:16:03.210 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:16:03.682 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:16:03.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:16:03.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:03.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:16:03.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:16:03.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:03.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:03.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:03.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:03.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:03.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:03.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:03.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:03.814 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:16:03.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:03.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:03.814 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2070 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:08.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:08.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:08.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:08.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:08.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:08.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:08.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:08.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:16:08.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:16:08.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:16:08.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:08.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:08.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:08.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:16:08.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:08.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:16:08.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:08.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:16:08.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:16:08.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:08.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:08.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:08.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:16:08.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:08.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:16:08.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:08.843 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:16:08.843 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:16:08.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:08.843 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:08.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:08.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:16:08.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:08.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:16:08.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:16:08.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:16:08.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:16:08.850 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:16:08.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:08.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:08.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:16:09.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:16:09.379 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:16:09.380 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:16:09.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:16:09.381 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:16:09.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:16:09.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:16:09.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:16:09.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:09.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:16:09.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:16:09.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:16:09.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:16:09.806 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:16:09.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:09.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:09.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:09.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:10.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:16:10.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:16:10.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:10.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:10.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:10.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:11.223 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:16:11.695 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:16:11.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:11.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:11.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:11.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:12.166 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:16:12.639 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:16:12.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:12.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:12.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:12.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:13.112 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:16:13.584 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:16:13.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:13.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:13.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:13.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:14.055 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:16:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:16:14.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:16:14.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:16:14.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:14.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:14.528 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:16:15.001 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:16:15.473 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:16:15.947 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:16:16.419 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:16:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:16:17.365 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:16:17.838 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:16:18.310 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:16:18.784 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:16:18.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:16:18.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:18.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:16:18.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:16:18.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:18.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:18.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:18.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:18.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:18.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:18.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:18.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:18.920 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:16:18.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:18.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:18.920 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:23.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:23.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:23.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:23.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:23.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:23.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:23.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:23.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:23.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:23.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:23.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:16:23.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:16:23.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:16:23.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:23.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:23.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:23.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:16:23.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:23.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:16:23.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:23.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:23.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:16:23.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:23.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:23.931 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:16:23.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:23.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:16:23.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:16:23.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:16:23.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:16:23.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:16:23.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:16:23.934 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:16:23.934 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:16:23.934 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:23.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:16:24.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:16:24.453 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:16:24.454 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:16:24.455 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:16:24.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:16:24.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:16:24.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:16:24.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:16:24.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:24.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:16:24.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:16:24.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:16:24.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:16:24.889 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:16:24.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:24.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:24.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:24.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:25.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:16:25.833 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:16:25.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:25.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:25.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:26.306 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:16:26.778 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:16:26.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:26.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:27.249 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:16:27.722 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:16:27.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:27.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:27.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:27.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:28.194 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:16:28.666 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:16:28.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:29.137 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:16:29.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:16:29.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:16:29.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:16:29.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:29.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:16:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:16:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:16:31.028 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:16:31.501 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:16:31.973 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:16:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:16:32.919 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:16:33.391 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:16:33.864 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:16:33.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:16:33.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:16:33.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:16:33.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:16:33.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:33.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:33.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:33.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:34.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:34.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:34.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:34.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:34.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:34.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:34.002 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:34.002 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:16:39.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:39.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:39.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:39.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:39.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:39.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:39.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:39.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:39.014 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:39.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:39.014 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:16:39.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:16:39.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:16:39.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:39.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:39.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:39.019 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:16:39.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:39.019 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:16:39.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:39.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:16:39.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:16:39.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:39.022 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:39.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:39.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:16:39.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:39.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:16:39.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:39.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:16:39.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:16:39.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:39.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:39.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:39.026 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:16:39.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:39.026 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:16:39.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.030 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:16:39.030 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:16:39.030 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:16:39.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:39.035 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:16:39.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:16:39.552 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:16:39.553 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:16:39.554 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:16:39.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:16:39.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:16:40.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:40.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:40.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:40.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:16:40.932 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:16:41.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:41.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:41.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:41.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:41.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:16:41.880 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:16:42.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:42.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:42.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:42.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:42.354 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:16:42.826 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:16:43.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:43.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:43.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:43.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:43.298 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:16:43.771 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:16:44.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:44.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:44.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:44.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:16:44.716 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:16:45.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:16:45.662 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:16:46.134 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:16:46.608 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:16:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:16:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:16:48.026 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:16:48.498 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:16:48.970 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:16:49.444 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:16:49.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:49.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:49.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:49.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:49.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:49.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:49.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:49.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:49.567 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:16:49.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:49.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:54.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:54.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:54.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:54.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:54.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:54.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:54.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:54.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:54.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:54.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:54.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:16:54.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:16:54.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:16:54.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:54.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:54.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:54.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:16:54.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:54.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:16:54.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:54.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:16:54.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:16:54.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:54.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:54.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:54.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:16:54.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:54.593 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:16:54.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:54.595 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:16:54.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:16:54.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:54.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:54.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:54.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:16:54.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:54.596 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:16:54.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:54.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:16:54.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:16:54.603 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:16:54.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:54.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:54.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:54.606 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:16:54.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:59.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:16:59.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:16:59.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:59.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:59.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:59.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:59.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:16:59.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:59.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:59.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:16:59.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:16:59.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:16:59.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:16:59.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:59.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:59.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:16:59.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:16:59.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:16:59.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:16:59.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:16:59.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:16:59.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:16:59.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:59.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:59.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:16:59.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:16:59.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:16:59.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:16:59.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:16:59.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:16:59.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:16:59.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:59.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:16:59.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:16:59.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:16:59.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:16:59.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:16:59.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:16:59.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:16:59.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:16:59.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:16:59.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:16:59.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:16:59.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:16:59.635 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:16:59.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:16:59.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:16:59.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:16:59.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:17:00.118 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:17:00.159 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:17:00.162 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:17:00.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:17:00.164 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:17:00.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:00.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:00.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:17:00.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:17:00.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:17:00.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:17:00.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:17:00.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:17:00.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:17:00.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:00.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:00.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:00.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:01.062 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:17:01.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:17:01.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:01.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:01.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:01.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:02.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:17:02.479 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:17:02.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:02.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:02.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:02.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:02.951 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:17:03.424 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:17:03.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:03.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:03.896 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:17:04.368 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:17:04.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:04.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:04.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:04.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:04.839 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:17:05.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:17:05.785 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:17:06.257 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:17:06.728 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:17:07.202 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:17:07.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:17:08.146 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:17:08.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:08.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:08.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:08.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:08.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:08.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:08.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:08.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:08.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:08.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:08.225 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:17:08.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:08.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:08.225 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:08.226 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:08.226 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:08.226 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:08.226 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:08.226 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:08.226 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:13.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:13.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:13.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:13.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:13.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:13.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:13.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:13.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:13.239 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:13.239 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:13.239 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:17:13.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:17:13.241 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:17:13.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:13.241 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:13.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:13.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:17:13.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:13.241 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:17:13.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:13.242 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:17:13.243 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:17:13.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:13.243 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:13.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:13.243 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:17:13.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:13.243 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:17:13.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:13.244 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:13.244 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:17:13.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:17:13.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:17:13.246 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:17:13.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:17:13.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:13.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:13.247 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:17:13.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:18.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:18.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:18.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:18.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:18.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:18.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:18.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:18.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:18.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:18.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:18.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:17:18.263 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:17:18.263 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:17:18.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:18.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:18.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:17:18.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:18.265 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:18.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:18.265 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:17:18.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:18.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:17:18.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:18.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:18.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:17:18.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:17:18.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:17:18.268 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:17:18.269 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:18.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:17:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:17:18.792 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:17:18.794 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:17:18.794 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:17:18.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:17:18.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:18.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:18.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:17:18.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:17:18.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:17:18.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:17:18.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:17:18.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:17:19.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:17:19.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:19.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:19.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:19.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:19.696 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:17:20.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:17:20.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:20.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:20.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:20.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:20.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:17:21.114 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:17:21.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:21.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:21.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:21.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:21.585 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:17:22.058 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:17:22.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:22.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:22.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:22.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:22.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:17:23.003 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:17:23.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:23.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:23.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:23.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:23.474 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:17:23.947 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:17:24.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:17:24.891 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:17:25.362 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:17:25.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:17:26.306 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:17:26.779 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:17:26.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:26.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:26.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:26.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:26.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:26.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:26.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:26.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:26.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:26.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:26.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:26.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:26.854 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:17:26.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:26.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:26.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:31.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:31.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:31.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:31.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:31.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:31.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:31.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:31.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:31.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:31.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:31.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:17:31.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:17:31.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:17:31.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:31.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:31.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:31.871 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:17:31.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:31.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:17:31.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:31.872 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:17:31.872 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:17:31.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:31.872 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:31.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:31.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:17:31.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:31.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:17:31.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:31.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:31.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:17:31.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:17:31.876 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:17:31.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:17:31.877 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:17:31.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:31.878 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:31.878 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:17:31.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:36.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:36.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:36.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:36.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:36.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:36.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:36.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:36.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:36.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:36.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:36.897 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:17:36.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:17:36.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:17:36.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:36.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:36.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:36.902 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:17:36.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:36.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:17:36.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:36.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:36.905 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:17:36.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:36.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:36.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:17:36.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:36.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:17:36.912 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:17:36.912 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:17:36.912 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:36.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:36.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:36.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:17:37.395 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:17:37.433 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:17:37.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:17:37.435 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:17:37.436 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:17:37.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:37.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:37.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:17:37.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:17:37.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:17:37.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:17:37.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:17:37.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:17:37.867 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:17:37.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:37.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:37.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:37.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:38.339 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:17:38.812 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:17:38.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:38.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:38.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:38.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:17:39.756 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:17:39.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:39.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:39.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:39.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:40.228 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:17:40.701 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:17:40.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:40.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:17:41.645 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:17:41.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:41.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:41.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:41.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:42.116 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:17:42.589 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:17:43.062 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:17:43.534 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:17:44.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:17:44.478 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:17:44.951 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:17:45.423 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:17:45.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:45.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:45.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:45.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:45.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:45.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:45.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:45.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:45.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:45.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:45.497 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:17:45.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:45.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:45.497 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:17:50.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:50.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:50.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:50.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:50.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:50.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:50.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:50.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:50.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:50.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:50.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:17:50.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:17:50.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:17:50.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:50.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:50.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:17:50.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:50.516 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:17:50.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:50.517 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:17:50.517 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:17:50.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:50.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:50.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:50.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:17:50.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:50.518 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:17:50.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:50.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:17:50.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:17:50.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:50.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:50.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:50.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:17:50.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:50.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:17:50.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:50.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:17:50.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:17:50.523 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:17:50.523 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:50.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:50.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:50.524 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:17:55.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:17:55.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:17:55.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:55.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:55.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:55.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:55.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:17:55.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:55.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:55.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:17:55.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:17:55.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:17:55.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:17:55.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:55.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:55.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:17:55.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:17:55.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:17:55.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:17:55.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:55.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:17:55.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:17:55.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:55.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:55.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:17:55.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:17:55.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:17:55.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:17:55.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:55.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:17:55.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:17:55.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:55.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:17:55.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:17:55.553 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:17:55.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:17:55.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:17:55.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:55.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:17:55.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:17:55.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:17:55.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:17:55.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:17:55.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.559 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:17:55.559 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:17:55.559 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:17:55.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:17:55.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:17:55.564 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:17:56.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:17:56.084 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:17:56.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:17:56.086 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:17:56.087 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:17:56.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:17:56.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:17:56.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:17:56.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:17:56.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:17:56.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:17:56.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:17:56.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:17:56.513 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:17:56.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:56.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:56.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:56.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:56.985 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:17:57.456 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:17:57.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:57.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:57.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:57.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:57.930 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:17:58.402 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:17:58.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:58.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:58.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:58.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:58.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:17:59.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:17:59.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:17:59.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:17:59.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:17:59.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:17:59.818 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:18:00.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:18:00.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:00.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:00.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:00.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:00.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:18:01.234 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:18:01.704 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:18:02.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:18:02.650 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:18:03.122 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:18:03.593 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:18:04.067 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:18:04.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:18:04.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:18:04.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:04.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:04.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:04.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:04.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:04.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:04.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:04.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:04.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:04.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:04.144 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:18:09.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:09.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:09.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:09.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:09.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:09.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:09.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:09.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:09.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:09.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:09.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:18:09.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:18:09.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:18:09.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:09.167 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:09.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:09.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:18:09.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:09.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:18:09.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:09.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:18:09.172 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:18:09.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:09.172 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:09.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:09.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:18:09.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:09.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:18:09.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:09.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:18:09.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:18:09.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:09.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:09.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:09.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:18:09.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:09.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:18:09.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:18:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:18:09.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:18:09.181 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:18:09.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:09.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:09.183 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:18:09.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:14.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:14.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:14.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:14.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:14.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:14.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:14.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:14.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:14.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:14.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:14.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:18:14.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:18:14.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:18:14.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:14.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:14.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:14.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:18:14.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:14.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:18:14.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:14.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:14.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:18:14.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:14.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:14.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:18:14.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:18:14.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:18:14.200 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:18:14.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:14.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:14.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:18:14.682 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:18:14.724 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:18:14.725 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:18:14.727 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:18:14.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:18:14.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:18:14.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:18:14.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:18:14.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:18:14.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:18:14.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:18:14.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:18:14.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:18:15.154 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:18:15.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:15.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:15.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:15.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:15.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:18:16.098 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:18:16.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:16.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:16.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:16.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:16.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:18:17.043 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:18:17.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:17.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:17.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:17.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:17.514 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:18:17.987 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:18:18.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:18.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:18.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:18.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:18.469 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:18:18.941 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:18:19.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:19.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:19.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:19.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:19.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:18:19.885 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:18:20.357 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:18:20.829 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:18:21.300 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:18:21.773 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:18:22.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:18:22.718 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:18:23.189 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:18:23.662 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:18:24.135 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:18:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:18:25.078 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:18:25.551 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:18:26.023 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:18:26.495 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:18:26.966 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:18:27.440 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:18:27.912 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:18:28.384 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:18:28.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:18:28.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:18:28.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:28.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:28.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:28.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:28.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:28.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:28.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:28.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:28.785 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:18:28.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:28.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:28.785 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3149 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:33.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:33.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:33.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:33.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:33.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:33.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:33.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:33.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:33.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:33.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:33.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:18:33.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:18:33.806 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:18:33.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:33.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:33.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:33.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:18:33.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:33.807 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:18:33.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:33.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:18:33.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:18:33.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:33.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:33.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:33.811 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:18:33.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:33.811 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:18:33.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:33.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:18:33.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:18:33.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:33.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:33.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:33.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:18:33.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:33.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:18:33.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:33.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:18:33.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:18:33.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:18:33.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:18:33.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:18:33.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:18:33.821 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:18:33.822 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:33.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:33.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:33.825 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:18:33.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:38.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:38.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:38.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:38.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:38.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:38.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:38.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:38.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:38.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:38.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:38.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:18:38.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:18:38.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:18:38.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:38.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:38.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:38.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:18:38.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:38.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:18:38.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:38.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:18:38.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:18:38.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:38.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:38.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:38.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:18:38.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:38.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:18:38.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:38.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:18:38.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:18:38.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:38.856 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:38.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:38.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:18:38.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:38.856 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:18:38.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:38.861 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:18:38.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:18:38.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:18:38.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:18:38.861 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.862 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:18:38.862 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:18:38.862 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:18:38.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:38.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:38.867 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:18:39.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:18:39.400 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:18:39.403 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:18:39.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:18:39.405 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:18:39.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:18:39.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:18:39.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:18:39.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:18:39.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:18:39.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:18:39.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:18:39.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:18:39.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:18:39.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:39.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:39.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:39.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:40.289 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:18:40.762 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:18:40.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:40.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:41.234 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:18:41.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:18:41.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:41.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:41.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:41.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:42.180 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:18:42.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:18:42.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:42.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:42.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:42.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:43.124 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:18:43.595 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:18:43.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:43.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:43.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:43.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:44.068 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:18:44.541 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:18:45.013 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:18:45.484 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:18:45.957 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:18:46.429 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:18:46.901 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:18:47.375 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:18:47.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:18:47.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:18:47.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:47.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:47.444 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:18:47.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:47.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:47.445 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:18:52.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:52.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:52.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:52.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:52.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:52.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:52.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:52.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:52.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:52.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:52.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:18:52.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:18:52.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:18:52.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:52.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:52.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:52.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:18:52.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:52.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:18:52.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:52.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:18:52.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:18:52.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:52.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:52.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:52.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:18:52.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:52.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:18:52.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:52.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:18:52.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:18:52.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:52.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:52.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:52.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:18:52.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:52.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:18:52.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:52.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:18:52.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:18:52.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:18:52.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:18:52.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:18:52.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:18:52.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:18:52.485 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:18:52.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:52.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:52.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:52.488 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:18:57.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:18:57.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:18:57.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:57.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:57.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:57.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:57.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:18:57.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:57.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:57.522 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:18:57.522 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:18:57.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:18:57.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:18:57.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:57.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:57.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:18:57.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:18:57.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:18:57.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:18:57.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:57.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:18:57.537 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:18:57.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:57.537 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:57.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:18:57.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:18:57.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:18:57.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:18:57.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:57.541 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:18:57.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:18:57.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:57.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:18:57.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:18:57.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:18:57.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:18:57.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:18:57.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:18:57.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:18:57.547 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:18:57.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:18:57.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:18:58.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:18:58.070 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:18:58.071 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:18:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:18:58.073 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:18:58.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:18:58.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:18:58.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:18:58.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:18:58.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:18:58.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:18:58.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:18:58.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:18:58.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:18:58.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:58.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:58.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:58.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:58.974 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:18:59.447 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:18:59.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:18:59.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:18:59.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:18:59.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:18:59.920 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:19:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:19:00.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:00.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:00.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:00.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:00.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:19:01.336 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:19:01.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:01.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:01.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:01.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:01.808 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:19:02.280 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:19:02.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:02.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:02.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:02.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:02.752 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:19:03.225 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:19:03.697 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:19:04.169 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:19:04.640 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:19:05.113 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:19:05.586 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:19:06.058 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:19:06.529 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:19:07.002 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:19:07.475 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:19:07.946 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:19:08.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:19:08.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:19:08.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:08.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:08.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:08.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:08.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:08.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:08.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:08.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:08.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:08.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:08.131 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:19:13.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:13.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:13.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:13.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:13.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:13.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:13.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:13.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:13.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:13.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:13.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:19:13.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:19:13.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:19:13.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:13.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:13.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:13.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:19:13.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:13.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:19:13.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:13.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:19:13.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:19:13.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:13.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:13.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:13.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:19:13.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:13.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:19:13.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:13.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:19:13.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:19:13.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:13.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:13.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:13.165 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:19:13.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:13.165 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:19:13.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.169 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:19:13.169 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:19:13.169 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:19:13.169 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:13.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:13.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:13.171 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:19:13.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:18.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:18.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:18.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:18.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:18.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:18.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:18.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:18.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:18.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:18.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:18.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:19:18.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:19:18.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:19:18.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:18.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:18.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:18.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:19:18.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:18.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:19:18.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:18.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:19:18.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:19:18.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:18.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:18.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:18.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:19:18.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:18.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:19:18.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:18.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:19:18.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:19:18.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:18.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:18.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:18.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:19:18.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:18.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:19:18.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:19:18.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:19:18.210 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:19:18.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:19:18.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:19:18.737 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:19:18.739 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:19:18.741 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:19:18.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:19:18.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:19:18.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:19:18.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:19:18.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:19:18.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:19:18.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:19:18.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:19:18.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:19:19.167 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:19:19.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:19.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:19.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:19.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:19.638 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:19:20.111 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:19:20.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:20.584 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:19:21.056 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:19:21.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:21.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:21.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:21.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:21.527 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:19:22.000 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:19:22.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:22.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:22.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:22.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:22.472 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:19:22.944 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:19:23.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:23.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:23.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:23.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:23.415 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:19:23.889 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:19:24.361 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:19:24.833 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:19:25.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:19:25.778 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:19:26.250 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:19:26.722 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:19:27.193 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:19:27.666 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:19:28.139 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:19:28.610 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:19:29.082 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:19:29.552 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:19:29.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:19:29.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:19:29.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:29.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:29.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:29.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:29.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:29.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:29.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:29.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:29.798 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:19:29.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:29.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:29.798 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:19:34.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:34.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:34.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:34.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:34.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:34.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:34.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:34.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:34.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:34.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:34.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:19:34.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:19:34.812 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:19:34.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:34.812 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:34.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:34.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:19:34.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:34.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:19:34.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:34.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:19:34.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:19:34.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:34.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:34.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:34.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:19:34.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:34.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:19:34.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:34.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:34.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:19:34.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:19:34.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:19:34.820 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:19:34.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:34.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:34.822 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:19:34.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:39.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:19:39.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:19:39.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:39.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:39.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:39.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:39.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:19:39.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:39.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:39.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:19:39.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:19:39.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:19:39.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:19:39.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:39.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:39.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:19:39.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:19:39.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:19:39.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:19:39.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:39.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:19:39.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:19:39.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:39.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:39.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:19:39.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:19:39.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:19:39.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:19:39.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:39.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:19:39.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:19:39.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:39.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:19:39.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:19:39.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:19:39.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:19:39.853 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:19:39.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:19:39.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:19:39.858 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:19:39.858 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:19:39.858 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:19:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:19:39.863 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:19:40.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:19:40.379 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:19:40.380 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:19:40.382 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:19:40.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:19:40.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:19:40.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:19:40.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:19:40.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:19:40.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:19:40.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:19:40.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:19:40.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:19:40.813 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:19:40.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:40.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:40.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:40.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:41.284 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:19:41.755 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:19:41.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:41.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:41.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:41.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:42.229 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:19:42.701 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:19:42.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:42.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:42.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:42.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:43.173 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:19:43.644 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:19:43.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:43.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:43.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:43.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:44.117 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:19:44.589 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:19:44.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:19:44.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:19:44.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:19:44.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:19:45.062 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:19:45.532 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:19:46.006 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:19:46.478 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:19:46.950 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:19:47.423 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:19:47.896 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:19:48.368 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:19:48.839 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:19:49.312 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:19:49.784 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:19:50.256 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:19:50.727 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:19:51.201 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:19:51.673 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:19:52.145 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:19:52.616 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:19:53.089 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:19:53.562 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:19:54.034 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:19:54.505 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:19:54.978 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:19:55.450 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:19:55.922 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:19:56.393 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:19:56.866 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:19:57.339 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:19:57.811 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:19:58.282 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:19:58.756 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:19:59.228 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:19:59.700 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:20:00.173 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:20:00.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:20:00.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:20:00.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:00.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:00.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:00.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:00.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:00.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:00.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:00.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:00.449 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:20:00.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:00.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:05.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:05.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:05.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:05.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:05.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:05.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:05.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:05.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:05.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:05.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:05.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:20:05.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:20:05.471 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:20:05.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:05.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:05.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:05.472 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:20:05.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:05.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:20:05.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:05.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:20:05.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:20:05.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:05.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:05.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:05.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:20:05.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:05.477 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:20:05.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:05.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:20:05.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:20:05.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:05.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:05.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:05.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:20:05.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:05.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:20:05.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:20:05.483 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:20:05.483 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.483 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:05.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:05.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:05.485 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:20:10.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:10.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:10.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:10.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:10.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:10.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:10.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:10.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:10.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:10.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:10.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:20:10.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:20:10.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:20:10.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:10.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:10.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:10.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:20:10.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:10.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:20:10.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:10.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:20:10.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:20:10.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:10.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:10.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:10.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:20:10.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:10.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:20:10.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:10.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:20:10.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:20:10.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:10.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:10.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:10.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:20:10.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:10.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:20:10.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:20:10.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:20:10.509 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:10.514 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:20:10.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:20:11.029 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:20:11.030 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:20:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:20:11.031 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:20:11.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:20:11.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:11.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:11.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:11.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:11.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:20:12.411 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:20:12.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:12.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:12.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:12.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:12.883 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:20:13.358 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:20:13.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:13.829 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:20:14.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:20:14.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:14.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:14.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:14.776 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:20:15.247 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:20:15.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:15.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:15.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:15.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:15.721 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:20:16.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:20:16.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:20:17.139 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:20:17.612 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:20:18.084 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:20:18.547 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:20:19.010 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:20:19.474 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:20:19.944 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:20:20.416 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:20:20.879 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:20:21.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:21.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:21.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:21.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:21.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:21.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:21.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:21.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:21.043 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:20:21.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:21.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:26.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:26.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:26.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:26.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:26.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:26.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:26.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:26.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:26.059 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:26.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:26.060 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:20:26.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:20:26.062 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:20:26.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:26.063 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:26.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:26.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:20:26.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:26.064 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:20:26.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:26.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:20:26.066 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:20:26.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:26.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:26.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:26.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:20:26.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:26.066 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:20:26.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:26.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:20:26.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:20:26.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:26.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:26.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:26.068 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:20:26.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:26.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:20:26.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:26.071 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:20:26.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:20:26.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:20:26.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:20:26.072 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:20:26.072 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:26.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:26.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:26.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:26.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:26.074 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:20:26.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:26.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:31.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:31.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:31.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:31.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:31.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:31.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:31.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:31.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:31.090 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:31.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:31.091 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:20:31.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:20:31.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:20:31.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:31.095 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:31.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:31.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:20:31.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:31.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:20:31.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:31.098 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:20:31.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:20:31.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:31.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:31.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:31.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:20:31.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:31.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:20:31.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:31.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:20:31.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:20:31.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:31.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:31.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:31.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:20:31.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:31.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:20:31.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:31.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:20:31.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:20:31.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:20:31.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:20:31.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:20:31.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:20:31.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:20:31.107 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:20:31.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:31.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:31.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:31.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:20:31.590 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:20:31.637 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:20:31.639 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:20:31.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:20:31.640 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:20:32.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:20:32.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:32.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:32.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:32.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:32.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:20:33.009 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:20:33.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:33.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:33.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:33.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:33.485 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:20:33.957 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:20:34.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:34.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:34.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:34.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:34.432 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:20:34.904 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:20:35.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:35.379 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:20:35.851 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:20:36.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:36.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:36.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:36.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:36.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:20:36.798 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:20:37.273 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:20:37.745 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:20:38.221 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:20:38.693 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:20:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:20:39.640 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:20:40.115 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:20:40.587 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:20:41.063 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:20:41.535 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:20:42.010 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:20:42.482 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:20:42.957 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:20:43.429 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:20:43.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:43.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:43.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:43.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:43.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:43.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:43.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:43.658 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:20:48.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:48.662 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:48.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:48.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:48.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:48.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:48.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:48.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:48.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:48.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:48.672 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:20:48.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:20:48.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:20:48.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:48.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:48.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:48.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:20:48.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:48.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:20:48.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:48.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:20:48.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:20:48.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:48.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:48.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:48.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:20:48.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:48.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:20:48.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:48.687 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:20:48.687 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:20:48.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:48.687 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:48.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:48.688 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:20:48.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:48.688 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:20:48.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:20:48.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:20:48.692 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:20:48.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:48.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:48.694 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:20:48.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:53.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:20:53.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:20:53.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:53.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:53.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:53.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:53.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:20:53.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:53.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:53.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:20:53.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:20:53.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:20:53.714 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:20:53.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:53.714 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:53.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:20:53.715 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:20:53.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:20:53.715 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:20:53.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:53.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:20:53.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:20:53.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:53.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:20:53.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:20:53.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:53.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:20:53.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:20:53.719 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:20:53.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:20:53.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:20:53.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.722 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:20:53.722 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:20:53.722 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:20:53.722 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:20:53.727 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:20:54.205 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:20:54.248 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:20:54.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:20:54.251 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:20:54.252 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:20:54.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:20:54.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:20:54.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:20:54.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:20:54.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:20:54.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:20:54.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:20:54.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:20:54.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:20:54.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:20:54.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:20:54.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:20:54.677 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:20:54.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:54.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:54.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:54.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:55.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:20:55.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:20:55.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:55.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:55.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:55.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:56.094 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:20:56.566 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:20:56.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:56.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:56.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:56.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:57.037 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:20:57.511 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:20:57.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:57.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:57.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:57.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:20:58.455 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:20:58.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:20:58.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:20:58.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:20:58.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:20:58.926 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:20:59.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:20:59.871 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:21:00.343 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:21:00.815 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:21:01.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:21:01.760 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:21:02.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:21:02.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:02.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:02.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:02.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:02.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:02.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:02.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:02.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:02.308 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:02.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:02.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:07.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:07.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:07.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:07.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:07.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:07.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:07.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:07.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:07.323 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:07.323 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:07.323 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:21:07.327 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:21:07.327 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:21:07.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:07.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:07.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:07.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:21:07.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:07.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:21:07.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:07.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:21:07.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:21:07.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:07.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:07.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:07.331 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:21:07.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:07.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:21:07.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:07.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:07.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:21:07.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:21:07.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:21:07.338 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:21:07.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:07.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:07.339 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:07.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:12.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:12.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:12.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:12.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:12.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:12.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:12.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:12.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:12.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:12.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:12.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:21:12.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:21:12.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:21:12.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:12.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:12.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:12.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:21:12.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:12.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:21:12.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:12.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:21:12.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:21:12.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:12.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:12.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:12.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:21:12.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:12.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:21:12.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:12.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:21:12.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:21:12.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:12.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:12.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:12.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:21:12.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:12.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:21:12.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:12.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:21:12.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:21:12.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:21:12.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:21:12.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:21:12.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:21:12.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:21:12.366 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:21:12.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:12.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:21:12.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:21:12.885 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:21:12.886 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:21:12.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:21:12.887 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:21:12.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:12.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:12.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:21:12.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:12.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:21:12.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:21:12.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:21:12.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:21:12.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:21:12.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:21:12.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:12.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:13.321 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:21:13.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:13.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:13.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:13.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:13.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:21:14.266 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:21:14.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:14.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:14.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:14.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:14.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:21:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:21:15.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:15.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:15.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:15.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:15.684 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:21:16.156 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:21:16.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:16.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:16.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:16.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:16.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:21:17.099 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:21:17.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:17.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:17.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:17.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:17.573 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:21:18.045 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:21:18.517 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:21:18.988 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:21:19.461 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:21:19.933 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:21:20.405 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:21:20.876 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:21:20.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:20.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:20.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:20.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:20.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:20.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:20.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:20.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:20.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:20.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:20.904 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:20.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:20.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:20.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:25.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:25.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:25.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:25.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:25.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:25.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:25.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:25.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:21:25.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:21:25.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:21:25.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:25.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:25.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:25.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:21:25.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:25.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:21:25.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:25.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:21:25.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:21:25.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:25.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:25.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:25.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:21:25.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:25.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:21:25.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:25.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:21:25.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:21:25.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:25.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:25.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:25.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:21:25.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:25.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:21:25.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:21:25.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:21:25.936 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:21:25.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:25.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:25.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:25.938 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:30.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:30.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:30.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:30.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:30.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:30.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:30.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:30.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:30.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:30.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:21:30.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:21:30.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:21:30.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:30.957 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:30.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:30.957 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:21:30.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:30.957 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:21:30.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:30.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:30.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:21:30.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:30.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:21:30.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:21:30.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:30.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:30.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:30.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:21:30.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:30.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:21:30.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:21:30.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:21:30.964 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:21:30.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:21:30.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:30.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:30.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:21:31.448 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:21:31.485 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:21:31.486 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:21:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:21:31.488 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:21:31.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:31.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:31.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:21:31.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:31.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:21:31.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:21:31.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:21:31.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:21:31.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:21:31.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:21:31.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:31.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:31.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:21:31.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:31.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:31.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:31.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:32.391 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:21:32.863 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:21:32.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:32.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:32.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:32.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:33.334 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:21:33.807 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:21:33.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:33.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:33.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:33.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:34.280 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:21:34.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:21:34.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:34.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:34.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:34.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:35.223 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:21:35.696 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:21:35.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:35.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:35.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:35.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:36.169 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:21:36.641 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:21:37.112 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:21:37.585 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:21:38.057 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:21:38.529 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:21:39.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:21:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:21:39.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:39.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:39.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:39.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:39.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:39.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:39.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:39.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:39.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:39.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:39.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:39.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:39.554 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:39.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:39.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:39.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:39.554 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:39.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:39.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:39.555 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:21:44.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:44.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:44.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:44.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:44.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:44.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:44.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:44.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:44.566 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:44.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:44.567 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:21:44.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:21:44.571 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:21:44.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:44.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:44.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:44.572 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:21:44.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:44.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:21:44.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:44.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:21:44.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:21:44.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:44.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:44.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:44.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:21:44.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:44.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:21:44.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:44.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:21:44.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:21:44.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:44.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:44.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:44.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:21:44.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:44.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:21:44.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:44.590 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:21:44.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:21:44.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:21:44.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:21:44.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:21:44.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.591 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:21:44.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:21:44.592 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:21:44.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:21:44.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:21:44.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:44.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:44.595 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:44.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:49.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:49.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:49.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:49.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:49.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:49.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:49.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:21:49.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:21:49.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:21:49.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:21:49.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:49.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:49.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:49.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:21:49.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:21:49.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:21:49.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:49.626 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:21:49.626 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:21:49.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:49.627 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:49.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:49.627 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:21:49.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:21:49.627 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:21:49.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:49.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:21:49.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:21:49.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:49.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:21:49.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:21:49.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:21:49.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:21:49.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:21:49.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:21:49.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:21:49.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:21:49.637 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:21:49.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:21:49.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:21:50.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:21:50.165 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:21:50.168 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:21:50.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:21:50.170 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:21:50.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:50.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:50.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:21:50.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:50.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:21:50.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:21:50.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:21:50.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:21:50.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:21:50.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:21:50.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:50.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:21:50.591 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:21:50.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:50.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:50.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:50.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:51.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:21:51.536 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:21:51.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:51.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:51.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:51.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:52.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:21:52.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:21:52.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:52.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:52.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:52.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:21:53.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:21:53.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:53.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:53.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:53.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:53.897 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:21:54.368 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:21:54.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:54.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:54.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:54.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:54.840 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:21:55.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:21:55.786 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:21:56.258 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:21:56.729 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:21:57.202 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:21:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:21:58.146 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:21:58.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:21:58.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:21:58.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:21:58.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:21:58.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:21:58.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:21:58.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:21:58.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:21:58.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:21:58.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:21:58.217 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:21:58.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:21:58.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:03.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:03.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:03.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:03.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:03.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:03.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:03.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:03.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:03.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:03.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:03.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:22:03.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:22:03.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:22:03.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:03.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:03.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:03.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:22:03.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:03.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:22:03.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:03.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:22:03.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:22:03.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:03.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:03.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:03.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:22:03.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:03.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:22:03.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:03.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:22:03.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:22:03.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:03.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:03.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:03.238 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:22:03.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:03.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:22:03.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:22:03.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:22:03.241 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:22:03.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:03.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:03.243 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:22:03.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:08.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:08.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:08.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:08.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:08.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:08.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:08.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:08.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:08.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:08.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:08.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:22:08.268 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:22:08.269 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:22:08.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:08.269 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:08.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:08.270 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:22:08.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:08.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:22:08.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:08.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:22:08.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:22:08.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:08.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:08.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:08.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:22:08.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:08.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:22:08.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:08.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:22:08.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:22:08.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:08.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:08.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:08.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:22:08.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:08.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:22:08.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:08.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:22:08.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:22:08.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:22:08.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:22:08.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:22:08.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:22:08.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:22:08.282 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:22:08.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:08.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:08.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:22:08.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:22:08.811 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:22:08.812 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:22:08.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:22:08.814 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:22:08.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:22:08.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:22:08.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:22:08.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:08.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:22:08.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:22:08.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:22:08.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:22:08.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:22:08.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:22:08.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:08.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:09.237 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:22:09.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:09.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:09.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:09.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:09.708 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:22:10.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:22:10.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:10.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:10.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:10.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:10.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:22:11.125 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:22:11.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:11.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:11.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:11.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:11.597 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:22:12.068 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:22:12.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:12.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:12.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:12.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:12.542 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:22:13.014 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:22:13.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:13.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:13.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:13.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:13.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:22:13.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:22:14.432 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:22:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:22:15.375 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:22:15.848 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:22:16.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:22:16.792 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:22:17.264 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:22:17.737 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:22:18.209 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:22:18.681 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:22:19.152 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:22:19.625 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:22:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:22:20.569 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:22:21.040 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:22:21.513 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:22:21.986 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:22:22.458 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:22:22.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:22:22.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:22:22.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:22.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:22.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:22.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:22.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:22.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:22.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:22.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:22.866 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:22:22.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:22.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:27.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:27.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:27.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:27.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:27.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:27.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:27.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:27.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:27.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:27.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:27.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:22:27.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:22:27.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:22:27.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:27.878 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:27.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:27.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:22:27.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:27.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:22:27.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:27.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:27.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:22:27.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:27.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:27.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:22:27.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:22:27.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:22:27.883 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:22:27.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:27.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:27.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:27.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:27.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:27.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:27.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:27.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:27.885 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:22:32.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:32.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:32.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:32.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:32.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:32.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:32.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:32.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:32.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:32.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:32.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:22:32.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:22:32.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:22:32.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:32.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:32.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:22:32.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:32.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:22:32.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:32.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:22:32.907 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:22:32.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:32.907 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:32.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:32.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:22:32.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:32.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:22:32.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:32.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:22:32.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:22:32.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:32.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:32.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:32.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:22:32.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:32.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:22:32.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:22:32.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:22:32.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:22:32.913 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:22:32.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:32.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:32.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:32.917 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:22:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:22:33.433 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:22:33.435 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:22:33.436 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:22:33.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:22:33.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:22:33.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:22:33.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:22:33.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:33.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:22:33.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:22:33.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:22:33.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:22:33.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:22:33.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:22:33.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:33.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:33.868 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:22:33.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:33.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:33.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:33.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:34.340 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:22:34.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:22:34.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:34.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:34.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:34.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:22:35.757 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:22:35.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:35.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:35.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:35.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:36.228 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:22:36.701 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:22:36.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:36.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:36.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:36.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:37.174 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:22:37.646 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:22:37.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:37.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:37.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:37.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:38.116 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:22:38.590 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:22:39.062 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:22:39.534 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:22:40.005 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:22:40.479 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:22:40.951 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:22:41.423 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:22:41.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:22:41.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:22:41.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:41.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:41.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:41.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:41.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:41.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:41.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:41.502 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:41.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:22:46.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:46.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:46.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:46.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:46.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:46.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:46.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:46.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:46.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:46.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:46.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:22:46.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:22:46.517 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:22:46.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:46.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:46.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:46.518 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:22:46.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:46.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:22:46.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:46.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:22:46.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:22:46.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:46.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:46.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:46.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:22:46.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:46.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:22:46.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:46.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:22:46.523 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:22:46.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:46.523 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:46.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:46.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:22:46.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:46.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:22:46.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:22:46.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:22:46.527 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:22:46.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:46.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:46.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:46.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:46.529 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:22:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:51.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:22:51.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:22:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:51.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:51.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:22:51.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:51.543 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:51.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:22:51.544 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:22:51.547 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:22:51.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:22:51.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:51.548 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:51.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:22:51.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:22:51.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:22:51.549 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:22:51.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:51.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:22:51.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:22:51.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:51.551 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:51.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:22:51.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:22:51.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:22:51.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:22:51.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:51.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:22:51.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:22:51.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:51.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:22:51.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:22:51.554 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:22:51.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:22:51.554 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:22:51.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:22:51.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:22:51.558 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:22:51.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:22:51.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:22:52.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:22:52.086 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:22:52.089 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:22:52.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:22:52.091 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:22:52.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:22:52.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:22:52.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:22:52.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:52.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:22:52.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:22:52.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:22:52.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:22:52.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:22:52.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:22:52.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:52.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:22:52.513 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:22:52.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:52.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:52.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:52.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:22:53.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:22:53.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:53.929 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:22:54.401 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:22:54.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:54.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:54.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:54.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:54.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:22:55.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:22:55.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:55.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:55.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:22:56.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:22:56.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:22:56.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:22:56.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:22:56.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:22:56.762 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:22:57.233 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:22:57.706 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:22:58.179 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:22:58.651 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:22:59.122 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:22:59.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:23:00.067 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:23:00.540 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:23:01.013 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:23:01.486 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:23:01.958 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:23:02.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:23:02.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:02.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:02.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:02.143 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:23:07.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:07.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:07.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:07.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:07.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:07.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:07.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:07.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:07.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:07.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:07.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:23:07.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:23:07.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:23:07.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:07.154 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:07.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:07.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:23:07.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:07.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:23:07.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:07.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:23:07.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:23:07.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:07.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:07.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:07.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:23:07.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:07.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:23:07.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:07.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:07.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:23:07.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:23:07.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:23:07.159 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:23:07.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:07.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:07.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:07.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:07.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:07.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:07.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:07.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:07.161 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:23:12.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:12.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:12.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:12.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:12.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:12.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:12.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:12.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:12.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:12.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:12.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:23:12.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:23:12.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:23:12.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:12.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:12.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:12.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:23:12.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:12.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:23:12.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:12.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:23:12.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:23:12.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:12.180 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:12.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:12.180 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:23:12.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:12.180 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:23:12.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:12.182 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:12.182 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:23:12.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:23:12.185 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:23:12.185 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:23:12.185 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:12.190 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:23:12.668 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:23:12.705 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:23:12.707 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:23:12.708 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:23:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:23:12.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:23:12.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:23:12.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:23:12.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:23:12.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:23:12.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:23:12.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:23:12.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:23:12.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:23:12.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:23:12.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:23:12.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:23:13.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:23:13.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:13.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:13.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:13.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:13.611 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:23:14.086 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:23:14.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:14.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:14.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:14.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:14.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:23:15.029 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:23:15.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:15.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:15.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:15.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:15.502 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:23:15.975 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:23:16.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:16.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:16.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:16.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:16.447 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:23:16.920 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:23:17.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:17.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:17.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:17.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:17.393 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:23:17.865 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:23:18.335 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:23:18.806 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:23:19.277 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:23:19.748 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:23:20.221 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:23:20.694 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:23:21.166 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:23:21.637 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:23:22.110 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:23:22.583 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:23:23.055 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:23:23.526 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:23:23.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:23:23.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:23:23.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:23.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:23.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:23.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:23.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:23.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:23.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:23.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:23.772 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:23:28.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:28.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:28.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:28.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:28.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:28.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:28.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:28.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:28.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:28.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:28.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:23:28.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:23:28.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:23:28.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:28.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:28.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:28.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:23:28.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:28.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:23:28.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:28.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:23:28.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:23:28.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:28.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:28.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:28.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:23:28.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:28.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:23:28.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:28.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:28.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:23:28.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:23:28.801 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:23:28.801 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:23:28.801 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:23:28.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:23:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:28.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:28.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:28.803 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:23:33.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:33.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:33.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:33.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:33.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:33.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:33.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:33.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:33.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:33.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:33.819 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:23:33.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:23:33.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:23:33.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:33.822 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:33.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:33.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:23:33.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:33.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:23:33.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:33.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:23:33.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:23:33.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:33.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:33.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:33.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:23:33.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:33.825 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:23:33.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:33.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:33.827 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:23:33.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:23:33.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:23:33.830 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:23:33.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:33.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:33.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:33.834 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:23:34.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:23:34.351 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:23:34.353 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:23:34.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:23:34.356 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:23:34.784 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:23:34.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:34.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:34.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:34.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:35.255 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:23:35.728 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:23:35.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:35.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:35.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:35.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:36.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:23:36.673 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:23:36.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:36.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:36.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:36.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:37.146 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:23:37.619 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:23:37.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:37.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:37.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:37.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:38.091 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:23:38.565 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:23:38.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:39.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:23:39.509 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:23:39.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:23:40.455 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:23:40.927 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:23:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:23:41.873 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:23:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:23:42.821 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:23:43.292 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:23:43.768 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:23:44.240 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:23:44.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:44.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:44.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:44.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:44.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:44.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:44.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:44.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:44.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:44.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:44.366 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:23:49.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:49.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:49.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:49.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:49.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:49.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:49.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:49.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:49.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:49.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:49.381 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:23:49.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:23:49.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:23:49.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:49.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:49.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:49.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:23:49.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:49.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:23:49.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:49.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:23:49.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:23:49.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:49.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:49.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:49.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:23:49.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:49.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:23:49.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:49.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:49.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:23:49.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:49.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:23:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:23:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:23:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:23:49.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:23:49.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:23:49.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:23:49.395 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:23:49.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:49.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:49.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:49.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:49.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:49.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:49.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:49.397 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:23:49.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:54.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:23:54.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:23:54.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:54.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:54.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:54.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:54.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:23:54.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:54.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:54.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:23:54.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:23:54.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:23:54.420 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:23:54.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:54.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:54.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:23:54.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:23:54.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:23:54.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:23:54.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:54.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:23:54.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:23:54.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:54.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:54.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:23:54.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:23:54.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:23:54.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:23:54.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:54.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:23:54.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:23:54.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:54.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:23:54.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:23:54.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:23:54.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:23:54.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:23:54.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:54.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:23:54.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:23:54.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:23:54.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:23:54.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:23:54.432 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:23:54.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:23:54.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:23:54.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:23:54.960 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:23:54.962 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:23:54.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:23:54.964 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:23:55.386 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:23:55.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:55.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:55.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:55.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:55.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:23:56.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:23:56.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:56.807 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:23:57.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:23:57.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:57.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:57.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:57.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:57.751 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:23:58.227 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:23:58.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:58.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:58.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:58.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:58.699 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:23:59.183 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:23:59.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:23:59.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:23:59.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:23:59.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:23:59.655 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:24:00.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:24:00.602 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:24:01.075 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:24:01.548 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:24:02.020 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:24:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:24:02.966 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:24:03.438 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:24:03.913 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:24:04.385 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:24:04.861 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:24:05.333 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:24:05.808 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:24:06.280 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:24:06.753 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:24:06.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:06.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:06.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:06.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:06.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:06.985 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:24:06.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:06.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:06.986 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2704 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:11.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:11.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:11.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:11.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:11.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:11.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:11.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:11.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:11.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:11.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:11.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:24:12.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:24:12.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:24:12.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:12.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:12.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:12.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:24:12.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:12.002 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:24:12.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:12.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:24:12.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:24:12.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:12.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:12.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:12.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:24:12.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:12.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:24:12.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:12.006 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:24:12.006 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:24:12.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:12.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:12.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:12.007 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:24:12.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:12.007 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:24:12.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:12.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:24:12.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:24:12.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:24:12.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:24:12.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:24:12.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:24:12.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:24:12.013 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:24:12.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:12.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:12.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:12.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:24:12.497 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:24:12.539 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:24:12.540 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:24:12.541 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:24:12.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:12.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:12.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:12.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:12.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:12.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:12.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:12.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:12.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:12.969 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:24:13.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:13.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:13.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:13.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:13.440 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:24:13.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:24:14.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:14.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:14.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:14.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:14.386 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:24:14.858 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:24:15.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:15.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:15.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:15.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:15.329 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:24:15.802 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:24:16.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:16.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:16.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:16.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:16.274 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:24:16.746 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:24:17.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:17.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:17.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:17.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:17.217 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:24:17.691 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:24:18.163 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:24:18.635 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:24:19.106 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:24:19.580 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:24:20.052 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:24:20.524 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:24:20.995 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:24:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:24:21.940 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:24:22.412 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:24:22.883 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:24:23.357 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:24:23.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:23.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:23.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:23.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:23.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:23.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:23.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:23.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:23.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:23.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:23.599 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:24:23.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:23.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:28.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:28.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:28.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:28.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:28.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:28.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:28.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:28.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:28.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:28.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:28.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:24:28.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:28.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:28.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:24:28.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:28.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:24:28.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:24:28.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:28.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:28.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:28.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:24:28.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:28.611 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:24:28.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:28.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:24:28.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:24:28.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:24:28.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:24:28.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:24:28.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:24:28.613 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:24:28.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:28.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:28.617 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:24:29.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:24:29.135 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:24:29.136 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:24:29.137 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:24:29.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:29.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:29.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:29.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:29.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:29.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:29.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:29.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:29.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:29.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:24:29.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:29.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:30.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:24:30.511 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:24:30.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:30.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:30.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:30.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:30.984 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:24:31.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:24:31.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:31.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:31.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:31.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:31.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:24:32.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:24:32.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:32.873 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:24:33.344 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:33.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:33.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:24:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:24:34.761 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:24:35.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:24:35.707 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:24:36.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:24:36.651 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:24:37.122 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:24:37.595 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:24:38.067 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:24:38.540 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:24:39.013 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:24:39.485 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:24:39.958 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:24:40.431 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:24:40.903 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:24:41.375 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:24:41.846 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:24:42.320 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:24:42.792 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:24:43.264 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:24:43.735 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:24:44.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:44.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:44.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:44.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:44.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:44.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:44.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:44.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:44.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:44.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:44.197 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:24:44.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:44.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:49.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:49.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:49.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:49.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:49.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:49.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:49.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:49.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:49.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:49.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:49.209 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:24:49.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:24:49.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:24:49.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:49.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:49.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:49.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:24:49.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:49.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:24:49.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:49.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:24:49.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:24:49.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:49.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:49.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:49.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:24:49.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:49.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:24:49.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:49.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:24:49.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:24:49.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:49.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:49.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:49.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:24:49.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:49.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:24:49.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:24:49.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:24:49.223 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:24:49.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:49.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:24:49.705 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:24:49.754 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:24:49.755 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:24:49.756 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:24:49.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:49.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:49.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:49.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:49.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:49.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:49.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:49.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:49.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:49.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:49.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:49.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:49.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:49.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:49.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:49.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:49.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:49.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:49.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:49.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:49.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:49.810 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:24:49.810 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:49.810 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:49.810 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:49.810 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:54.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:54.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:54.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:54.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:54.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:54.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:54.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:54.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:54.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:54.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:24:54.823 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:24:54.828 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:24:54.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:24:54.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:54.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:54.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:54.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:24:54.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:24:54.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:24:54.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:54.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:24:54.834 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:24:54.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:54.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:54.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:54.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:24:54.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:24:54.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:24:54.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:54.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:24:54.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:24:54.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:54.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:24:54.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:54.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:24:54.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:24:54.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:24:54.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:24:54.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:24:54.845 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:24:54.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:24:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:24:54.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:24:54.850 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:24:55.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:24:55.370 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:24:55.372 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:24:55.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:55.373 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:24:55.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:55.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:55.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:55.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:55.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:55.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:55.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:55.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:55.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:55.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:55.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:55.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:55.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:55.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:55.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:55.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:55.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:55.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:55.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:55.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:24:55.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:55.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:55.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:55.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:55.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:55.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:55.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:55.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:55.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:55.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:55.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:55.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:55.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:55.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:55.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:55.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:55.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:55.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:56.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:56.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:56.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:56.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:56.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:56.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:56.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:56.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:56.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:56.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:24:56.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:56.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:56.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:56.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:56.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:24:56.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:24:56.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:24:56.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:24:56.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:56.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:56.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:24:56.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:24:56.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:24:56.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:24:56.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:24:56.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:24:56.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:24:56.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:24:56.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:24:56.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:24:56.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:24:56.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:24:56.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:24:56.603 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:24:56.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:24:56.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:24:56.603 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:01.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:25:01.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:25:01.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:01.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:01.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:01.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:01.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:01.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:25:01.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:01.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:25:01.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:25:01.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:25:01.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:25:01.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:25:01.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:01.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:01.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:25:01.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:25:01.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:25:01.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:01.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:25:01.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:25:01.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:25:01.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:01.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:01.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:25:01.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:25:01.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:25:01.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:01.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:25:01.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:25:01.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:25:01.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:01.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:01.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:25:01.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:25:01.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:25:01.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:25:01.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:25:01.632 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:25:01.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:01.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:01.637 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:25:02.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:25:02.168 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:25:02.170 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:25:02.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:02.172 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:25:02.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:02.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:02.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:02.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:02.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:02.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:02.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:02.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:02.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:02.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:02.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:02.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:02.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:02.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:02.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:02.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:02.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:25:02.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:02.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:02.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:02.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:03.061 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:25:03.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:25:03.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:03.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:03.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:03.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:04.006 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:25:04.479 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:25:04.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:04.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:04.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:04.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:04.952 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:25:05.424 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:25:05.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:05.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:05.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:05.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:05.895 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:25:06.368 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:25:06.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:06.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:06.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:06.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:06.841 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:25:07.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:07.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:07.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:07.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:07.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:07.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:07.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:07.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:07.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:07.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:07.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:07.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:07.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:07.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:07.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:07.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:07.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:07.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:07.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:07.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:07.321 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:25:07.794 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:25:08.267 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:25:08.739 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:25:09.211 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:25:09.682 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:25:10.156 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:25:10.628 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:25:11.101 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:25:11.574 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:25:12.047 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:25:12.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:12.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:12.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:12.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:12.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:12.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:12.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:12.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:12.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:12.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:12.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:12.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:12.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:12.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:12.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:12.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:12.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:12.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:12.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:12.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:12.519 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:25:12.990 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:25:13.461 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:25:13.934 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:25:14.406 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:25:14.878 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:25:15.349 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:25:15.820 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:25:16.291 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:25:16.761 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:25:17.232 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:25:17.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:17.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:17.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:17.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:17.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:17.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:17.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:17.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:17.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:17.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:17.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:17.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:17.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:17.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:17.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:17.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:17.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:17.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:17.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:17.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:25:18.174 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:25:18.647 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:25:19.119 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:25:19.592 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:25:20.065 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:25:20.538 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:25:21.010 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:25:21.481 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:25:21.954 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:25:22.426 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:25:22.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:22.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:22.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:22.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:22.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:22.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:22.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:22.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:22.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:22.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:22.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:25:22.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:25:22.494 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:25:22.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:22.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:22.495 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4504 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:27.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:25:27.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:25:27.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:27.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:27.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:27.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:27.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:27.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:25:27.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:27.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:25:27.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:25:27.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:25:27.503 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:25:27.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:25:27.503 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:27.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:27.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:25:27.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:25:27.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:25:27.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:27.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:25:27.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:25:27.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:25:27.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:27.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:27.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:25:27.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:25:27.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:25:27.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:25:27.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:25:27.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:25:27.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:25:27.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:25:27.511 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:25:27.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:27.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:25:27.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:25:28.033 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:25:28.034 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:25:28.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:28.036 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:25:28.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:28.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:28.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:28.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:28.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:28.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:28.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:28.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:28.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:28.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:28.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:28.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:28.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:28.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:28.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:28.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:25:28.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:28.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:25:29.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:25:29.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:29.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:25:30.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:25:30.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:30.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:30.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:30.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:30.825 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:25:31.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:25:31.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:31.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:31.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:31.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:31.767 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:25:32.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:25:32.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:32.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:32.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:32.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:32.713 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:25:33.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:33.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:33.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:33.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:33.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:33.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:33.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:33.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:33.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:33.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:33.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:33.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:33.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:33.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:33.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:33.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:33.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:33.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:33.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:33.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:33.185 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:25:33.657 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:25:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:25:34.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:25:35.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:25:35.546 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:25:36.019 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:25:36.491 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:25:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:25:37.434 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:25:37.905 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:25:38.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:38.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:38.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:38.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:38.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:38.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:38.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:38.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:38.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:38.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:38.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:38.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:38.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:38.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:38.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:38.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:38.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:38.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:38.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:38.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:38.375 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:25:38.846 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:25:39.317 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:25:39.788 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:25:40.261 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:25:40.734 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:25:41.206 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:25:41.677 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:25:42.148 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:25:42.621 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:25:43.093 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:25:43.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:43.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:43.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:43.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:43.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:43.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:43.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:43.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:43.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:43.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:43.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:43.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:43.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:43.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:43.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:43.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:43.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:43.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:43.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:43.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:43.565 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:25:44.036 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:25:44.509 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:25:44.982 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:25:45.454 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:25:45.925 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:25:46.399 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:25:46.871 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:25:47.343 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:25:47.814 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:25:48.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:48.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:48.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:48.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:48.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:48.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:48.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:48.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:48.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:48.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:48.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:48.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:48.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:25:48.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:25:48.255 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:25:48.255 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:48.255 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:48.255 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:48.255 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:25:53.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:25:53.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:25:53.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:53.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:53.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:53.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:53.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:25:53.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:25:53.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:53.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:25:53.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:25:53.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:25:53.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:25:53.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:25:53.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:53.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:25:53.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:25:53.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:25:53.276 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:25:53.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:53.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:25:53.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:25:53.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:25:53.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:53.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:25:53.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:25:53.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:25:53.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:25:53.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:53.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:25:53.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:25:53.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:25:53.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:25:53.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:25:53.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:25:53.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:25:53.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:25:53.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:53.289 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:25:53.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:25:53.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:25:53.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:25:53.289 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:25:53.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:25:53.290 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:25:53.290 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:25:53.290 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:25:53.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:25:53.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:25:53.816 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:25:53.817 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:25:53.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:53.818 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:25:53.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:53.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:53.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:53.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:53.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:53.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:53.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:53.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:53.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:53.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:53.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:53.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:53.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:53.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:53.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:53.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:54.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:25:54.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:54.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:54.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:54.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:54.717 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:25:55.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:25:55.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:55.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:55.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:55.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:55.663 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:25:56.135 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:25:56.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:56.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:56.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:56.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:56.606 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:25:57.080 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:25:57.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:57.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:57.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:57.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:57.553 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:25:58.025 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:25:58.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:25:58.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:25:58.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:25:58.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:25:58.498 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:25:58.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:58.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:58.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:58.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:58.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:58.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:58.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:58.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:25:58.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:25:58.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:25:58.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:25:58.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:58.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:58.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:58.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:25:58.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:25:58.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:25:58.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:25:58.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:58.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:25:58.971 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:25:59.443 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:25:59.914 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:26:00.387 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:26:00.859 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:26:01.329 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:26:01.797 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:26:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:26:02.742 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:26:03.215 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:26:03.687 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:26:03.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:03.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:03.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:03.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:03.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:03.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:03.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:03.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:03.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:03.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:04.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:04.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:04.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:04.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:04.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:04.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:04.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:04.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:04.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:04.157 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:26:04.628 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:26:05.102 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:26:05.573 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:26:06.045 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:26:06.517 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:26:06.988 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:26:07.459 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:26:07.932 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:26:08.405 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:26:08.877 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:26:09.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:09.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:09.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:09.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:09.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:09.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:09.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:09.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:09.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:09.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:09.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:09.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:09.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:09.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:09.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:09.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:09.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:09.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:09.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:09.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:09.347 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:26:09.818 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:26:10.292 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:26:10.764 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:26:11.236 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:26:11.707 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:26:12.180 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:26:12.653 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:26:13.125 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:26:13.596 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:26:14.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:14.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:14.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:14.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:14.069 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:26:14.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:14.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:14.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:14.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:14.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:14.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:14.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:26:14.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:26:14.075 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:26:14.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:14.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:14.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:19.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:26:19.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:26:19.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:19.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:19.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:19.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:19.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:19.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:26:19.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:19.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:26:19.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:26:19.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:26:19.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:26:19.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:26:19.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:19.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:19.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:26:19.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:26:19.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:26:19.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:19.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:26:19.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:26:19.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:26:19.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:19.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:19.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:26:19.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:26:19.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:26:19.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:19.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:26:19.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:26:19.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:26:19.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:19.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:19.107 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:26:19.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:26:19.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:26:19.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:19.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:26:19.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:26:19.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:26:19.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:26:19.111 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:26:19.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:26:19.112 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:26:19.112 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:26:19.112 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:19.117 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:26:19.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:26:19.641 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:26:19.643 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:26:19.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:19.645 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:26:19.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:19.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:19.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:19.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:19.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:19.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:19.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:19.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:19.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:19.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:19.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:19.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:19.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:19.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:19.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:19.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:20.069 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:26:20.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:20.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:20.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:20.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:20.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:26:21.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:26:21.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:21.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:21.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:21.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:26:21.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:26:22.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:22.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:22.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:22.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:22.429 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:26:22.900 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:26:23.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:23.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:23.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:23.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:23.371 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:26:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:26:24.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:24.317 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:26:24.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:24.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:24.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:24.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:24.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:24.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:24.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:24.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:24.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:24.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:24.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:24.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:24.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:24.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:24.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:24.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:24.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:24.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:24.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:24.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:24.789 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:26:25.260 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:26:25.731 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:26:26.204 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:26:26.677 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:26:27.149 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:26:27.623 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:26:28.095 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:26:28.568 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:26:29.041 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:26:29.514 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:26:29.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:29.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:29.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:29.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:29.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:29.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:29.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:29.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:29.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:29.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:29.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:29.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:29.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:29.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:29.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:29.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:29.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:29.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:29.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:29.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:29.984 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:26:30.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:26:30.929 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:26:31.401 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:26:31.874 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:26:32.344 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:26:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:26:33.289 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:26:33.761 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:26:34.233 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:26:34.704 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:26:34.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:34.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:34.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:34.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:34.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:34.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:34.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:34.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:34.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:34.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:34.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:34.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:34.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:34.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:34.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:34.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:34.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:34.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:34.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:35.175 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:26:35.646 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:26:36.119 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:26:36.592 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:26:37.064 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:26:37.535 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:26:38.008 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:26:38.481 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:26:38.953 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:26:39.425 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:26:39.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:39.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:39.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:39.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:39.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:39.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:39.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:39.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:39.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:39.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:39.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:26:39.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:26:39.861 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:26:39.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:39.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:44.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:26:44.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:26:44.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:44.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:44.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:44.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:44.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:44.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:26:44.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:44.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:26:44.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:26:44.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:26:44.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:26:44.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:26:44.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:44.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:44.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:26:44.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:26:44.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:26:44.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:44.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:26:44.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:26:44.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:26:44.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:44.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:44.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:26:44.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:26:44.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:26:44.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:44.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:26:44.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:26:44.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:26:44.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:44.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:26:44.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:26:44.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:26:44.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:26:44.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:26:44.892 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:26:44.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:44.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:44.896 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:26:45.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:26:45.416 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:26:45.418 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:26:45.420 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:26:45.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:45.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:45.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:45.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:45.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:45.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:45.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:45.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:45.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:45.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:45.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:45.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:45.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:45.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:45.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:45.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:45.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:45.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:45.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:45.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:45.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:45.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:45.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:45.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:45.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:45.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:45.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:45.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:45.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:45.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:45.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:45.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:26:45.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:45.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:45.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:45.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:46.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:46.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:46.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:46.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:46.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:46.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:46.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:46.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:46.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:46.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:46.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:46.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:46.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:46.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:46.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:46.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:46.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:46.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:46.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:46.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:46.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:26:46.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:26:46.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:46.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:46.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:46.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:46.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:46.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:46.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:46.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:46.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:46.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:46.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:46.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:46.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:46.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:46.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:46.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:46.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:46.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:46.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:46.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:47.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:47.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:47.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:47.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:47.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:26:47.730 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:26:47.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:47.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:47.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:47.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:47.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:47.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:47.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:47.833 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:26:47.833 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:26:47.833 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:26:47.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:47.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:47.833 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:47.834 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:47.834 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:47.834 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:47.834 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:47.834 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:47.834 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:26:52.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:26:52.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:26:52.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:52.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:52.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:52.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:52.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:26:52.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:26:52.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:52.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:26:52.845 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:26:52.848 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:26:52.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:26:52.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:26:52.849 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:52.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:26:52.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:26:52.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:26:52.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:26:52.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:52.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:26:52.852 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:26:52.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:26:52.852 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:52.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:26:52.852 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:26:52.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:26:52.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:26:52.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:26:52.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:26:52.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:26:52.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:52.858 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:26:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:26:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:26:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:26:52.858 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:26:52.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:26:52.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:26:52.859 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:26:52.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:26:52.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:26:53.341 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:26:53.384 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:26:53.385 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:26:53.386 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:26:53.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:53.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:53.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:53.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:53.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:26:53.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:26:53.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:26:53.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:26:53.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:53.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:53.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:53.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:26:53.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:26:53.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:26:53.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:26:53.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:53.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:26:53.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:26:53.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:53.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:53.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:53.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:54.285 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:26:54.756 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:26:54.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:54.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:54.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:54.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:55.229 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:26:55.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:26:55.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:55.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:55.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:55.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:56.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:26:56.645 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:26:56.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:57.116 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:26:57.589 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:26:57.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:26:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:26:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:26:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:26:58.062 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:26:58.534 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:26:59.005 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:26:59.478 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:26:59.951 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:27:00.423 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:27:00.894 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:27:01.367 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:27:01.840 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:27:02.312 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:27:02.783 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:27:03.254 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:27:03.727 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:27:04.200 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:27:04.673 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:27:05.143 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:27:05.617 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:27:06.089 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:27:06.562 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:27:07.035 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:27:07.508 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:27:07.980 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:27:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:27:08.925 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:27:09.397 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:27:09.870 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:27:10.340 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:27:10.814 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:27:11.287 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:27:11.759 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:27:12.230 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:27:12.703 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:27:13.176 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:27:13.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:13.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:27:13.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:13.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:13.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:13.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:13.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:27:13.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:13.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:13.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:27:13.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:27:13.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:13.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:27:13.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:27:13.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:27:13.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:27:13.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:27:13.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:27:13.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:13.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:13.648 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:27:14.119 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:27:14.592 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:27:15.065 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:27:15.537 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:27:16.008 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:27:16.481 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:27:16.954 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:27:17.426 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:27:17.897 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:27:18.370 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:27:18.843 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:27:19.315 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:27:19.789 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:27:20.261 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:27:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:27:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:27:21.678 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:27:22.150 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:27:22.623 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:27:23.093 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:27:23.566 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:27:24.039 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:27:24.511 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:27:24.985 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:27:25.457 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:27:25.930 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:27:26.403 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:27:26.876 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:27:27.348 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:27:27.819 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:27:28.293 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:27:28.765 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:27:29.237 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:27:29.708 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:27:30.179 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:27:30.650 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:27:31.123 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:27:31.595 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:27:32.067 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:27:32.538 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:27:33.012 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:27:33.484 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:27:33.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:33.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:27:33.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:33.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:33.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:33.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:33.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:27:33.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:33.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:33.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:27:33.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:27:33.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:33.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:27:33.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:27:33.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:27:33.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:27:33.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:27:33.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:27:33.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:33.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:33.956 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:27:34.427 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:27:34.901 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:27:35.373 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:27:35.845 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:27:36.316 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:27:36.787 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:27:37.258 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:27:37.731 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:27:38.204 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:27:38.675 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:27:39.147 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:27:39.617 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:27:40.088 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:27:40.561 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:27:41.034 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:27:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:27:41.977 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:27:42.448 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:27:42.921 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:27:43.393 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:27:43.865 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:27:44.336 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:27:44.810 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:27:45.282 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:27:45.754 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:27:46.228 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:27:46.700 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:27:47.172 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:27:47.643 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:27:48.114 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:27:48.585 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:27:49.058 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:27:49.531 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:27:50.003 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:27:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:27:50.945 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:27:51.418 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:27:51.891 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:27:52.363 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:27:52.834 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 02:27:53.307 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 02:27:53.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:53.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:27:53.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:53.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:53.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:53.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:53.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:27:53.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:27:53.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:27:53.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:27:53.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:27:53.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:53.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:27:53.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:27:53.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:27:53.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:27:53.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:27:53.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:27:53.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:53.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:27:53.779 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 02:27:54.251 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 02:27:54.724 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 02:27:55.197 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 02:27:55.669 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 02:27:56.140 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 02:27:56.613 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 02:27:57.085 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 02:27:57.558 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 02:27:58.028 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 02:27:58.502 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 02:27:58.974 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 02:27:59.446 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 02:27:59.920 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 02:28:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 02:28:00.864 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 02:28:01.335 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 02:28:01.808 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 02:28:02.281 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 02:28:02.753 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 02:28:03.224 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 02:28:03.697 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 02:28:04.170 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 02:28:04.642 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 02:28:05.113 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 02:28:05.586 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 02:28:06.058 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 02:28:06.530 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 02:28:07.001 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 02:28:07.475 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 02:28:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 02:28:08.419 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 02:28:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 02:28:09.374 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 02:28:09.846 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 02:28:10.317 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 02:28:10.791 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 02:28:11.263 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 02:28:11.735 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 02:28:12.206 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 02:28:12.680 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 02:28:13.152 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 02:28:13.624 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 02:28:13.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:13.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:13.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:13.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:13.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:13.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:13.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:13.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:13.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:13.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:13.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:28:13.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:28:13.701 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:28:13.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:13.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:13.702 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:18.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:28:18.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:28:18.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:18.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:18.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:18.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:18.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:18.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:28:18.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:18.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:28:18.715 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:28:18.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:28:18.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:28:18.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:28:18.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:18.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:18.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:28:18.722 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:28:18.722 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:28:18.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:18.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:28:18.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:28:18.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:28:18.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:18.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:18.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:28:18.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:28:18.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:28:18.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:18.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:28:18.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:28:18.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:28:18.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:18.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:18.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:28:18.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:28:18.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:28:18.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.730 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:28:18.730 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:28:18.730 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:28:18.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:18.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:28:18.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:28:18.732 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:28:23.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:28:23.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:28:23.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:23.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:23.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:23.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:23.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:23.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:28:23.748 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:23.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:28:23.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:28:23.751 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:28:23.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:28:23.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:28:23.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:23.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:23.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:28:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:28:23.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:28:23.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:23.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:28:23.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:28:23.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:28:23.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:23.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:23.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:28:23.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:28:23.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:28:23.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:23.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:28:23.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:28:23.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:28:23.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:23.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:23.757 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:28:23.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:28:23.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:28:23.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:23.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:28:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:28:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:28:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:28:23.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:28:23.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:28:23.762 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:28:23.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:23.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:23.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:28:24.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:28:24.291 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:28:24.293 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:28:24.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:24.295 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:28:24.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:24.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:24.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:24.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:24.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:24.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:24.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:24.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:24.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:24.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:24.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:24.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:24.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:24.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:24.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:24.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:24.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:24.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:24.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:24.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:24.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:24.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:24.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:24.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:24.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:24.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:24.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:28:24.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:24.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:24.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:24.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:24.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:24.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:24.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:24.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:24.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:24.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:24.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:24.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:24.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:24.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:24.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:24.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:25.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:25.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:25.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:25.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:25.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:25.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:25.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:25.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:25.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:25.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.188 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:28:25.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:25.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:25.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:25.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:25.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:25.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:25.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:25.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:25.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:25.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:28:25.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:25.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:25.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:25.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:25.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:25.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:25.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:25.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:25.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:25.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:25.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:25.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:25.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:25.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:25.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:26.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:26.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:26.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:26.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:26.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:28:26.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:26.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:26.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:26.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:26.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:26.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:26.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:26.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:26.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:26.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:26.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:26.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:26.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:26.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:26.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:26.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:26.602 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:28:26.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:26.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:26.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:26.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:27.075 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:28:27.548 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:28:27.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:27.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:27.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:27.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:28.019 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:28:28.491 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:28:28.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:28.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:28.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:28.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:28.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:28.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:28.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:28.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:28.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:28.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:28.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:28.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:28.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:28.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:28.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:28.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:28.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:28.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:28.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:28.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:28.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:28.961 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:28:29.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:28:29.903 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:28:30.374 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:28:30.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:28:31.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:31.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:31.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:31.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:31.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:31.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:31.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:31.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:31.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:31.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:31.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:31.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:31.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:31.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:31.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:31.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:31.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:31.318 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:28:31.790 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:28:32.262 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:28:32.733 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:28:33.204 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:28:33.675 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:28:33.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:33.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:33.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:33.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:33.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:33.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:33.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:33.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:33.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:33.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:33.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:33.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:33.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:33.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:33.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:33.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:33.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:33.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:33.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:33.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:34.146 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:28:34.619 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:28:35.091 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:28:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:28:36.034 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:28:36.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:36.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:36.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:36.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:36.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:36.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:36.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:36.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:36.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:36.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:36.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:36.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:36.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:36.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:36.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:36.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:36.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:36.508 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:28:36.980 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:28:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:28:37.923 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:28:38.397 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:28:38.869 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:28:38.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:38.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:38.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:38.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:38.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:38.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:38.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:38.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:38.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:38.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:38.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:38.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:38.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:39.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:39.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:39.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:39.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:39.340 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:28:39.812 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:28:40.285 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:28:40.758 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:28:41.230 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:28:41.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:41.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:41.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:41.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:41.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:41.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:41.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:41.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:41.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:41.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:28:41.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:28:41.569 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:28:41.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:41.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:41.570 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:28:46.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:28:46.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:28:46.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:46.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:46.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:46.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:46.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:28:46.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:28:46.580 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:46.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:28:46.580 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:28:46.585 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:28:46.585 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:28:46.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:28:46.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:46.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:28:46.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:28:46.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:28:46.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:28:46.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:46.590 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:28:46.590 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:28:46.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:28:46.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:46.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:28:46.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:28:46.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:28:46.591 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:28:46.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:46.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:28:46.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:28:46.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:28:46.595 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:28:46.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:28:46.595 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:28:46.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:28:46.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:28:46.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:46.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:28:46.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:28:46.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:28:46.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.601 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:28:46.601 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:28:46.601 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:28:46.602 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:28:46.606 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:28:47.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:28:47.131 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:28:47.134 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:28:47.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:47.136 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:28:47.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:47.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:47.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:47.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:47.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:47.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:47.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:47.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:47.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:47.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:47.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:47.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:47.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:47.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:47.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:47.556 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:28:47.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:47.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:47.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:47.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:48.027 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:28:48.501 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:28:48.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:48.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:48.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:48.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:48.973 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:28:49.446 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:28:49.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:49.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:49.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:49.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:49.917 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:28:50.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:50.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:50.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:50.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:50.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:50.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:50.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:50.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:50.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:50.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:50.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:50.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:50.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:50.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:50.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:50.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:50.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:50.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:50.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:50.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:50.389 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:28:50.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:50.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:50.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:50.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:50.862 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:28:51.334 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:28:51.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:28:51.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:28:51.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:28:51.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:28:51.805 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:28:52.276 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:28:52.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:28:53.217 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:28:53.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:53.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:53.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:53.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:53.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:53.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:53.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:53.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:53.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:53.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:53.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:53.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:53.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:53.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:53.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:53.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:53.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:53.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:53.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:53.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:53.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:28:54.159 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:28:54.632 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:28:55.104 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:28:55.576 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:28:56.047 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:28:56.521 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:28:56.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:56.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:56.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:56.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:56.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:56.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:56.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:56.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:28:56.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:28:56.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:28:56.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:28:56.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:56.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:56.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:56.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:28:56.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:28:56.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:28:56.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:28:56.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:56.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:28:56.993 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:28:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:28:57.938 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:28:58.411 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:28:58.882 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:28:59.354 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:28:59.827 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:29:00.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:00.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:00.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:00.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:00.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:00.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:00.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:00.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:00.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:00.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:00.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:00.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:00.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:00.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:00.167 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:29:00.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:00.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:00.167 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:00.168 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:00.168 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:00.168 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:00.168 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:05.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:05.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:05.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:05.169 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:05.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:05.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:05.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:05.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:05.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:05.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:05.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:29:05.182 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:29:05.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:29:05.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:05.183 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:05.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:05.183 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:29:05.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:05.183 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:29:05.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:05.186 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:05.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:29:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:05.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:29:05.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:29:05.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:05.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:05.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:05.188 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:29:05.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:05.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:29:05.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:05.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:29:05.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:29:05.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:29:05.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:29:05.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:29:05.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:29:05.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:29:05.192 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:29:05.192 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:05.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:05.197 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:29:05.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:29:05.712 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:29:05.714 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:29:05.715 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:29:05.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:05.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:05.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:05.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:05.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:05.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:05.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:05.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:05.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:05.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:05.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:05.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:05.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:05.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:05.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:05.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:05.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:06.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:06.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:06.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:06.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:06.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:06.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:06.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:06.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:06.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:06.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:06.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:06.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:06.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:06.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:06.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:06.145 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:29:06.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:06.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:06.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:06.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:06.617 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:29:06.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:06.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:06.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:06.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:06.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:06.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:06.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:06.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:06.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:06.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:06.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:06.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:06.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:06.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:06.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:06.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:06.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:06.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:07.088 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:29:07.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:07.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:07.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:07.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:07.560 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:29:08.031 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:29:08.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:08.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:08.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:08.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:08.501 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:29:08.972 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:29:09.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:09.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:09.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:09.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:09.445 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:29:09.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:09.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:09.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:09.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:09.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:09.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:09.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:09.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:09.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:09.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:09.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:09.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:09.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:09.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:09.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:09.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:09.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:09.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:09.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:09.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:09.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:29:10.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:10.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:10.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:10.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:10.389 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:29:10.860 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:29:11.332 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:29:11.805 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:29:12.277 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:29:12.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:12.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:12.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:12.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:12.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:12.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:12.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:12.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:12.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:12.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:12.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:12.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:12.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:12.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:12.620 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:29:12.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:12.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:12.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:12.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:12.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:12.621 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:17.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:17.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:17.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:17.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:17.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:17.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:17.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:17.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:17.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:29:17.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:29:17.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:29:17.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:17.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:17.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:17.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:29:17.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:17.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:29:17.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:17.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:29:17.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:29:17.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:17.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:17.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:17.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:29:17.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:17.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:29:17.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:17.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:29:17.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:29:17.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:17.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:17.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:17.638 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:29:17.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:17.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:29:17.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:29:17.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:29:17.641 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:29:17.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:17.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:29:18.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:29:18.158 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:29:18.159 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:29:18.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:18.161 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:29:18.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:18.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:18.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:18.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:18.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:18.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:18.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:18.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:18.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:18.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:18.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:18.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:18.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:18.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:18.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:18.597 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:29:18.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:19.068 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:29:19.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:19.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:19.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:19.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:19.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:19.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:19.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:19.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:19.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:19.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:19.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:19.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:19.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:19.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:19.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:19.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:19.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:19.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:19.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:19.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:19.541 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:29:19.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:19.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:19.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:19.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:20.013 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:29:20.485 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:29:20.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:20.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:20.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:20.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:20.956 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:29:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:29:21.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:21.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:21.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:21.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:21.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:21.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:21.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:21.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:21.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:21.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:21.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:21.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:21.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:21.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:21.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:21.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:21.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:21.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:21.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:21.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:21.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:21.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:21.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:21.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:21.902 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:29:22.374 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:29:22.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:22.845 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:29:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:29:23.786 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:29:24.260 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:29:24.732 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:29:25.204 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:29:25.675 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:29:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:29:26.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:26.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:26.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:26.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:26.621 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:29:26.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:26.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:26.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:26.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:26.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:26.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:26.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:26.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:26.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:26.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:26.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:26.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:26.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:26.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:26.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:26.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:27.093 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:29:27.564 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:29:28.037 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:29:28.510 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:29:28.982 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:29:29.453 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:29:29.926 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:29:30.398 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:29:30.870 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:29:31.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:29:31.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:31.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:31.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:31.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:31.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:31.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:31.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:31.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:31.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:31.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:31.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:31.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:31.515 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:29:31.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:31.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:31.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:31.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:31.515 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:31.516 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:31.516 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:31.516 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:31.516 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2997 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:29:36.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:36.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:36.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:36.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:36.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:36.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:36.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:36.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:36.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:36.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:36.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:29:36.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:29:36.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:29:36.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:36.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:36.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:36.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:29:36.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:36.538 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:29:36.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:36.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:29:36.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:29:36.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:36.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:36.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:36.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:29:36.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:36.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:29:36.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:36.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:29:36.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:29:36.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:36.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:36.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:36.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:29:36.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:36.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:29:36.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:29:36.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:29:36.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:29:36.550 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:29:36.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:36.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:29:37.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:29:37.077 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:29:37.080 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:29:37.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:37.082 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:29:37.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:37.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:37.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:37.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:37.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:37.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:37.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:37.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:37.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:37.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:37.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:37.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:37.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:37.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:29:37.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:37.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:37.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:37.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:37.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:37.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:37.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:37.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:37.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:37.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:37.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:37.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:37.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:37.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:37.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:37.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:37.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:37.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:37.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:37.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:37.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:37.978 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:29:38.452 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:29:38.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:38.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:38.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:38.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:38.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:38.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:38.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:38.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:38.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:38.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:38.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:38.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:38.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:38.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:38.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:38.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:38.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:38.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:38.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:38.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:38.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:38.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:38.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:38.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:38.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:29:39.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:29:39.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:39.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:39.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:39.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:39.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:29:40.336 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:29:40.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:40.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:40.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:40.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:40.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:40.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:40.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:40.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:40.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:40.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:40.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:40.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:40.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:40.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:40.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:40.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:40.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:40.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:40.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:40.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:40.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:40.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:40.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:40.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:40.809 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:29:41.282 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:29:41.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:41.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:41.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:41.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:41.754 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:29:42.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:29:42.700 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:29:42.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:42.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:42.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:42.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:42.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:42.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:42.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:42.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:42.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:42.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:42.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:42.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:42.796 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:29:42.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:42.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:47.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:29:47.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:29:47.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:47.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:47.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:47.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:47.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:29:47.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:47.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:47.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:29:47.812 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:29:47.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:29:47.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:29:47.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:47.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:47.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:29:47.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:29:47.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:29:47.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:29:47.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:47.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:29:47.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:29:47.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:47.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:47.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:29:47.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:29:47.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:29:47.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:29:47.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:47.821 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:29:47.821 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:29:47.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:47.821 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:29:47.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:29:47.822 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:29:47.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:29:47.822 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:29:47.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:29:47.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:29:47.825 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:29:47.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:29:47.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:29:47.830 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:29:48.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:29:48.352 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:29:48.354 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:29:48.356 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:29:48.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:48.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:48.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:48.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:48.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:48.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:48.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:48.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:48.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:48.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:48.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:48.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:48.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:48.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:48.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:48.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:48.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:48.781 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:29:48.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:48.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:48.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:48.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:49.252 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:29:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:29:49.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:49.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:49.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:49.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:29:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:29:50.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:50.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:50.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:50.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:50.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:50.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:50.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:50.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:50.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:50.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:50.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:50.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:50.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:50.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:50.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:50.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:50.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:50.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:50.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:50.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:50.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:50.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:50.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:50.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:51.141 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:29:51.612 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:29:51.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:51.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:51.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:51.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:52.083 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:29:52.556 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:29:52.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:29:52.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:29:52.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:29:52.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:29:53.029 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:29:53.501 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:29:53.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:53.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:53.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:53.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:53.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:53.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:53.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:53.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:53.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:53.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:53.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:53.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:53.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:53.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:53.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:53.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:53.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:53.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:53.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:53.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:53.971 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:29:54.442 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:29:54.913 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:29:55.387 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:29:55.859 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:29:56.331 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:29:56.805 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:29:56.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:56.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:56.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:56.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:56.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:56.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:56.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:56.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:29:56.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:29:56.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:29:56.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:29:56.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:56.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:56.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:56.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:29:56.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:29:56.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:29:56.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:29:56.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:56.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:29:57.276 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:29:57.748 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:29:58.219 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:29:58.690 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:29:59.161 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:29:59.634 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:30:00.107 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:30:00.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:00.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:00.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:00.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:30:00.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:30:00.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:30:00.438 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:30:00.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:30:00.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:30:05.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:30:05.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:30:05.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:30:05.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:30:05.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:30:05.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:30:05.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:30:05.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:30:05.458 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:05.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:30:05.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:30:05.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:30:05.461 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:30:05.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:30:05.461 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:05.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:30:05.461 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:30:05.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:30:05.462 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:30:05.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:30:05.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:30:05.463 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:30:05.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:05.464 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:30:05.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:30:05.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:30:05.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:05.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:30:05.465 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:30:05.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:30:05.465 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:30:05.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:30:05.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:30:05.467 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:30:05.467 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:05.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:05.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:30:05.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:30:05.991 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:30:05.993 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:30:05.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:05.995 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:30:06.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:06.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:06.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:06.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:06.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:06.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:30:06.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:30:06.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:06.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:06.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:06.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:06.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:06.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:06.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:06.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:06.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:30:06.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:30:06.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:06.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:06.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.421 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:30:06.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:06.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:06.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:06.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:06.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:06.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:06.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:06.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:06.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:06.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:06.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:06.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:06.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:30:06.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:30:06.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:06.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:06.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:06.892 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:30:07.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:07.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:07.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:07.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:07.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:07.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:07.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:07.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:07.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:07.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:07.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:07.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:07.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:07.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:07.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:30:07.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:30:07.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:07.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:07.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:07.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:07.363 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:30:07.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:07.834 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:30:07.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:07.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:07.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:07.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:07.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:07.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:07.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:07.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:07.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:30:07.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:30:07.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:30:07.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:30:07.929 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:30:07.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:30:07.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:30:12.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:30:12.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:30:12.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:30:12.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:30:12.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:30:12.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:30:12.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:30:12.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:30:12.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:12.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:30:12.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:30:12.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:30:12.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:30:12.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:30:12.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:12.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:30:12.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:30:12.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:30:12.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:30:12.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:12.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:30:12.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:30:12.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:30:12.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:12.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:30:12.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:30:12.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:30:12.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:30:12.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:12.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:30:12.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:30:12.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:30:12.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:30:12.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:30:12.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:30:12.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:30:12.990 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:30:12.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:12.993 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:30:12.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:30:12.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:30:12.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:30:12.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:30:12.994 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:30:12.994 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:30:12.994 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:30:12.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:30:13.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:30:13.529 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:30:13.530 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:30:13.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:13.532 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:30:13.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:13.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:13.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:13.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:13.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:13.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:13.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:13.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:13.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:13.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:13.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:30:13.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:30:13.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:13.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:13.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:13.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:13.948 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:30:13.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:13.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:13.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:13.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:14.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:30:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:30:14.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:14.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:14.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:14.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:15.366 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:30:15.838 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:30:16.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:16.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:16.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:16.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:16.311 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:30:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:30:17.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:17.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:17.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:17.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:17.253 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:30:17.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:30:18.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:30:18.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:30:18.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:30:18.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:30:18.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:30:18.671 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:30:19.145 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:30:19.617 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:30:20.090 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:30:20.563 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:30:21.036 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:30:21.508 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:30:21.981 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:30:22.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:30:22.926 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:30:23.397 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:30:23.871 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:30:24.343 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:30:24.816 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:30:25.289 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:30:25.762 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:30:26.234 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:30:26.707 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:30:27.180 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:30:27.652 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:30:28.123 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:30:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:30:29.069 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:30:29.542 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:30:30.013 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:30:30.486 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:30:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:30:31.431 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:30:31.902 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:30:32.373 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:30:32.846 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:30:33.318 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:30:33.791 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:30:34.264 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:30:34.737 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:30:35.209 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:30:35.680 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:30:36.154 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:30:36.626 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:30:37.099 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:30:37.572 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:30:38.045 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:30:38.517 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:30:38.990 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:30:39.464 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:30:39.936 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:30:40.407 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:30:40.880 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:30:41.353 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:30:41.825 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:30:42.299 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:30:42.771 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:30:43.244 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:30:43.715 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:30:44.188 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:30:44.660 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:30:45.133 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:30:45.606 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:30:46.079 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:30:46.551 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:30:46.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:46.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:46.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:46.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:46.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:46.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:46.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:46.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:30:46.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:30:46.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:30:46.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:30:46.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:46.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:46.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:46.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:30:46.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:30:46.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:30:46.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:30:46.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:46.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:30:47.022 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:30:47.495 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:30:47.968 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:30:48.449 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:30:48.922 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:30:49.395 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:30:49.868 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:30:50.340 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:30:50.811 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:30:51.284 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:30:51.757 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:30:52.228 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:30:52.700 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:30:53.173 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:30:53.646 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:30:54.118 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:30:54.589 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:30:55.060 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:30:55.530 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:30:56.001 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:30:56.472 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:30:56.943 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:30:57.416 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:30:57.889 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:30:58.361 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:30:58.835 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:30:59.307 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:30:59.779 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:31:00.250 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:31:00.721 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:31:01.192 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:31:01.662 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:31:02.133 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:31:02.607 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:31:03.079 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:31:03.551 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:31:04.021 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:31:04.495 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:31:04.967 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:31:05.439 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:31:05.913 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:31:06.385 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:31:06.857 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:31:07.331 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:31:07.803 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:31:08.275 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:31:08.746 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:31:09.217 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:31:09.690 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:31:10.163 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:31:10.635 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:31:11.106 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:31:11.580 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:31:12.052 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:31:12.524 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:31:12.997 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 02:31:13.483 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 02:31:13.955 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 02:31:14.426 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 02:31:14.897 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 02:31:15.368 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 02:31:15.841 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 02:31:16.314 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 02:31:16.786 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 02:31:17.259 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 02:31:17.732 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 02:31:18.204 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 02:31:18.675 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 02:31:19.146 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 02:31:19.619 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 02:31:20.092 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 02:31:20.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:20.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:31:20.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:31:20.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:31:20.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:31:20.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:31:20.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:31:20.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:31:20.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:31:20.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:31:20.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:31:20.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:20.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:31:20.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:31:20.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:31:20.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:31:20.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:31:20.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:31:20.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:20.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:20.563 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 02:31:21.034 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 02:31:21.505 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 02:31:21.976 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 02:31:22.450 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 02:31:22.922 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 02:31:23.394 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 02:31:23.865 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 02:31:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 02:31:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 02:31:25.283 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 02:31:25.754 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 02:31:26.224 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 02:31:26.696 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 02:31:27.164 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 02:31:27.636 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 02:31:28.109 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 02:31:28.582 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 02:31:29.054 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 02:31:29.526 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 02:31:29.997 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 02:31:30.471 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 02:31:30.943 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 02:31:31.416 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 02:31:31.889 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 02:31:32.361 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 02:31:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 02:31:33.304 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 02:31:33.777 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 02:31:34.250 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 02:31:34.722 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 02:31:35.193 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 02:31:35.666 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 02:31:36.139 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 02:31:36.611 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 02:31:37.079 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 02:31:37.552 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 02:31:38.024 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 02:31:38.495 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 02:31:38.969 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 02:31:39.441 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 02:31:39.913 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 02:31:40.384 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 02:31:40.857 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 02:31:41.330 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 02:31:41.802 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 02:31:42.273 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 02:31:42.746 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 02:31:43.219 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 02:31:43.691 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-04-19 02:31:44.165 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-04-19 02:31:44.637 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-04-19 02:31:45.109 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-04-19 02:31:45.583 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-04-19 02:31:46.055 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-04-19 02:31:46.527 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-04-19 02:31:46.998 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-04-19 02:31:47.469 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-04-19 02:31:47.942 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-04-19 02:31:48.414 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-04-19 02:31:48.887 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-04-19 02:31:49.358 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-04-19 02:31:49.831 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-04-19 02:31:50.303 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-04-19 02:31:50.775 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-04-19 02:31:51.246 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-04-19 02:31:51.717 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-04-19 02:31:52.188 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-04-19 02:31:52.661 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-04-19 02:31:53.134 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-04-19 02:31:53.606 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-04-19 02:31:54.077 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-04-19 02:31:54.550 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-04-19 02:31:55.023 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-04-19 02:31:55.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:31:55.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:55.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:31:55.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:31:55.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:31:55.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:31:55.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:31:55.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:31:55.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:31:55.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:31:55.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:31:55.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:55.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:31:55.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:31:55.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:31:55.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:31:55.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:31:55.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:31:55.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:55.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:31:55.495 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-04-19 02:31:55.966 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-04-19 02:31:56.439 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-04-19 02:31:56.912 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-04-19 02:31:57.384 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-04-19 02:31:57.855 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-04-19 02:31:58.328 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-04-19 02:31:58.800 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-04-19 02:31:59.272 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-04-19 02:31:59.743 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-04-19 02:32:00.217 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-04-19 02:32:00.689 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-04-19 02:32:01.161 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-04-19 02:32:01.632 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-04-19 02:32:02.105 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-04-19 02:32:02.578 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-04-19 02:32:03.050 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-04-19 02:32:03.530 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-04-19 02:32:04.002 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-04-19 02:32:04.473 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-04-19 02:32:04.943 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-04-19 02:32:05.414 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-04-19 02:32:05.888 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-04-19 02:32:06.360 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-04-19 02:32:06.832 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-04-19 02:32:07.303 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-04-19 02:32:07.776 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-04-19 02:32:08.249 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-04-19 02:32:08.721 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-04-19 02:32:09.194 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-04-19 02:32:09.667 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-04-19 02:32:10.139 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-04-19 02:32:10.610 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-04-19 02:32:11.083 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-04-19 02:32:11.555 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-04-19 02:32:12.028 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-04-19 02:32:12.501 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-04-19 02:32:12.974 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-04-19 02:32:13.446 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-04-19 02:32:13.917 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-04-19 02:32:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-04-19 02:32:14.862 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-04-19 02:32:15.334 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-04-19 02:32:15.805 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-04-19 02:32:16.279 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-04-19 02:32:16.751 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-04-19 02:32:17.223 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-04-19 02:32:17.694 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-04-19 02:32:18.167 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-04-19 02:32:18.640 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-04-19 02:32:19.111 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-04-19 02:32:19.583 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-04-19 02:32:20.056 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-04-19 02:32:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-04-19 02:32:21.001 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-04-19 02:32:21.474 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-04-19 02:32:21.946 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-04-19 02:32:22.418 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-04-19 02:32:22.890 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-04-19 02:32:23.362 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-04-19 02:32:23.835 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-04-19 02:32:24.307 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-04-19 02:32:24.778 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-04-19 02:32:25.249 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-04-19 02:32:25.723 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-04-19 02:32:26.195 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-04-19 02:32:26.667 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-04-19 02:32:27.138 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-04-19 02:32:27.611 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-04-19 02:32:28.084 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-04-19 02:32:28.556 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-04-19 02:32:29.027 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-04-19 02:32:29.500 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-04-19 02:32:29.973 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-04-19 02:32:30.445 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-04-19 02:32:30.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:30.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:30.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:30.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:30.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:30.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:30.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:30.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:30.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:30.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:30.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:30.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:30.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:32:30.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:32:30.732 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:30.732 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=29746 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:32:35.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:32:35.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:32:35.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:35.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:35.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:35.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:35.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:35.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:32:35.740 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:35.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:32:35.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:32:35.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:32:35.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:32:35.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:32:35.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:35.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:35.744 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:32:35.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:32:35.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:32:35.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:35.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:32:35.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:32:35.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:32:35.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:35.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:35.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:32:35.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:32:35.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:32:35.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:35.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:32:35.749 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:32:35.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:32:35.749 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:35.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:35.749 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:32:35.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:32:35.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:32:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:32:35.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:32:35.752 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:32:35.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:35.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:35.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:35.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:35.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:35.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:32:35.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:32:35.754 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:32:40.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:32:40.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:32:40.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:40.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:40.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:40.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:40.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:40.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:32:40.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:40.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:32:40.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:32:40.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:32:40.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:32:40.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:32:40.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:40.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:40.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:32:40.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:32:40.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:32:40.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:32:40.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:32:40.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:32:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:40.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:32:40.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:32:40.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:32:40.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:40.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:40.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:32:40.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:32:40.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:32:40.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:32:40.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:32:40.786 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:32:40.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:40.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:32:41.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:32:41.316 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:32:41.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:41.319 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:32:41.322 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:32:41.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:41.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:41.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:41.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:41.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:41.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:41.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:41.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:41.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:41.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:41.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:32:41.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:32:41.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:41.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:41.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:41.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:41.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:32:41.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:41.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:41.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:41.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:32:42.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:32:42.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:42.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:42.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:42.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:42.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:42.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:42.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:42.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:42.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:42.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:42.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:42.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:42.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:42.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:42.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:42.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:42.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:42.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:42.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:32:42.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:32:42.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:42.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:42.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:42.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:43.155 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:32:43.629 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:32:43.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:43.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:43.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:43.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:44.101 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:32:44.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:32:44.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:45.045 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:32:45.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:45.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:45.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:45.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:45.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:45.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:45.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:45.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:45.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:45.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:45.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:45.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:45.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:45.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:45.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:32:45.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:32:45.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:45.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:45.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:45.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:45.515 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:32:45.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:45.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:45.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:45.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:45.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:32:46.455 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:32:46.927 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:32:47.400 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:32:47.873 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:32:48.345 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:32:48.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:48.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:48.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:48.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:48.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:48.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:48.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:48.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:48.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:48.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:48.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:48.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:48.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:48.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:32:48.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:32:48.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:48.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:48.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:48.817 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:32:48.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:49.288 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:32:49.762 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:32:50.234 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:32:50.706 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:32:51.177 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:32:51.651 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:32:52.123 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:32:52.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:52.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:52.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:52.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:52.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:52.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:52.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:52.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:52.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:52.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:52.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:32:52.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:32:52.222 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:32:52.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:52.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:57.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:32:57.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:32:57.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:57.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:57.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:57.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:57.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:32:57.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:32:57.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:57.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:32:57.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:32:57.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:32:57.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:32:57.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:32:57.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:57.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:32:57.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:32:57.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:32:57.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:32:57.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:57.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:32:57.250 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:32:57.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:32:57.250 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:57.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:32:57.250 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:32:57.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:32:57.250 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:32:57.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:57.253 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:32:57.253 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:32:57.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:32:57.253 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:32:57.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:32:57.253 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:32:57.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:32:57.253 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:32:57.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:57.257 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:32:57.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:32:57.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:32:57.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:32:57.257 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:32:57.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:32:57.258 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:32:57.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:32:57.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:32:57.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:32:57.786 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:32:57.788 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:32:57.789 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:32:57.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:57.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:57.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:57.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:57.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:32:57.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:32:57.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:32:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:32:57.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:57.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:57.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:57.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:32:57.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:32:57.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:32:57.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:32:57.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:57.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:32:58.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:32:58.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:58.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:58.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:58.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:58.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:32:59.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:32:59.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:32:59.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:32:59.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:32:59.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:32:59.627 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:33:00.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:33:00.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:33:00.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:33:00.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:33:00.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:33:00.572 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:33:01.045 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:33:01.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:33:01.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:33:01.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:33:01.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:33:01.515 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:33:01.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:33:02.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:33:02.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:33:02.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:33:02.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:33:02.459 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:33:02.930 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:33:03.401 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:33:03.874 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:33:04.347 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:33:04.820 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:33:05.293 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:33:05.765 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:33:06.238 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:33:06.709 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:33:07.182 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:33:07.655 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:33:08.127 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:33:08.601 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:33:09.073 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:33:09.546 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:33:10.019 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:33:10.492 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:33:10.964 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:33:11.435 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:33:11.906 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:33:12.376 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:33:12.847 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:33:13.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:13.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:13.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:13.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:13.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:13.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:13.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:33:13.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:13.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:13.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:33:13.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:13.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:13.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:33:13.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:33:13.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:33:13.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:33:13.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:33:13.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:33:13.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:13.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:13.320 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:33:13.793 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:33:14.266 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:33:14.737 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:33:15.207 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:33:15.681 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:33:16.153 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:33:16.626 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:33:17.099 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:33:17.572 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:33:18.044 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:33:18.515 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:33:18.989 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:33:19.461 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:33:19.933 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:33:20.404 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:33:20.875 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:33:21.348 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:33:21.821 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:33:22.293 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:33:22.764 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:33:23.238 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:33:23.710 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:33:24.181 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:33:24.654 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:33:25.127 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:33:25.599 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:33:26.070 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:33:26.541 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:33:27.012 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:33:27.482 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:33:27.953 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:33:28.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:28.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:28.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:28.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:28.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:28.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:28.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:33:28.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:28.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:28.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:33:28.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:28.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:28.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:33:28.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:33:28.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:33:28.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:33:28.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:33:28.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:33:28.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:28.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:28.424 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:33:28.895 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:33:29.365 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:33:29.836 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:33:30.309 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:33:30.782 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:33:31.254 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:33:31.725 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:33:32.197 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:33:32.671 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:33:33.143 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:33:33.614 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:33:34.085 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:33:34.555 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:33:35.026 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:33:35.497 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:33:35.971 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:33:36.443 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:33:36.915 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:33:37.386 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:33:37.857 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:33:38.328 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:33:38.801 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:33:39.273 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:33:39.746 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:33:40.219 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:33:40.692 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:33:41.164 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:33:41.635 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:33:42.105 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:33:42.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:42.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:42.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:42.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:42.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:42.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:42.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:33:42.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:42.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:42.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:33:42.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:42.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:42.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:33:42.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:33:42.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:33:42.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:33:42.576 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:33:42.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:33:42.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:33:42.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:42.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:43.047 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:33:43.520 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:33:43.993 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:33:44.465 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:33:44.936 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:33:45.409 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:33:45.881 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:33:46.353 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:33:46.824 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:33:47.295 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:33:47.768 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:33:48.241 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:33:48.713 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:33:49.184 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:33:49.658 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:33:50.130 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:33:50.602 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:33:51.073 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:33:51.546 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:33:52.019 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:33:52.491 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:33:52.962 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:33:53.433 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:33:53.906 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:33:54.378 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:33:54.850 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:33:55.321 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:33:55.794 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:33:56.267 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:33:56.739 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:33:57.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:33:57.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:33:57.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:33:57.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:33:57.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:33:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:33:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:33:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:33:57.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:33:57.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:33:57.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:33:57.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:33:57.144 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:33:57.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:33:57.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:33:57.145 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=12942 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:02.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:34:02.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:34:02.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:02.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:02.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:02.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:02.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:02.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:34:02.164 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:02.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:34:02.164 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:34:02.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:34:02.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:34:02.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:34:02.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:34:02.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:34:02.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:02.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:34:02.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:34:02.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:34:02.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:02.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:02.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:34:02.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:34:02.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:34:02.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:34:02.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:34:02.172 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:34:02.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:02.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:02.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:34:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:34:02.691 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:34:02.692 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:34:02.693 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:34:02.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:02.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:02.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:02.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:02.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:02.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:02.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:02.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:02.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:02.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:02.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:02.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:02.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:02.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:02.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:02.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:02.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:03.128 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:34:03.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:03.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:03.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:03.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:03.601 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:34:04.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:34:04.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:04.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:04.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:04.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:04.546 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:34:05.019 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:34:05.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:05.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:05.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:05.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:05.492 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:34:05.965 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:34:06.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:06.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:06.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:06.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:06.436 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:34:06.909 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:34:07.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:07.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:07.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:07.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:07.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:34:07.853 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:34:08.324 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:34:08.797 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:34:09.270 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:34:09.742 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:34:10.213 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:34:10.686 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:34:11.159 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:34:11.631 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:34:12.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:34:12.573 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:34:13.046 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:34:13.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:13.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:13.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:13.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:13.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:13.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:13.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:13.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:13.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:13.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:13.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:13.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:13.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:13.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:13.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:13.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:13.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:13.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:13.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:13.518 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:34:13.990 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:34:14.461 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:34:14.934 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:34:15.406 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:34:15.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:34:16.349 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:34:16.823 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:34:17.296 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:34:17.768 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:34:18.239 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:34:18.709 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:34:19.180 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:34:19.651 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:34:20.122 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:34:20.593 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:34:21.066 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:34:21.539 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:34:22.011 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:34:22.485 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:34:22.957 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:34:23.429 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:34:23.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:23.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:23.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:23.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:23.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:23.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:23.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:23.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:23.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:23.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:23.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:23.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:23.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:23.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:23.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:23.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:23.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:23.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:23.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:23.900 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:34:24.373 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:34:24.846 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:34:25.318 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:34:25.789 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:34:26.260 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:34:26.733 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:34:27.205 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:34:27.677 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:34:28.148 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:34:28.622 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:34:29.094 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:34:29.566 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:34:30.037 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:34:30.508 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:34:30.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:30.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:30.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:30.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:30.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:30.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:30.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:30.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:30.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:30.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:30.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:30.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:30.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:30.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:30.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:30.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:30.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:30.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:30.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:30.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:30.979 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:34:31.450 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:34:31.923 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:34:32.395 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:34:32.867 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:34:33.338 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:34:33.812 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:34:34.284 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:34:34.756 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:34:35.227 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:34:35.701 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:34:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:34:36.645 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:34:37.116 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:34:37.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:37.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:37.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:37.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:37.587 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:34:37.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:37.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:37.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:37.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:37.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:37.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:37.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:34:37.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:34:37.602 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:34:37.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:37.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:37.602 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7655 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:42.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:34:42.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:34:42.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:42.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:42.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:42.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:42.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:42.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:34:42.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:42.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:34:42.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:34:42.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:34:42.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:34:42.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:34:42.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:42.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:42.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:34:42.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:34:42.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:34:42.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:42.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:34:42.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:34:42.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:34:42.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:42.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:42.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:34:42.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:34:42.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:34:42.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:42.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:34:42.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:34:42.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:34:42.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:42.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:42.627 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:34:42.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:34:42.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:34:42.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:34:42.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:34:42.630 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:34:42.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:42.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:42.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:42.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:34:43.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:34:43.153 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:34:43.155 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:34:43.158 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:34:43.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:43.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:43.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:43.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:43.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:43.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:43.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:43.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:43.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:43.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:43.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:43.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:43.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:43.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:43.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:43.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:43.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:43.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:34:43.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:43.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:43.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:43.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:43.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:43.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:43.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:43.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:43.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:43.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:43.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:43.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:43.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:43.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:43.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:43.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:43.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:34:44.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:44.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:44.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:44.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:44.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:44.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:44.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:44.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:44.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:44.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:44.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:44.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:44.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:44.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:44.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:44.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:44.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:44.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:44.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:44.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:44.528 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:34:44.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:44.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:44.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:44.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:44.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:44.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:44.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:44.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:44.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:44.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:44.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:44.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:44.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:44.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:44.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:44.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:44.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:44.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:44.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:44.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:44.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:45.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:45.001 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:34:45.473 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:34:45.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:45.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:45.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:45.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:45.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:45.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:45.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:45.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:45.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:45.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:45.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:45.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:45.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:45.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:45.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:45.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:45.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:34:45.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:34:45.806 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:34:45.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=686 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:45.807 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=686 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:45.807 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=686 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:45.807 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=686 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:45.807 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=686 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:34:50.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:34:50.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:34:50.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:50.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:50.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:50.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:50.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:34:50.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:34:50.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:50.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:34:50.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:34:50.818 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:34:50.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:34:50.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:34:50.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:34:50.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:34:50.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:34:50.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:34:50.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:34:50.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:34:50.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:34:50.823 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:34:50.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:34:50.827 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:34:51.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:34:51.344 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:34:51.345 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:34:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:51.346 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:34:51.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:51.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:51.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:51.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:51.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:51.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:51.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:51.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:51.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:51.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:51.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:51.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:51.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:51.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:51.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:51.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:51.777 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:34:51.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:51.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:51.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:51.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:52.249 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:34:52.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:34:52.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:52.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:52.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:52.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:53.195 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:34:53.668 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:34:53.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:54.140 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:34:54.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:54.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:54.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:54.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:54.614 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:34:54.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:54.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:54.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:54.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:54.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:54.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:54.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:54.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:54.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:54.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:54.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:54.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:54.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:54.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:54.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:54.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:54.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:54.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:54.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:54.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:55.085 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:34:55.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:34:55.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:34:55.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:34:55.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:34:55.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:34:56.028 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:34:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:34:56.972 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:34:57.445 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:34:57.917 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:34:58.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:58.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:58.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:58.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:58.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:58.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:58.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:58.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:34:58.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:34:58.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:34:58.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:34:58.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:58.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:58.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:58.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:34:58.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:34:58.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:34:58.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:34:58.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:58.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:34:58.388 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:34:58.861 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:34:59.334 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:34:59.806 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:35:00.277 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:35:00.750 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:35:01.222 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:35:01.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:01.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:01.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:01.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:01.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:01.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:01.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:01.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:01.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:01.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:01.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:01.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:01.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:01.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:01.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:01.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:01.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:01.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:01.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:35:01.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:02.165 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:35:02.639 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:35:03.111 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:35:03.583 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:35:04.054 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:35:04.527 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:35:05.000 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:35:05.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:05.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:05.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:05.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:05.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:05.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:05.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:05.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:05.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:05.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:05.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:05.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:05.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:05.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:05.338 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:05.338 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:10.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:10.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:10.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:10.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:10.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:10.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:10.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:10.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:35:10.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:10.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:35:10.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:35:10.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:35:10.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:35:10.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:10.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:35:10.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:35:10.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:35:10.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:10.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:10.346 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:35:10.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:35:10.346 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:35:10.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:35:10.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:35:10.348 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:35:10.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:35:10.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:35:10.350 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:35:10.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:10.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:35:10.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:35:10.871 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:35:10.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:10.874 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:35:10.875 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:35:10.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:10.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:10.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:10.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:10.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:10.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:10.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:10.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:10.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:10.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:10.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:10.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:10.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:10.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:10.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:10.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.303 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:35:11.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:11.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:11.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:11.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:11.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:11.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:11.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:11.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:11.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:11.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:11.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:11.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:11.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:11.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:11.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:11.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:11.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:11.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:11.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:11.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:11.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:35:11.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:11.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:11.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:11.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:11.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:11.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:11.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:11.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:11.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:11.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:11.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:11.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:11.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:11.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:11.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:12.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:12.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:12.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:12.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:12.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:35:12.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:12.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:12.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:12.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:12.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:35:13.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:13.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:13.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:13.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:13.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:13.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:13.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:13.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:13.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:13.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:13.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:13.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:13.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:13.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:13.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:13.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:13.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:13.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:13.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:13.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:13.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:35:13.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:13.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:13.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:13.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:13.661 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:35:14.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:35:14.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:14.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:14.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:14.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:14.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:14.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:14.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:14.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:14.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:14.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:14.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:14.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:14.233 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:35:14.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:14.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:19.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:19.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:19.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:19.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:19.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:19.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:19.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:19.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:35:19.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:19.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:35:19.248 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:35:19.250 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:35:19.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:35:19.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:35:19.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:19.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:19.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:35:19.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:35:19.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:35:19.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:35:19.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:35:19.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:35:19.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:19.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:35:19.256 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:35:19.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:35:19.256 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:19.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:19.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:35:19.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:35:19.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:35:19.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:35:19.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:35:19.260 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:35:19.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:19.264 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:35:19.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:35:19.779 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:35:19.780 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:35:19.781 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:35:19.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:19.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:19.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:19.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:19.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:19.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:19.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:19.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:19.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:19.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:19.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:19.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:19.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:19.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:19.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:19.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:19.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:20.214 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:35:20.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:20.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:20.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:20.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:20.685 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:35:21.159 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:35:21.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:21.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:21.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:21.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:21.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:35:22.104 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:35:22.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:22.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:22.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:22.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:22.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:35:22.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:22.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:22.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:22.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:22.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:22.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:22.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:22.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:22.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:22.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:22.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:22.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:22.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:22.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:22.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:22.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:22.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:22.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:22.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:22.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:23.049 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:35:23.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:23.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:23.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:23.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:23.522 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:35:23.992 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:35:24.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:24.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:24.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:24.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:24.466 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:35:24.938 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:35:25.410 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:35:25.881 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:35:26.352 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:35:26.823 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:35:27.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:27.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:27.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:27.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:27.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:27.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:27.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:27.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:27.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:27.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:27.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:27.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:27.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:27.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:27.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:27.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:27.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:27.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:27.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:27.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:27.296 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:35:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:35:28.241 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:35:28.712 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:35:29.185 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:35:29.658 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:35:30.130 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:35:30.598 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:35:31.071 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:35:31.543 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:35:32.014 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:35:32.485 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:35:32.958 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:35:33.431 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:35:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:35:34.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:34.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:34.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:34.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:34.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:34.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:34.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:34.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:34.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:34.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:34.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:34.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:34.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:34.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:34.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:34.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:34.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:34.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:34.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:34.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:34.374 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:35:34.847 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:35:35.319 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:35:35.791 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:35:36.262 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:35:36.736 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:35:37.208 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:35:37.680 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:35:38.151 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:35:38.624 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:35:39.096 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:35:39.568 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:35:40.040 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:35:40.510 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:35:40.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:40.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:40.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:40.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:40.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:40.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:40.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:40.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:40.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:40.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:40.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:40.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:40.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:35:40.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:40.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:40.837 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4663 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:45.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:45.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:45.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:45.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:45.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:45.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:45.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:45.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:35:45.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:45.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:35:45.857 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:35:45.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:35:45.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:35:45.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:35:45.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:45.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:45.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:35:45.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:35:45.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:35:45.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:45.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:35:45.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:35:45.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:35:45.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:45.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:45.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:35:45.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:35:45.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:35:45.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:45.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:35:45.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:35:45.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:35:45.872 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:35:45.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:45.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:35:45.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:35:45.872 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:35:45.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:45.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:35:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:35:45.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:35:45.880 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:35:45.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:35:45.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:35:45.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:35:46.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:35:46.410 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:35:46.412 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:35:46.413 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:35:46.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:46.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:46.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:46.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:46.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:46.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:46.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:46.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:46.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:46.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:46.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:46.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:46.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:46.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:46.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:46.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:46.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:46.836 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:35:46.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:46.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:46.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:46.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:47.307 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:35:47.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:35:47.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:47.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:47.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:47.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:48.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:48.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:48.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:48.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:48.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:35:48.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:48.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:48.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:48.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:48.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:48.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:48.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:48.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:48.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:48.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:48.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:48.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:48.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:48.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:48.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:48.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:48.724 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:35:48.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:48.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:48.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:48.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:49.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:35:49.669 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:35:49.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:49.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:49.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:49.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:50.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:35:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:35:50.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:50.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:50.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:50.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:51.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:51.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:51.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:51.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:51.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:51.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:51.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:51.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:51.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:51.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:51.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:51.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:51.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:51.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:51.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:51.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:51.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:51.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:51.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:51.084 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:35:51.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:51.555 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:35:52.026 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:35:52.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:35:52.971 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:35:53.443 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:35:53.914 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:35:54.385 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:35:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:35:55.331 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:35:55.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:55.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:55.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:55.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:55.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:55.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:55.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:55.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:55.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:35:55.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:55.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:55.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:55.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:55.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:35:55.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:35:55.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:35:55.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:35:55.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:55.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:35:56.274 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:35:56.746 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:35:57.217 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:35:57.690 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:35:58.163 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:35:58.635 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:35:59.106 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:35:59.579 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:35:59.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:35:59.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:35:59.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:35:59.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:35:59.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:35:59.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:35:59.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:35:59.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:35:59.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:35:59.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:35:59.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:35:59.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:35:59.913 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:35:59.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:35:59.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:35:59.914 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:04.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:04.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:04.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:04.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:04.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:04.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:04.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:04.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:04.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:04.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:04.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:04.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:04.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:04.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:04.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:04.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:04.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:04.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:04.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:04.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:04.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:04.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:04.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:04.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:04.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:04.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:04.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:04.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:04.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:04.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:04.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:04.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:04.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:04.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:04.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:04.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:04.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:04.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:04.935 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:04.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:04.936 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:04.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:04.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:04.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:04.940 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:05.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:05.463 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:05.466 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:05.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.468 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:05.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:05.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:05.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:05.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:05.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:05.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:06.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:06.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:06.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:06.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:06.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:06.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:06.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:06.799 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:06.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:06.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:11.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:11.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:11.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:11.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:11.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:11.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:11.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:11.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:11.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:11.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:11.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:11.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:11.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:11.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:11.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:11.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:11.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:11.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:11.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:11.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:11.818 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:11.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:11.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:11.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:11.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:11.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:11.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:11.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:11.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:11.822 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:11.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:11.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:11.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:11.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:11.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:11.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:11.828 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:11.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:11.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:11.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:12.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:12.351 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:12.353 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:12.354 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:12.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:12.781 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:12.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:12.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:12.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:12.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:13.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.254 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:13.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:13.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:13.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:13.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:13.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:13.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:13.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:13.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:13.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:13.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:13.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:13.686 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:13.686 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:18.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:18.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:18.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:18.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:18.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:18.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:18.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:18.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:18.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:18.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:18.698 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:18.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:18.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:18.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:18.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:18.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:18.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:18.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:18.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:18.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:18.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:18.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:18.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:18.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:18.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:18.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:18.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:18.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:18.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:18.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:18.709 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:18.709 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:18.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:19.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:19.231 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:19.232 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:19.233 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:19.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:19.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:19.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:19.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:19.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:19.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:19.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:20.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:20.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:20.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:20.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:20.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:20.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:20.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:20.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:20.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:20.572 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:20.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:20.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:25.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:25.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:25.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:25.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:25.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:25.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:25.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:25.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:25.589 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:25.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:25.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:25.593 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:25.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:25.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:25.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:25.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:25.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:25.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:25.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:25.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:25.596 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:25.596 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:25.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:25.596 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:25.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:25.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:25.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:25.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:25.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:25.598 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:25.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:25.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:25.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:25.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:25.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:25.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:25.599 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:25.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:25.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:25.602 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:25.602 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:25.602 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:25.606 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:26.082 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:26.123 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:26.124 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:26.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.125 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:26.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.553 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:26.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:26.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:26.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:26.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:26.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:26.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.025 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:27.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:27.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:27.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:27.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:27.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:27.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:27.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:27.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:27.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:27.449 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:27.449 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:27.450 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:27.450 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:27.450 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:27.450 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:27.450 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:32.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:32.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:32.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:32.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:32.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:32.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:32.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:32.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:32.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:32.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:32.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:32.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:32.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:32.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:32.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:32.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:32.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:32.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:32.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:32.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:32.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:32.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:32.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:32.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:32.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:32.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:32.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:32.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:32.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:32.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:32.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:32.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:32.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:32.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:32.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:32.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:32.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:32.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:32.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:32.487 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:32.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:32.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:32.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:32.971 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:33.025 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:33.027 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.030 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.441 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:33.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:33.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:33.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:33.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:33.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:33.913 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:34.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:34.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:34.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:34.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:34.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:34.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:34.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:34.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:34.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:34.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:34.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:34.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:34.361 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:34.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:39.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:39.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:39.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:39.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:39.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:39.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:39.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:39.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:39.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:39.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:39.378 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:39.381 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:39.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:39.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:39.381 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:39.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:39.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:39.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:39.383 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:39.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:39.384 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:39.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:39.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:39.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:39.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:39.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:39.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:39.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:39.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:39.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:39.387 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:39.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:39.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:39.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:39.390 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:39.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:39.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:39.868 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:39.905 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:39.906 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:39.907 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:39.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:39.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:39.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:39.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:39.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:40.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:40.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:40.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:40.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:40.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:41.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:41.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:41.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:41.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:41.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:41.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:41.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:41.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:41.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:41.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:41.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:41.239 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:41.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:46.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:46.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:46.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:46.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:46.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:46.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:46.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:46.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:46.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:46.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:46.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:46.260 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:46.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:46.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:46.261 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:46.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:46.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:46.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:46.262 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:46.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:46.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:46.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:46.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:46.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:46.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:46.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:46.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:46.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:46.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:46.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:46.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:46.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:46.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:46.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:46.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:46.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:46.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:46.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:46.797 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:46.800 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:46.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:46.803 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:46.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:46.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:46.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:46.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:36:47.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:47.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:47.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:47.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:47.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.690 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:36:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:47.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:48.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:48.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:48.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:48.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:48.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:48.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:48.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:48.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:48.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:48.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:48.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:48.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:48.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:48.139 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:48.139 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:48.139 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:48.140 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:48.140 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:53.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:53.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:53.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:53.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:53.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:53.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:53.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:53.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:53.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:53.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:53.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:53.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:53.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:53.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:53.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:53.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:53.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:53.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:53.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:53.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:53.160 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:53.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:53.160 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:53.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:53.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:53.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:53.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:53.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:53.162 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:53.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:53.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:53.163 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:53.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:53.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:53.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:53.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:53.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:53.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:53.166 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:53.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:53.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:53.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:53.692 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:53.694 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:53.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.696 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:53.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:53.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:53.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:53.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:53.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:53.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:53.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:53.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:53.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:53.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:53.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:53.780 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:53.780 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:36:58.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:58.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:58.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:58.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:58.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:58.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:58.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:58.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:58.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:58.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:36:58.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:36:58.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:36:58.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:36:58.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:58.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:58.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:58.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:36:58.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:36:58.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:36:58.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:58.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:36:58.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:36:58.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:58.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:58.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:58.805 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:36:58.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:36:58.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:36:58.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:58.807 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:36:58.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:36:58.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:58.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:36:58.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:36:58.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:36:58.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:36:58.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:36:58.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:58.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:36:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:36:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:36:58.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:36:58.815 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:36:58.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:36:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:36:58.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:36:58.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:36:59.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:36:59.349 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:36:59.351 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:36:59.352 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:36:59.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:36:59.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:36:59.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:36:59.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:36:59.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:36:59.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:36:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:36:59.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:36:59.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:36:59.463 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:36:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:36:59.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:04.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:04.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:04.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:04.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:04.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:04.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:04.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:04.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:04.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:04.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:04.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:04.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:04.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:04.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:04.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:04.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:04.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:04.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:04.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:04.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:04.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:04.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:04.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:04.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:04.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:04.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:04.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:04.479 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:04.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:04.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:04.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:04.998 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:04.999 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:05.000 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:05.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:05.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:05.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:05.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:05.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:05.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:05.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:05.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:05.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:05.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:05.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:05.074 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:05.074 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:10.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:10.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:10.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:10.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:10.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:10.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:10.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:10.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:10.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:10.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:10.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:10.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:10.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:10.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:10.095 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:10.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:10.096 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:10.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:10.096 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:10.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:10.098 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:10.098 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:10.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:10.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:10.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:10.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:10.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:10.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:10.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:10.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:10.101 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:10.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:10.101 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:10.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:10.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:10.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:10.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:10.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:10.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:10.106 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:10.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:10.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:10.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:10.634 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:10.636 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:10.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.637 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:10.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:10.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:10.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:10.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:10.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:10.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:10.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:10.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:10.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:10.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:10.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:10.719 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:10.719 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:10.719 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:15.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:15.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:15.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:15.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:15.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:15.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:15.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:15.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:15.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:15.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:15.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:15.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:15.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:15.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:15.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:15.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:15.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:15.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:15.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:15.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:15.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:15.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:15.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:15.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:15.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:15.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:15.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:15.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:15.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:15.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:15.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:15.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:15.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:15.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:15.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:15.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:15.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:15.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:15.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:15.747 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:15.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:15.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:15.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:16.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:16.273 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:16.276 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:16.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.279 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:16.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:16.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:16.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:16.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:16.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:16.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:16.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:16.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:16.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:16.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:16.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:16.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:16.367 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:21.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:21.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:21.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:21.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:21.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:21.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:21.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:21.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:21.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:21.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:21.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:21.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:21.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:21.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:21.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:21.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:21.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:21.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:21.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:21.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:21.389 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:21.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:21.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:21.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:21.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:21.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:21.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:21.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:21.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:21.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:21.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:21.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:21.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:21.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:21.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:21.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:21.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:21.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:21.394 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:21.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:21.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:21.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:21.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:21.913 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:21.914 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:21.915 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:21.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:21.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:21.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:22.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:22.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:22.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:22.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:22.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:22.018 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:22.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:22.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:27.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:27.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:27.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:27.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:27.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:27.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:27.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:27.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:27.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:27.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:27.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:27.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:27.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:27.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:27.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:27.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:27.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:27.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:27.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:27.045 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:27.045 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:27.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:27.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:27.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:27.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:27.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:27.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:27.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:27.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:27.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:27.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:27.050 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:27.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:27.050 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:27.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:27.050 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:27.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:27.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:27.057 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:27.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:27.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:27.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:27.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:27.588 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:27.590 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:27.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.592 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:27.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:27.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:27.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:27.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:27.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:27.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:27.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:27.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:27.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:27.692 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:27.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:27.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:27.693 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:32.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:32.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:32.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:32.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:32.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:32.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:32.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:32.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:32.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:32.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:32.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:32.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:32.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:32.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:32.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:32.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:32.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:32.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:32.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:32.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:32.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:32.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:32.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:32.715 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:32.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:32.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:32.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:32.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:32.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:32.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:32.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:32.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:32.722 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:32.722 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:32.722 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:32.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:32.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:32.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:33.205 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:33.242 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:33.242 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:33.242 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:33.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:33.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:33.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:33.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:37:33.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:33.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:33.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:33.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:37:33.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:37:33.677 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:37:33.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:33.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:33.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:33.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:34.149 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:37:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:37:34.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:34.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:34.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:34.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:37:35.567 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:37:35.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:35.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:35.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:35.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:36.038 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:37:36.511 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:37:36.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:36.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:36.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:36.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:36.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:36.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:36.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:36.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:36.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:36.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:36.722 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:36.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:36.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:41.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:41.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:41.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:41.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:41.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:41.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:41.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:41.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:41.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:41.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:41.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:41.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:41.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:41.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:41.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:41.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:41.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:41.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:41.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:41.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:41.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:41.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:41.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:41.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:41.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:41.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:41.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:41.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:41.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:41.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:41.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:41.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:41.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:41.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:41.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:41.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:41.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:41.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:41.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:41.748 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:41.748 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:41.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:41.753 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:42.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:42.274 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:42.275 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:42.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:42.278 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:42.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:42.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:42.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:37:42.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:42.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:42.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:42.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:37:42.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:37:42.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:37:42.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:42.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:42.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:42.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:42.699 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:37:42.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:42.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:42.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:42.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:42.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:42.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:42.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:42.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:37:42.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:42.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:42.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:42.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:37:42.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:37:42.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:42.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:42.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:42.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:42.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:42.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:42.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:42.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:42.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:42.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:42.853 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:37:42.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:42.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:42.854 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:37:47.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:37:47.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:37:47.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:47.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:47.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:47.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:47.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:37:47.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:47.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:47.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:37:47.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:37:47.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:37:47.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:37:47.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:47.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:47.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:37:47.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:37:47.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:37:47.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:37:47.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:47.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:37:47.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:37:47.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:47.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:47.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:37:47.875 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:37:47.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:37:47.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:37:47.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:47.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:37:47.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:37:47.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:47.878 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:37:47.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:37:47.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:37:47.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:37:47.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:37:47.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:37:47.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:37:47.882 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:37:47.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:37:47.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:37:47.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:37:47.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:37:48.366 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:37:48.405 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:37:48.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:48.407 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:37:48.410 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:37:48.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:48.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:48.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:37:48.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:48.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:48.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:48.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:37:48.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:37:48.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:37:48.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:48.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:48.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:48.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:48.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:37:48.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:48.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:37:48.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:37:48.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:37:48.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:37:48.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:37:48.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:37:48.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:37:48.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:37:48.834 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:37:48.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:48.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:48.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:48.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:49.307 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:37:49.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:37:49.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:49.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:49.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:49.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:50.252 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:37:50.725 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:37:50.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:50.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:50.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:50.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:51.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:37:51.670 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:37:51.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:51.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:51.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:51.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:52.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:37:52.615 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:37:52.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:37:52.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:37:52.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:37:52.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:37:53.087 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:37:53.559 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:37:54.032 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:37:54.505 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:37:54.978 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:37:55.448 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:37:55.919 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:37:56.392 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:37:56.865 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:37:57.337 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:37:57.808 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:37:58.279 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:37:58.752 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:37:59.225 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:37:59.697 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:38:00.168 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:38:00.641 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:38:01.114 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:38:01.586 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:38:02.057 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:38:02.528 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:38:03.001 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:38:03.474 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:38:03.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:03.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:03.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:03.771 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:03.771 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:03.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:38:03.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:03.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:03.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:03.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:38:03.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:38:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:38:03.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:03.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:03.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:03.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:03.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:03.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:03.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:03.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:03.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:03.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:03.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:03.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:03.807 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:38:03.807 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:03.808 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:03.808 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:03.808 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:08.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:08.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:08.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:08.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:08.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:08.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:08.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:08.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:08.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:08.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:08.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:08.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:08.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:38:08.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:08.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:38:08.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:38:08.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:08.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:08.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:08.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:38:08.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:08.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:38:08.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:08.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:08.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:38:08.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:38:08.822 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:38:08.822 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:38:08.822 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:08.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:08.827 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:38:09.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:38:09.343 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:38:09.344 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:38:09.345 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:38:09.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:38:09.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:09.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:09.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:38:09.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:09.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:09.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:09.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:38:09.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:38:09.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:38:09.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:09.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:09.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:09.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:09.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:38:09.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:38:09.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:09.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:09.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:09.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:38:09.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:09.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:09.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:09.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:38:09.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:38:09.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:38:09.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:09.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:09.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:09.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:09.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:09.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:09.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:09.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:09.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:09.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:09.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:09.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:09.738 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:38:09.738 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:09.738 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:09.738 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:09.738 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:09.738 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:38:14.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:14.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:14.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:14.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:14.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:14.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:14.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:14.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:14.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:14.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:14.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:38:14.751 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:38:14.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:38:14.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:14.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:14.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:14.752 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:38:14.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:14.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:38:14.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:14.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:38:14.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:38:14.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:14.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:14.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:14.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:38:14.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:14.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:38:14.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:14.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:14.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:38:14.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:38:14.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:38:14.760 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:38:14.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:14.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:14.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:38:15.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:38:15.281 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:38:15.281 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:38:15.283 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:38:15.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:38:15.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:15.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:15.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:38:15.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:15.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:15.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:15.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:38:15.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:38:15.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:38:15.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:15.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:15.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:15.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:15.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:38:15.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:15.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:15.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:15.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:16.186 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:38:16.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:38:16.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:16.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:16.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:16.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:17.130 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:38:17.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:17.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:17.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:17.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:38:17.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:38:17.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:38:17.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:38:17.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:38:17.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:38:17.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:38:17.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:38:17.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:38:17.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:17.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:17.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:17.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:17.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:17.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:17.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:17.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:17.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:17.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:17.420 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:38:22.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:22.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:22.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:22.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:22.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:22.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:22.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:22.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:22.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:22.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:22.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:38:22.446 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:38:22.446 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:38:22.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:22.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:22.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:22.447 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:38:22.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:22.447 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:38:22.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:22.448 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:38:22.449 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:38:22.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:22.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:22.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:22.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:38:22.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:22.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:38:22.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:22.451 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:22.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:38:22.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:38:22.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:38:22.455 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:38:22.455 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:38:22.455 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:22.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:22.456 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:38:22.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:27.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:27.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:27.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:27.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:27.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:27.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:27.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:27.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:27.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:27.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:38:27.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:38:27.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:27.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:38:27.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:38:27.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:27.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:38:27.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:38:27.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:38:27.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:27.466 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:38:27.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:27.466 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:38:27.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:38:27.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:38:27.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:38:27.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:38:27.467 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:38:27.468 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:38:27.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:38:27.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:38:27.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:27.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:27.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:27.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:27.469 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:38:27.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:32.596 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.105.20:5700'
2026-04-19 02:38:32.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.105.20:5802)
2026-04-19 02:38:32.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.105.20:5801)
2026-04-19 02:38:32.597 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.105.22:6700'
2026-04-19 02:38:32.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.105.22:6802)
2026-04-19 02:38:32.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.105.22:6801)
2026-04-19 02:38:32.597 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.105.20:5700/1'
2026-04-19 02:38:32.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.105.20:5804)
2026-04-19 02:38:32.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.105.20:5803)
2026-04-19 02:38:32.597 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.105.20:5700/2'
2026-04-19 02:38:32.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.105.20:5806)
2026-04-19 02:38:32.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.105.20:5805)
2026-04-19 02:38:32.597 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.105.20:5700/3'
2026-04-19 02:38:32.597 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.105.20:5808)
2026-04-19 02:38:32.597 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.105.20:5807)
2026-04-19 02:38:32.597 [INFO] fake_trx.py:429 Init complete
2026-04-19 02:38:32.597 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-19 02:38:33.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:33.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:33.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:33.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:33.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:33.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:50.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:50.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:50.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:50.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:50.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:50.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:38:55.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:38:55.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:38:55.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:38:55.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:38:55.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:38:55.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:00.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:00.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:00.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:00.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:00.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:00.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:05.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:05.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:05.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:05.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:05.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:05.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:10.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:10.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:10.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:10.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:10.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:10.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:15.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:15.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:15.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:15.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:15.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:15.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:20.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:20.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:20.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:20.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:20.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:20.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:25.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:25.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:25.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:25.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:25.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:25.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:30.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:30.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:30.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:30.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:30.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:30.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:35.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:35.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:35.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:35.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:35.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:35.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 0 -> 1
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 0 -> 1
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 0 -> 1
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:39:35.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 0 -> 1
2026-04-19 02:39:35.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:39:40.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:40.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:40.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:40.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:40.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:40.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:45.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:39:45.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:39:45.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:39:45.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:39:50.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:50.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:50.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:50.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:50.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:50.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:39:55.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:39:55.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:39:55.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:39:55.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:39:55.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:39:55.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:00.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:00.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:00.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:00.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:00.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:00.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:05.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:05.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:05.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:05.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:05.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:05.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:12.140 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.105.20:5700'
2026-04-19 02:40:12.140 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.105.20:5802)
2026-04-19 02:40:12.140 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.105.20:5801)
2026-04-19 02:40:12.140 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.105.22:6700'
2026-04-19 02:40:12.140 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.105.22:6802)
2026-04-19 02:40:12.140 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.105.22:6801)
2026-04-19 02:40:12.140 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.105.20:5700/1'
2026-04-19 02:40:12.140 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.105.20:5804)
2026-04-19 02:40:12.140 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.105.20:5803)
2026-04-19 02:40:12.140 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.105.20:5700/2'
2026-04-19 02:40:12.140 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.105.20:5806)
2026-04-19 02:40:12.140 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.105.20:5805)
2026-04-19 02:40:12.140 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.105.20:5700/3'
2026-04-19 02:40:12.140 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.105.20:5808)
2026-04-19 02:40:12.140 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.105.20:5807)
2026-04-19 02:40:12.140 [INFO] fake_trx.py:429 Init complete
2026-04-19 02:40:12.140 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-19 02:40:12.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:12.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:12.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:12.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:16.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:16.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:16.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:16.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:16.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 0 -> 1
2026-04-19 02:40:16.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:40:16.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:40:16.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:16.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:16.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:16.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:40:16.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:16.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 0 -> 1
2026-04-19 02:40:16.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:16.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:40:16.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:40:16.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:16.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:16.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:16.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:40:16.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:16.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 0 -> 1
2026-04-19 02:40:16.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:16.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:40:16.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:40:16.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:16.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:16.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:16.737 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:40:16.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:16.737 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 0 -> 1
2026-04-19 02:40:16.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:16.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:40:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:40:16.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:40:16.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:40:16.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:40:16.740 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:40:16.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:16.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:16.745 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:40:17.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:40:17.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:17.283 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:40:17.286 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:40:17.287 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:40:17.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:17.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:17.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:17.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:17.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:17.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:17.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:17.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:17.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:17.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:17.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:17.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:17.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:17.693 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:40:17.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:17.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:17.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:17.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:17.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:17.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:17.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:17.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:17.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:17.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:17.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:17.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:17.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:17.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:17.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:17.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:17.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:17.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:18.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:40:18.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:18.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:18.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:18.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:18.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:18.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:18.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:18.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:18.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:18.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:18.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:18.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:18.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:18.632 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:40:18.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:18.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:18.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:18.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:18.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:18.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:18.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:18.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:19.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:19.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:19.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:19.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:19.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:19.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:19.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:19.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:19.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:19.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:19.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:40:19.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:19.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:19.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:19.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:19.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:19.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:19.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:19.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:19.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:19.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:19.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:19.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:19.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:19.569 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:40:19.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:19.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:19.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:19.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:19.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:19.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:19.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:19.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:19.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:20.035 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:40:20.500 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:40:20.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:20.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:20.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:20.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:20.567 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=832 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:20.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:20.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:20.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:20.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:20.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:20.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:20.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:20.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:20.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:20.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:20.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:20.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:20.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:20.772 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:20.772 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:40:20.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:20.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:20.967 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:40:21.432 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:40:21.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:21.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:21.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:21.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:21.573 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:21.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:21.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:21.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:21.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:21.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:21.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:21.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:21.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:21.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:21.700 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:21.700 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:40:21.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:21.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:21.901 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:40:22.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:22.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:22.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:22.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:22.114 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:22.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:22.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:22.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:22.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:22.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:22.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:22.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:22.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:22.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:22.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:22.373 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:40:22.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:22.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:22.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:22.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:22.839 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:40:23.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:23.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:23.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:23.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:23.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:23.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:23.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:23.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:23.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:23.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:23.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:23.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:23.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:40:23.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:23.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:23.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:23.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:23.780 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:40:24.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:24.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:24.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:24.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:24.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:24.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:24.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:24.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:24.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:24.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:24.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:24.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:24.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:24.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:24.254 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:40:24.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:24.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:24.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:24.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:24.729 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:40:25.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:25.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:25.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:25.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:25.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:25.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:25.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:25.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:25.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:25.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:25.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:25.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:25.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:40:25.236 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:25.236 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:40:25.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:25.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:25.676 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:40:26.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:26.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:26.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:26.027 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:26.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:26.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:26.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:26.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:26.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:26.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:26.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:40:26.183 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:26.184 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:40:26.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:26.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:26.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:26.565 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:26.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:26.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:26.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:26.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:26.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:26.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:26.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:26.620 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:40:26.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:26.682 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:26.682 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:26.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:26.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:26.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:26.777 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:26.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:26.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:26.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:26.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:26.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:26.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:26.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:26.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:26.918 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:26.918 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:26.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:26.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.091 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:40:27.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:27.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:27.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:27.267 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:27.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:27.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:27.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:27.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:27.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:27.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:27.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:27.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:27.387 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:27.388 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:27.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.562 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:40:27.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:27.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:27.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:27.756 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:27.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:27.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:27.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:27.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:27.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:27.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:27.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:27.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:27.858 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:27.858 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:27.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:27.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.032 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:40:28.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:28.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:28.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:28.246 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:28.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:28.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:28.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:28.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:28.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:28.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:28.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:28.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:28.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:28.329 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:28.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:28.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:28.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:28.426 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:28.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:28.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:28.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:28.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:28.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:28.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:28.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:28.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:28.502 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:40:28.537 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:28.537 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:28.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:28.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:28.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:28.915 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:28.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:28.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:28.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:28.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:28.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:28.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:28.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:28.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:28.970 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:40:28.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:29.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:29.031 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:29.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:29.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:29.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:29.399 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:29.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:29.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:29.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:29.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:29.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:29.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:29.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:29.441 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:40:29.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:29.502 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:40:29.502 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:40:29.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:29.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:29.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:29.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:29.889 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:40:29.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:29.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:29.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:29.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:29.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:29.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:29.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:29.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:29.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:29.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:29.910 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:40:29.911 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.911 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.911 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.911 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.911 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.912 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.913 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:29.913 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:34.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:34.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:34.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:34.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:34.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:34.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:34.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:34.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:34.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:34.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:34.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:40:34.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:40:34.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:40:34.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:34.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:34.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:34.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:40:34.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:34.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:40:34.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:34.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:40:34.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:40:34.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:34.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:34.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:34.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:40:34.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:34.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:40:34.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:34.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:40:34.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:40:34.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:34.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:34.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:34.928 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:40:34.928 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:34.928 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:40:34.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:34.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:40:34.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:40:34.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:40:34.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:40:34.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:40:34.933 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:40:34.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:40:34.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:34.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:34.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:40:35.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:40:35.458 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:40:35.461 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:40:35.463 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:40:35.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:35.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:35.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:35.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:40:35.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:35.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:35.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:35.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:35.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:35.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:35.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:36.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:36.348 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-04-19 02:40:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:36.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.812 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:40:36.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:36.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:36.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:36.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:36.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:36.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:36.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:37.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 02:40:37.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:40:37.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:37.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:37.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:37.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:37.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:37.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:37.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:37.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:37.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:37.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:37.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:37.316 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:37.316 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:42.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:42.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:42.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:42.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:42.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:42.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:42.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:42.329 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:42.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:42.329 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:40:42.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:40:42.335 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:40:42.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:42.335 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:42.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:42.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:40:42.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:42.336 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:40:42.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:42.339 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:40:42.339 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:40:42.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:42.339 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:42.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:42.339 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:40:42.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:42.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:40:42.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:42.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:40:42.342 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:40:42.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:42.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:42.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:42.343 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:40:42.343 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:42.343 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:40:42.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:40:42.347 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:40:42.347 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:40:42.347 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:42.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:42.352 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:40:42.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:40:42.871 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:40:42.874 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:40:42.876 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:40:42.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:42.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:42.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:42.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:42.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:42.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:42.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:42.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:42.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:42.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:42.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:42.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:42.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:42.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:42.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:42.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:42.927 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:40:42.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:42.928 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:47.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:47.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:47.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:47.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:47.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:47.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:47.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:47.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:47.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:47.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:47.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:40:47.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:40:47.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:40:47.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:47.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:47.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:47.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:40:47.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:47.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:40:47.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:47.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:40:47.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:40:47.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:47.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:47.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:47.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:40:47.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:47.952 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:40:47.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:47.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:40:47.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:40:47.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:47.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:47.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:47.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:40:47.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:47.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:40:47.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:47.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:40:47.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:40:47.959 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:40:47.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:47.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:47.963 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:40:48.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:40:48.479 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:40:48.482 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:40:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:48.484 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:40:48.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:48.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:48.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:48.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:48.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:48.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:48.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:48.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:48.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:48.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:48.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:48.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:48.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:48.519 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:40:48.519 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:48.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:48.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:48.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:48.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:48.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:48.520 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:40:53.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:53.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:53.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:53.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:53.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:53.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:53.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:53.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:53.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:53.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:53.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:40:53.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:40:53.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:40:53.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:53.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:53.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:53.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:40:53.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:53.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:40:53.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:53.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:40:53.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:40:53.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:53.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:53.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:53.540 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:40:53.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:53.540 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:40:53.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:53.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:53.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:40:53.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:53.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:40:53.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:40:53.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:40:53.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:40:53.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:40:53.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:40:53.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:40:53.547 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:40:53.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:53.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:53.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:40:54.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:40:54.076 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:40:54.078 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:40:54.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:54.080 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:40:54.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:54.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:54.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:54.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:54.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:54.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:54.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:54.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:54.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:54.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:54.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:54.210 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:40:59.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:40:59.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:40:59.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:59.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:59.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:59.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:59.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:40:59.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:59.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:59.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:40:59.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:40:59.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:40:59.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:40:59.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:59.229 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:59.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:40:59.229 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:40:59.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:40:59.230 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:40:59.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:40:59.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:40:59.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:40:59.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:59.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:59.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:40:59.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:40:59.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:40:59.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:40:59.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:40:59.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:40:59.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:40:59.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:59.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:40:59.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:40:59.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:40:59.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:40:59.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:40:59.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:40:59.244 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:40:59.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:40:59.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:40:59.246 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:40:59.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:40:59.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:40:59.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:40:59.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:40:59.774 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:40:59.776 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:40:59.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:59.778 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:40:59.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:40:59.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:40:59.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:40:59.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:59.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:59.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:59.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:40:59.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:40:59.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:40:59.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:40:59.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:40:59.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:59.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:40:59.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:00.196 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:41:00.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:41:00.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:41:00.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:41:00.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:41:00.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:41:01.125 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:41:01.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:41:01.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:41:01.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:41:01.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:41:01.590 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:41:02.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:41:02.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:41:02.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:41:02.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:41:02.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:41:02.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:41:02.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:41:03.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:41:03.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:41:03.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:41:03.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:41:03.453 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:41:03.923 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:41:03.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:03.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:03.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:03.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:03.937 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=1025 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:41:03.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:03.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:03.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:03.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:03.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:03.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:03.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:03.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:03.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:03.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:03.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:03.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:04.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:04.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:41:04.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:41:04.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:41:04.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:41:04.396 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:41:04.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:41:05.345 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:41:05.820 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:41:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:41:06.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:41:07.243 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:41:07.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:41:08.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:08.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:08.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:08.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:08.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:08.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:08.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:08.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:08.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:08.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:08.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:08.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:08.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:08.191 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:41:08.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:08.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:08.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:08.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:08.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:08.659 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:41:09.125 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:41:09.595 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:41:10.063 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:41:10.528 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:41:10.992 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:41:11.462 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:41:11.933 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:41:12.402 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:41:12.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:12.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:12.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:12.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:12.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:12.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:12.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:12.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:12.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:12.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:12.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:12.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:12.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:12.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:12.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:12.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:12.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:12.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:12.874 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:41:13.348 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:41:13.820 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:41:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:41:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:41:15.243 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:41:15.717 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:41:16.191 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:41:16.665 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:41:16.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:16.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:16.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:16.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:16.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:16.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:16.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:16.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:16.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:16.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:16.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:16.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:16.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:16.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:16.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:16.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:16.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:17.139 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:41:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:41:18.070 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:41:18.535 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:41:19.002 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:41:19.469 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:41:19.934 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:41:20.400 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:41:20.866 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:41:21.332 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:41:21.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:21.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:21.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:21.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:21.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:21.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:21.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:21.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:21.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:21.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:21.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:21.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:21.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:21.525 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:41:21.525 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:41:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:21.798 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:41:22.264 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:41:22.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:22.729 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:41:23.195 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:41:23.663 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:41:24.136 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:41:24.611 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:41:25.085 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:41:25.560 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:41:26.033 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:41:26.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:26.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:26.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:26.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:26.292 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:41:26.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:26.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:26.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:26.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:26.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:26.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:26.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:26.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:26.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:26.368 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:41:26.369 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:41:26.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:26.506 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:41:26.972 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:41:27.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:27.440 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:41:27.905 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:41:28.376 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:41:28.851 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:41:29.325 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:41:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:41:30.262 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:41:30.730 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:41:31.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:31.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:31.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:31.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:31.150 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:41:31.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:31.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:31.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:31.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:31.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:31.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:31.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:31.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:31.198 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:41:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:41:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:31.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:31.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:31.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:31.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:31.663 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:41:31.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:32.128 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:41:32.594 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:41:33.060 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:41:33.526 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:41:33.995 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:41:34.466 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:41:34.939 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:41:35.406 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:41:35.878 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:41:35.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:35.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:35.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:35.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:36.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:36.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:36.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:36.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:36.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:36.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:36.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:36.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:36.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:36.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:36.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:36.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:36.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:36.349 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:41:36.819 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:41:36.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:37.293 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:41:37.767 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:41:38.242 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:41:38.717 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:41:39.191 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:41:39.658 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:41:40.123 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:41:40.589 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:41:40.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:40.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:40.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:40.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:40.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:40.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:40.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:40.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:40.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:40.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:40.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:40.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:40.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:41:40.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:40.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:40.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:40.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:40.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:41.062 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:41:41.535 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:41:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:42.008 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:41:42.479 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:41:42.948 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:41:43.417 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:41:43.888 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:41:44.363 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:41:44.837 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:41:45.311 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:41:45.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:45.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:45.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:45.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:45.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:45.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:45.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:45.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:45.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:45.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:45.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:45.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:45.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:45.648 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:41:45.648 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:41:45.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:45.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:45.781 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:41:46.256 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:41:46.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:46.728 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:41:47.193 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:41:47.665 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:41:48.140 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:41:48.614 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:41:49.082 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:41:49.549 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:41:50.024 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:41:50.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:50.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:50.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:50.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:50.396 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:41:50.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:50.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:50.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:50.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:50.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:50.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:50.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:50.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:50.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:50.447 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:41:50.447 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:41:50.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:50.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:50.497 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:41:50.972 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:41:51.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:51.446 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:41:51.921 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:41:52.395 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:41:52.870 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:41:53.344 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:41:53.819 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:41:54.294 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:41:54.768 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:41:55.242 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:41:55.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:55.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:55.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:55.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:55.263 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:41:55.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:55.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:55.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:55.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:55.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:55.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:55.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:55.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:55.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:55.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:41:55.341 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:41:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:55.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:55.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:55.715 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:41:56.190 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:41:56.657 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:41:57.130 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:41:57.603 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:41:58.078 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:41:58.553 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:41:59.027 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 02:41:59.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:59.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:59.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:59.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:59.401 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:41:59.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:41:59.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:41:59.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:41:59.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:59.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:41:59.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:41:59.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:41:59.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:41:59.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:59.448 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:41:59.448 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:41:59.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:59.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:41:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 02:41:59.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:41:59.972 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 02:42:00.446 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 02:42:00.921 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 02:42:01.395 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 02:42:01.870 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 02:42:02.345 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 02:42:02.819 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 02:42:03.294 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 02:42:03.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:03.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:03.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:03.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:03.673 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:03.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:03.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:03.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:03.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:03.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:03.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:03.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:03.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:03.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:03.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:03.722 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:03.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:03.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:03.768 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 02:42:03.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:04.242 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 02:42:04.712 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 02:42:05.187 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 02:42:05.656 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 02:42:06.128 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 02:42:06.599 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 02:42:07.064 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 02:42:07.529 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 02:42:07.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:07.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:07.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:07.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:07.966 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:07.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:07.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:07.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:07.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:07.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:07.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:07.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:07.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:07.994 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 02:42:07.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:08.004 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:08.004 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:08.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:08.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:08.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:08.466 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 02:42:08.931 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 02:42:09.398 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 02:42:09.863 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 02:42:10.328 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 02:42:10.793 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 02:42:11.257 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 02:42:11.722 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 02:42:12.186 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 02:42:12.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:12.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:12.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:12.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:12.210 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:12.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:12.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:12.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:12.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:12.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:12.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:12.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:12.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:12.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:12.229 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:12.229 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:12.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:12.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:12.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:12.658 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 02:42:13.126 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 02:42:13.591 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 02:42:14.062 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 02:42:14.534 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 02:42:15.000 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 02:42:15.475 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 02:42:15.948 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 02:42:16.413 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 02:42:16.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:16.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:16.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:16.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:16.581 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:16.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:16.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:16.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:16.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:16.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:16.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:16.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:16.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:16.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:16.656 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:16.656 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:16.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:16.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:16.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:16.884 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 02:42:17.350 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 02:42:17.814 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 02:42:18.281 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 02:42:18.752 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 02:42:19.221 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 02:42:19.687 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 02:42:20.152 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 02:42:20.616 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 02:42:20.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:20.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:20.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:20.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:20.826 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:20.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:20.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:20.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:20.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:20.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:20.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:20.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:20.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:20.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:20.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:20.848 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:20.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:20.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:21.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:21.085 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 02:42:21.558 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 02:42:22.032 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 02:42:22.506 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 02:42:22.970 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 02:42:23.435 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 02:42:23.900 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 02:42:24.365 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 02:42:24.829 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 02:42:25.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:25.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:25.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:25.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:25.047 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:25.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:25.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:25.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:25.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:25.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:25.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:25.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:25.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:25.112 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:25.112 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:25.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:25.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:25.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:25.297 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 02:42:25.767 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 02:42:26.241 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 02:42:26.712 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 02:42:27.186 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 02:42:27.655 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 02:42:28.126 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 02:42:28.599 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 02:42:29.070 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 02:42:29.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:29.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:29.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:29.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:29.279 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:29.280 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=19530 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:42:29.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:29.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:29.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:29.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:42:29.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:42:29.294 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:42:34.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:42:34.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:42:34.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:34.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:34.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:34.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:34.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:34.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:42:34.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:34.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:42:34.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:42:34.304 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:42:34.305 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:42:34.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:42:34.305 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:34.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:34.305 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:42:34.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:42:34.305 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:42:34.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:34.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:42:34.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:42:34.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:42:34.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:34.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:34.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:42:34.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:42:34.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:42:34.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:34.309 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:42:34.309 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:42:34.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:42:34.309 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:34.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:34.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:42:34.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:42:34.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:42:34.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:34.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:42:34.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:42:34.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:42:34.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:42:34.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:42:34.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:42:34.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:42:34.313 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:42:34.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:42:34.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:42:34.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:42:34.314 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:34.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:42:39.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:42:39.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:39.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:39.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:39.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:39.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:39.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:42:39.332 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:39.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:42:39.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:42:39.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:42:39.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:42:39.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:42:39.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:39.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:39.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:42:39.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:42:39.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:42:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:39.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:42:39.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:42:39.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:42:39.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:39.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:39.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:42:39.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:42:39.342 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:42:39.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:39.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:42:39.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:42:39.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:42:39.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:39.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:39.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:42:39.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:42:39.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:42:39.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:39.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:42:39.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:42:39.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:42:39.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:42:39.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:42:39.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:42:39.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:42:39.349 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:39.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:39.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:42:39.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:42:39.870 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:42:39.871 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:42:39.872 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:42:39.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:39.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:39.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:39.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:39.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:39.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:39.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:39.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:39.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:39.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:39.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:39.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:39.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:39.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:40.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:40.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:40.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:40.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:40.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:40.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:40.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:40.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:40.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:40.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:40.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:40.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:40.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:42:40.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:40.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:40.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:40.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:40.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:40.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:40.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:40.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:40.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:40.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:40.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:40.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:40.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:40.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:40.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:40.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:40.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:40.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:40.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:40.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:40.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:40.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:40.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:40.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:40.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:40.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:40.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:40.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:42:40.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:40.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:40.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:40.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:40.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:41.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:41.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:41.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:41.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:41.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:41.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:41.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:41.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:41.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:41.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:42:41.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:41.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:41.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:41.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:41.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:41.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:41.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:41.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:42:41.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:41.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:41.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:41.789 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=520 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:42:41.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:41.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:41.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:41.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:41.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:41.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:41.849 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:41.849 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:42:41.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:41.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:42:42.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:42.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:42.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:42.329 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:42.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:42.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:42.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:42.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:42.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:42.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:42.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:42.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:42.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:42.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:42.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:42.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:42.357 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:42:42.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.692 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:42:42.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:42.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:42.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:42.866 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:42.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:42.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:42.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:42.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:42.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:42.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:42.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:42.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:42.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:42.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:42.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:42.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:42.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.162 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:42:43.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:43.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:43.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:43.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:43.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:43.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:43.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:43.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:43.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:43.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:43.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:43.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:43.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:43.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:43.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:43.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:43.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:43.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.636 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:42:43.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:43.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:43.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:43.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:43.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:43.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:43.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:43.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:43.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:43.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:43.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:44.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:44.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:44.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:44.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:44.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:44.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:44.112 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:42:44.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:44.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:44.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:44.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:44.590 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:42:44.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:44.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:44.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:44.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:44.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:44.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:44.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:44.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:44.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:44.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:44.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:44.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:44.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:44.939 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:44.939 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:42:44.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:44.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:42:45.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:45.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:45.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:45.354 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:45.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:45.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:45.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:45.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:45.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:45.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:45.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:45.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:45.427 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:45.427 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:42:45.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.548 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:42:45.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:45.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:45.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:45.901 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:45.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:45.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:45.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:45.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:45.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:45.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:45.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:45.977 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:45.977 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:45.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:45.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.026 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:42:46.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:46.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:46.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:46.186 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:46.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:46.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:46.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:46.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:46.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:46.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:46.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:46.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:46.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:46.269 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:46.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.503 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:42:46.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:46.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:46.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:46.682 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:46.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:46.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:46.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:46.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:46.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:46.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:46.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:46.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:46.741 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:46.741 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:46.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:46.976 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:42:47.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:47.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:47.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:47.171 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:47.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:47.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:47.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:47.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:47.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:47.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:47.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:47.231 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:47.231 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:47.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.449 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:42:47.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:47.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:47.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:47.665 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:47.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:47.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:47.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:47.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:47.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:47.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:47.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:47.723 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:47.723 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:47.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:47.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:47.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:47.844 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:47.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:47.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:47.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:47.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:47.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:47.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:47.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:47.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:47.903 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:47.903 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:47.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:47.928 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:42:48.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:48.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:48.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:48.342 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:48.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:48.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:48.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:48.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:48.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:48.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:48.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:48.406 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:42:48.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:48.416 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:48.416 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:48.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:48.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:48.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:48.839 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:48.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:48.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:48.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:48.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:48.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:48.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:48.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:48.884 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:42:48.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:48.908 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:42:48.908 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:42:48.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:48.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:49.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:49.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:49.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:49.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:49.342 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:42:49.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:49.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:49.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:49.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:49.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:49.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:49.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:42:49.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:42:49.349 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:42:49.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:49.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:54.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:42:54.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:42:54.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:54.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:54.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:54.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:54.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:42:54.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:42:54.359 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:54.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:42:54.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:42:54.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:42:54.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:42:54.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:42:54.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:54.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:42:54.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:42:54.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:42:54.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:42:54.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:42:54.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:42:54.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:42:54.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:42:54.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:42:54.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:42:54.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:42:54.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:42:54.365 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:42:54.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:42:54.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:42:54.370 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:42:54.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:42:54.884 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:42:54.885 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:42:54.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:54.887 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:42:54.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:54.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:54.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:54.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:54.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:54.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:54.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:54.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:54.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:54.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:54.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:54.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:54.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:55.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:42:55.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:55.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:55.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:55.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:55.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:55.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:55.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:42:56.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:56.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:56.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:56.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:56.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:56.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:56.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:56.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:56.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:56.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:56.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:56.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:56.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:56.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:56.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:56.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:56.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:56.288 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:42:56.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:56.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:56.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:56.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:56.766 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:42:56.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:56.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:57.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:42:57.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:57.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:57.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:57.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:57.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:57.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:57.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:57.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:57.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:57.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:57.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:57.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:57.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:57.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:57.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:57.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:57.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:57.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:57.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:57.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:57.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:57.724 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:42:58.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:58.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:58.202 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:42:58.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:58.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:58.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:58.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:58.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:58.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:58.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:58.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:58.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:42:58.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:42:58.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:42:58.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:58.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:58.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:58.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:42:58.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:42:58.680 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:42:58.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:58.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:42:58.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:42:58.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:58.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:42:59.159 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:42:59.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:42:59.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:42:59.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:42:59.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:42:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:59.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:42:59.637 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:43:00.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:00.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:00.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:00.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:00.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:00.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:00.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:00.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:00.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:00.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:00.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:00.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:00.112 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:43:00.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:00.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:00.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:00.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:00.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:00.586 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:43:01.063 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:43:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:01.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:01.542 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:43:01.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:01.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:01.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:01.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:01.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:01.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:01.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:01.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:01.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:01.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:01.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:01.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:01.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:01.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:01.743 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:43:01.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:01.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:02.018 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:43:02.496 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:43:02.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:02.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:02.974 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:43:03.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:03.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:03.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:03.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:03.194 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:03.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:03.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:03.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:03.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:03.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:03.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:03.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:03.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:03.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:03.267 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:03.267 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:43:03.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:03.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:03.451 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:43:03.930 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:43:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:04.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:04.409 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:43:04.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:04.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:04.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:04.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:04.717 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:04.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:04.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:04.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:04.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:04.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:04.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:04.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:04.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:04.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:04.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:04.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:04.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:04.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:04.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:04.886 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:43:05.362 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:43:05.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:05.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:05.841 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:43:06.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:06.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:06.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:06.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:06.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:06.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:06.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:06.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:06.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:06.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:06.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:06.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:06.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:06.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:06.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:06.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:06.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:06.320 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:43:06.799 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:43:07.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:07.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:07.278 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:43:07.757 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:43:07.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:07.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:07.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:07.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:07.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:07.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:07.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:07.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:07.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:07.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:07.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:07.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:07.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:07.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:07.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:07.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:07.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:07.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:08.236 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:43:08.715 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:43:09.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:09.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:09.194 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:43:09.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:09.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:09.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:09.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:09.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:09.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:09.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:09.672 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:43:09.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:09.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:09.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:09.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:09.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:09.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:09.726 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:09.727 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:43:09.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:09.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:10.149 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:43:10.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:10.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:10.629 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:43:11.107 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:43:11.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:11.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:11.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:11.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:11.124 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:11.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:11.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:11.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:11.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:11.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:11.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:11.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:11.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:11.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:11.195 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:11.195 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:43:11.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:11.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:11.586 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:43:12.065 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:43:12.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:12.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:12.544 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:43:12.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:12.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:12.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:12.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:12.650 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:12.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:12.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:12.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:12.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:12.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:12.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:12.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:12.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:12.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:12.723 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:12.723 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:12.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:12.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:13.021 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:43:13.499 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:43:13.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:13.973 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:43:14.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:14.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:14.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:14.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:14.129 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:14.129 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=4218 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:14.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:14.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:14.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:14.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:14.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:14.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:14.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:14.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:14.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:14.191 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:14.192 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:14.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:14.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:14.451 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:43:14.930 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:43:15.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:15.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:15.408 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:43:15.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:15.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:15.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:15.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:15.588 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:15.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:15.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:15.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:15.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:15.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:15.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:15.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:15.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:15.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:15.653 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:15.653 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:15.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:15.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:15.886 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:43:16.365 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:43:16.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:16.844 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:43:17.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:17.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:17.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:17.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:17.040 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:17.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:17.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:17.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:17.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:17.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:17.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:17.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:17.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:17.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:17.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:17.100 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:17.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:17.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:17.322 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:43:17.801 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:43:18.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:18.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:18.279 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:43:18.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:18.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:18.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:18.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:18.494 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:18.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:18.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:18.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:18.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:18.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:18.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:18.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:18.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:18.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:18.568 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:18.568 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:18.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:18.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:18.758 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:43:19.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:19.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:19.237 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:43:19.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:19.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:19.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:19.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:19.631 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:19.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:19.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:19.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:19.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:19.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:19.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:19.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:19.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:19.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:19.715 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:19.715 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:19.715 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:43:19.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:19.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:20.194 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:43:20.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:20.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:20.673 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:43:21.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:21.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:21.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:21.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:21.086 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:21.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:21.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:21.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:21.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:21.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:21.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:21.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:21.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:21.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:21.151 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:43:21.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:21.156 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:21.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:21.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:21.624 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:43:22.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:22.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:22.100 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:43:22.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:22.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:22.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:22.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:22.533 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:22.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:22.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:22.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:22.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:22.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:22.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:22.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:22.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:22.578 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:43:22.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:22.591 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:22.591 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:43:22.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:22.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:23.057 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:43:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:23.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:23.536 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:43:23.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:23.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:23.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:23.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:23.988 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:24.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:24.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:24.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:24.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:24.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:43:24.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:43:24.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:43:24.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:43:24.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:43:24.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:43:24.008 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:43:24.009 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.009 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.009 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.009 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.009 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6325 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.011 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.011 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:24.011 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6326 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:43:29.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:43:29.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:43:29.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:43:29.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:43:29.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:43:29.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:43:29.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:43:29.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:43:29.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:43:29.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:43:29.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:43:29.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:43:29.016 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:43:29.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:43:29.016 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:43:29.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:43:29.016 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:43:29.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:43:29.016 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:43:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:29.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:43:29.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:43:29.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:43:29.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:43:29.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:43:29.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:43:29.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:43:29.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:43:29.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:29.020 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:43:29.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:43:29.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:43:29.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:43:29.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:43:29.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:43:29.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:43:29.021 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:43:29.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:43:29.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:43:29.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:43:29.024 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:43:29.024 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:29.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:43:29.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:43:29.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:43:29.547 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:43:29.549 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:43:29.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:29.552 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:43:29.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:29.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:29.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:29.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:29.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:29.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:29.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:29.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:29.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:29.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:29.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:29.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:29.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:29.979 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:43:30.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:30.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:30.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:30.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:30.450 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:43:30.924 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:43:31.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:31.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:31.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:31.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:31.396 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:43:31.868 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:43:32.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:32.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:32.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:32.340 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:43:32.813 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:43:33.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:33.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:33.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:33.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:33.285 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:43:33.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:33.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:33.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:33.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:33.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:33.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:33.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:33.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:33.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:33.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:33.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:33.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:33.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:33.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:33.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:33.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:33.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:33.757 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:43:34.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:43:34.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:43:34.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:43:34.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:43:34.228 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:43:34.702 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:43:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:43:35.646 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:43:36.117 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:43:36.591 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:43:37.063 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:43:37.535 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:43:37.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:37.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:37.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:37.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:37.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:37.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:37.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:37.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:37.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:37.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:37.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:37.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:37.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:37.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:37.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:37.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:37.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:38.006 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:43:38.477 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:43:38.950 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:43:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:43:39.895 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:43:40.366 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:43:40.839 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:43:41.312 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:43:41.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:41.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:41.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:41.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:41.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:41.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:41.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:41.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:41.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:41.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:41.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:41.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:41.783 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:43:41.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:41.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:41.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:41.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:41.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:42.255 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:43:42.728 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:43:43.201 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:43:43.673 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:43:44.144 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:43:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:43:45.090 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:43:45.562 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:43:46.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:46.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:46.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:46.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:46.033 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:43:46.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:46.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:46.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:46.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:46.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:46.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:46.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:46.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:46.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:46.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:46.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:46.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:46.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:46.504 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:43:46.977 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:43:47.450 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:43:47.922 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:43:48.393 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:43:48.864 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:43:49.337 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:43:49.810 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:43:50.281 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:43:50.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:50.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:50.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:50.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:50.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:50.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:50.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:50.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:50.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:50.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:50.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:50.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:50.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:50.754 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:43:50.761 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:50.761 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:43:50.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:50.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:51.227 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:43:51.699 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:43:52.173 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:43:52.646 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:43:53.119 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:43:53.593 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:43:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:43:54.539 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:43:55.012 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:43:55.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:55.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:55.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:55.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:55.092 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:55.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:55.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:55.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:55.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:55.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:55.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:55.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:55.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:55.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:55.159 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:43:55.159 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:43:55.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:55.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:55.484 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:43:55.957 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:43:56.431 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:43:56.905 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:43:57.377 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:43:57.850 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:43:58.323 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:43:58.795 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:43:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:43:59.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:59.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:59.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:59.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:59.488 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:43:59.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:43:59.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:43:59.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:43:59.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:59.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:59.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:59.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:43:59.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:43:59.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:43:59.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:43:59.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:43:59.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:43:59.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:59.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:43:59.741 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:44:00.213 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:44:00.684 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:44:01.155 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:44:01.628 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:44:02.101 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:44:02.573 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:44:03.044 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:44:03.515 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:44:03.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:03.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:03.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:03.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:03.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:03.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:03.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:03.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:03.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:03.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:03.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:03.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:03.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:03.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:03.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:03.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:03.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:03.988 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:44:04.460 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:44:04.933 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:44:05.404 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:44:05.874 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:44:06.345 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:44:06.816 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:44:07.290 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:44:07.762 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:44:08.234 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:44:08.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:08.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:08.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:08.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:08.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:08.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:08.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:08.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:08.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:08.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:08.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:08.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:08.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:44:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:08.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:08.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:08.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:08.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:08.707 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:44:09.180 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:44:09.653 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:44:10.123 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:44:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:44:11.070 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:44:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:44:12.016 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:44:12.489 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:44:12.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:12.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:12.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:12.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:12.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:12.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:12.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:12.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:12.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:12.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:12.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:12.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:12.611 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:12.611 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:44:12.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:12.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:12.961 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:44:13.434 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:44:13.907 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:44:14.380 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:44:14.852 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:44:15.324 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:44:15.797 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:44:16.270 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:44:16.742 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:44:16.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:16.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:16.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:16.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:16.888 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:16.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:16.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:16.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:16.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:16.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:16.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:16.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:16.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:16.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:16.960 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:16.960 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:44:16.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:16.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:17.215 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:44:17.689 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:44:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:44:18.636 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:44:19.108 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:44:19.582 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:44:20.055 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:44:20.527 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:44:20.999 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:44:21.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:21.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:21.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:21.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:21.285 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:21.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:21.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:21.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:21.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:21.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:21.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:21.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:21.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:21.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:21.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:21.357 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:21.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:21.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:21.472 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:44:21.944 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:44:22.417 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:44:22.890 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:44:23.362 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:44:23.834 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:44:24.307 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:44:24.779 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:44:25.252 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:44:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:25.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:25.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:25.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:25.409 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:25.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:25.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:25.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:25.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:25.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:25.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:25.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:25.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:25.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:25.494 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:25.494 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:25.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:25.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:25.725 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:44:26.197 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:44:26.670 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:44:27.142 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:44:27.614 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:44:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:44:28.560 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:44:29.032 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 02:44:29.506 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 02:44:29.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:29.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:29.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:29.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:29.688 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:29.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:29.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:29.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:29.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:29.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:29.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:29.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:29.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:29.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:29.777 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:29.777 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:29.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:29.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:29.976 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 02:44:30.448 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 02:44:30.921 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 02:44:31.394 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 02:44:31.867 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 02:44:32.339 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 02:44:32.812 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 02:44:33.284 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 02:44:33.757 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 02:44:33.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:33.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:33.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:33.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:33.953 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:33.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:33.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:33.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:33.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:33.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:33.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:33.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:33.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:34.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:34.019 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:34.019 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:34.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:34.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:34.230 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 02:44:34.703 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 02:44:35.175 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 02:44:35.647 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 02:44:36.116 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 02:44:36.589 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 02:44:37.062 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 02:44:37.533 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 02:44:38.006 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 02:44:38.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:38.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:38.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:38.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:38.219 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:38.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:38.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:38.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:38.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:38.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:38.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:38.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:38.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:38.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:38.295 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:38.295 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:38.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:38.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:38.479 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 02:44:38.951 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 02:44:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 02:44:39.894 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 02:44:40.368 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 02:44:40.840 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 02:44:41.312 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 02:44:41.785 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 02:44:42.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:42.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:42.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:42.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:42.177 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:42.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:42.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:42.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:42.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:42.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:42.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:42.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:42.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:42.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:42.249 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:42.249 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:42.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:42.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:42.258 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 02:44:42.730 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 02:44:43.203 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 02:44:43.676 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 02:44:44.148 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 02:44:44.621 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 02:44:45.094 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 02:44:45.566 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 02:44:46.040 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 02:44:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:46.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:46.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:46.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:46.450 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:46.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:46.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:46.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:46.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:46.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:46.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:46.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:46.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:46.512 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 02:44:46.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:46.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:46.524 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:46.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:46.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:46.984 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 02:44:47.457 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 02:44:47.930 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 02:44:48.402 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 02:44:48.876 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 02:44:49.348 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 02:44:49.820 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 02:44:50.293 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 02:44:50.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:50.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:50.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:50.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:50.721 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:50.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:50.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:50.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:44:50.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:50.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:44:50.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:44:50.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:44:50.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:44:50.765 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 02:44:50.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:50.787 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:44:50.787 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:44:50.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:50.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:51.238 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 02:44:51.711 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 02:44:52.184 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 02:44:52.656 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 02:44:53.127 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 02:44:53.601 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 02:44:54.073 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 02:44:54.544 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 02:44:55.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:44:55.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:44:55.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:44:55.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:44:55.005 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:44:55.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:44:55.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:44:55.016 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:44:55.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:44:55.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:45:00.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:45:00.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:45:00.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:45:00.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:45:00.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:45:00.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:45:00.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:45:00.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:45:00.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:00.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:45:00.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:45:00.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:45:00.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:45:00.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:45:00.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:00.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:45:00.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:45:00.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:45:00.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:45:00.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:00.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:45:00.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:45:00.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:45:00.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:00.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:45:00.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:45:00.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:45:00.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:45:00.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:45:00.043 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:45:00.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:45:00.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:45:00.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:45:00.046 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:45:00.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:45:00.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:45:00.047 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:45:05.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:45:05.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:45:05.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:45:05.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:45:05.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:45:05.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:45:05.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:45:05.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:05.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:45:05.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:45:05.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:45:05.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:45:05.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:45:05.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:45:05.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:45:05.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:45:05.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:45:05.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:05.075 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:45:05.075 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:45:05.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:45:05.076 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:05.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:45:05.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:45:05.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:45:05.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:45:05.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:05.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:45:05.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:45:05.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:45:05.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:45:05.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:45:05.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:45:05.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:45:05.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:45:05.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:05.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:45:05.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:45:05.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:45:05.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:45:05.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:45:05.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:45:05.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:45:05.085 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:45:05.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:05.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:45:05.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:45:05.568 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:45:05.618 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:45:05.620 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:45:05.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:05.622 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:45:05.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:05.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:05.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:05.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:05.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:05.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:05.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:05.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:05.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:05.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:05.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:05.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:05.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:45:06.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:06.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:06.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:06.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:06.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:45:06.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:45:07.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:07.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:07.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:07.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:07.457 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:45:07.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:45:08.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:08.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:08.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:08.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:08.401 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:45:08.874 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:45:09.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:09.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:09.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:45:09.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:09.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:09.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:09.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:09.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:09.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:09.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:09.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:09.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:09.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:09.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:09.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:09.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:09.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:09.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:09.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:09.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:09.818 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:45:10.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:45:10.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:45:10.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:45:10.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:45:10.290 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:45:10.761 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:45:11.234 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:45:11.706 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:45:12.179 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:45:12.652 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:45:13.125 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:45:13.597 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:45:13.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:13.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:13.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:13.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:13.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:13.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:13.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:13.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:13.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:13.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:13.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:13.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:14.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:14.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:14.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:14.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:14.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:14.070 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:45:14.543 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:45:15.015 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:45:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:45:15.957 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:45:16.430 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:45:16.903 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:45:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:45:17.846 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:45:18.319 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:45:18.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:18.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:18.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:18.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:18.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:18.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:18.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:18.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:18.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:18.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:18.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:18.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:18.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:18.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:18.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:18.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:18.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:45:19.263 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:45:19.734 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:45:20.205 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:45:20.679 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:45:21.151 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:45:21.624 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:45:22.097 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:45:22.569 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:45:22.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:22.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:22.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:22.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:22.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:22.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:22.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:22.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:22.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:22.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:22.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:22.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:22.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:22.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:22.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:22.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:22.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:23.042 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:45:23.513 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:45:23.986 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:45:24.459 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:45:24.931 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:45:25.405 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:45:25.878 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:45:26.350 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:45:26.821 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:45:27.295 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:45:27.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:27.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:27.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:27.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:27.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:27.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:27.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:27.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:27.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:27.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:27.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:27.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:27.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:27.413 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:45:27.413 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:45:27.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:27.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:27.767 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:45:28.240 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:45:28.713 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:45:29.186 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:45:29.659 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:45:30.132 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:45:30.604 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:45:31.076 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:45:31.550 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:45:32.023 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:45:32.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:32.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:32.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:32.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:32.229 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:45:32.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:32.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:32.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:32.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:32.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:32.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:32.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:32.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:32.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:32.300 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:45:32.301 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:45:32.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:32.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:32.495 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:45:32.968 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:45:33.440 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:45:33.913 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:45:34.386 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:45:34.858 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:45:35.331 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:45:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:45:36.276 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:45:36.749 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:45:37.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:37.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:37.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:37.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:37.106 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:45:37.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:37.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:37.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:37.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:37.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:37.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:37.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:37.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:37.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:37.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:37.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:37.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:37.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:37.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:37.222 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:45:37.695 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:45:38.166 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:45:38.636 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:45:39.110 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:45:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:45:40.055 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:45:40.528 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:45:41.001 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:45:41.473 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:45:41.944 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:45:41.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:41.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:41.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:41.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:42.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:42.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:42.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:42.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:42.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:42.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:42.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:42.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:42.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:42.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:42.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:42.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:42.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:42.418 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:45:42.889 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:45:43.361 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:45:43.832 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:45:44.306 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:45:44.778 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:45:45.251 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:45:45.724 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:45:46.197 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:45:46.669 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:45:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:46.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:46.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:46.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:46.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:46.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:46.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:46.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:46.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:46.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:46.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:46.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:46.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:45:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:46.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:46.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:47.140 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:45:47.614 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:45:48.087 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:45:48.559 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:45:49.030 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:45:49.503 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:45:49.976 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:45:50.449 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:45:50.922 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:45:51.395 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:45:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:51.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:51.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:51.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:51.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:51.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:51.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:51.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:51.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:51.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:51.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:51.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:51.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:51.683 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:45:51.683 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:45:51.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:51.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:51.866 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:45:52.340 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:45:52.813 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:45:53.287 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:45:53.760 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:45:54.234 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:45:54.706 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:45:55.180 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:45:55.653 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:45:56.125 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:45:56.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:56.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:56.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:56.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:56.443 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:45:56.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:45:56.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:45:56.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:45:56.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:56.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:45:56.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:45:56.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:45:56.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:45:56.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:45:56.515 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:45:56.515 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:45:56.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:56.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:45:56.598 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:45:57.072 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:45:57.545 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:45:58.019 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:45:58.492 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:45:58.965 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:45:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:45:59.911 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:46:00.386 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:46:00.859 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:46:01.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:01.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:01.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:01.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:01.327 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:01.332 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:46:01.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:01.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:01.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:01.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:01.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:01.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:01.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:01.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:01.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:01.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:01.401 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:01.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:01.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:01.804 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:46:02.276 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:46:02.749 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:46:03.219 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:46:03.693 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:46:04.164 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:46:04.637 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:46:05.110 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 02:46:05.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:05.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:05.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:05.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:05.434 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:05.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:05.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:05.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:05.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:05.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:05.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:05.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:05.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:05.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:05.503 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:05.503 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:05.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:05.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:05.582 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 02:46:06.054 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 02:46:06.527 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 02:46:07.000 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 02:46:07.471 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 02:46:07.945 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 02:46:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 02:46:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 02:46:09.362 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 02:46:09.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:09.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:09.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:09.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:09.705 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:09.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:09.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:09.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:09.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:09.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:09.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:09.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:09.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:09.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:09.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:09.779 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:09.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:09.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:09.834 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 02:46:10.307 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 02:46:10.780 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 02:46:11.253 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 02:46:11.726 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 02:46:12.198 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 02:46:12.670 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 02:46:13.144 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 02:46:13.616 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 02:46:13.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:13.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:13.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:13.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:13.978 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:13.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:13.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:13.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:13.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:13.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:13.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:13.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:13.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:14.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:14.048 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:14.048 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:14.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:14.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:14.088 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 02:46:14.561 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 02:46:15.034 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 02:46:15.506 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 02:46:15.978 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 02:46:16.451 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 02:46:16.923 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 02:46:17.397 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 02:46:17.869 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 02:46:18.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:18.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:18.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:18.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:18.250 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:18.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:18.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:18.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:18.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:18.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:18.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:18.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:18.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:18.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:18.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:18.315 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:18.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:18.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:18.341 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 02:46:18.813 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 02:46:19.286 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 02:46:19.758 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 02:46:20.230 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 02:46:20.703 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 02:46:21.176 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 02:46:21.648 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 02:46:22.120 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 02:46:22.593 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 02:46:22.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:22.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:22.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:22.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:22.678 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:22.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:22.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:22.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:22.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:22.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:22.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:22.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:22.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:22.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:22.747 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:22.747 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:22.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:22.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:23.066 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 02:46:23.539 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 02:46:24.012 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 02:46:24.484 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 02:46:24.955 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 02:46:25.428 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 02:46:25.901 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 02:46:26.373 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 02:46:26.844 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 02:46:26.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:26.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:26.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:26.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:26.949 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:26.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:26.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:26.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:26.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:26.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:26.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:26.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:26.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:27.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:27.020 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:27.020 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:27.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:27.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:27.317 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 02:46:27.789 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 02:46:28.261 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 02:46:28.733 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 02:46:29.206 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 02:46:29.678 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 02:46:30.150 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 02:46:30.621 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 02:46:31.095 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 02:46:31.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:31.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:31.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:31.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:31.221 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:31.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:31.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:31.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:31.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:31.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:31.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:31.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:31.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:31.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:31.287 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:46:31.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:31.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:31.567 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 02:46:32.039 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 02:46:32.510 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 02:46:32.982 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 02:46:33.455 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 02:46:33.927 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 02:46:34.401 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 02:46:34.873 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 02:46:35.345 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 02:46:35.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:35.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:35.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:35.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:35.488 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:35.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:35.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:35.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:35.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:35.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:46:35.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:46:35.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:46:35.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:46:35.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:46:35.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:46:35.502 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:46:35.502 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:35.502 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:35.502 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:35.502 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:35.502 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:35.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:35.503 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=19518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:46:40.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:46:40.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:46:40.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:46:40.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:46:40.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:46:40.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:46:40.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:46:40.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:46:40.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:40.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:46:40.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:46:40.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:46:40.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:46:40.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:46:40.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:40.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:46:40.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:46:40.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:46:40.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:46:40.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:40.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:46:40.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:46:40.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:46:40.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:40.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:46:40.531 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:46:40.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:46:40.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:46:40.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:40.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:46:40.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:46:40.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:46:40.534 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:40.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:46:40.534 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:46:40.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:46:40.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:46:40.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:40.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:40.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:40.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:46:40.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:46:40.539 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:46:40.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:46:40.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:40.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:40.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:46:40.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:46:40.540 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:40.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:46:45.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:46:45.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:46:45.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:46:45.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:46:45.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:46:45.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:46:45.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:46:45.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:45.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:46:45.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:46:45.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:46:45.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:46:45.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:46:45.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:45.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:46:45.572 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:46:45.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:46:45.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:46:45.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:45.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:46:45.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:46:45.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:46:45.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:45.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:46:45.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:46:45.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:46:45.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:46:45.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:45.578 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:46:45.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:46:45.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:46:45.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:46:45.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:46:45.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:46:45.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:46:45.579 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:46:45.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:45.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:46:45.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:46:45.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:46:45.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:46:45.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:46:45.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:46:45.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:46:45.582 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:46:45.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:45.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:46:46.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:46:46.096 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:46:46.097 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:46:46.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:46.097 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:46:46.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:46.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:46.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:46.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:46.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:46.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:46.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:46.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:46.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:46.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:46.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:46.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:46.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:46.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:46:46.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:46.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:46.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:46.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:47.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:46:47.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:47.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:47.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:47.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:47.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:47.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:47.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:47.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:47.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:47.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:47.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:47.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:47.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:47.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:47.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:47.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:47.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:47.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:46:47.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:47.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:47.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:47.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:46:48.423 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:46:48.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:48.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:48.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:48.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:48.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:48.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:48.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:48.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:48.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:48.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:48.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:48.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:48.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:48.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:48.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:48.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:48.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:48.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:48.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:48.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:48.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:48.896 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:46:49.368 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:46:49.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:49.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:49.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:49.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:49.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:49.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:49.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:49.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:49.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:49.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:49.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:49.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:49.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:49.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:49.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:49.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:49.841 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:46:49.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:49.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:49.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:49.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:49.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:50.314 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:46:50.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:46:50.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:46:50.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:46:50.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:46:50.786 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:46:51.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:51.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:51.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:51.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:51.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:51.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:51.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:51.257 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:46:51.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:51.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:51.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:51.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:51.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:51.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:51.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:51.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:51.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:51.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:51.728 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:46:52.201 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:46:52.674 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:46:52.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:52.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:52.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:52.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:52.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:52.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:52.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:52.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:52.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:52.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:52.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:52.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:52.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:52.875 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:52.875 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:46:52.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:52.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:46:53.619 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:46:53.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:53.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:53.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:53.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:53.825 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:53.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:53.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:53.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:53.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:53.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:53.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:53.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:53.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:53.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:53.896 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:53.896 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:46:53.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:53.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:54.092 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:46:54.565 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:46:54.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:54.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:54.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:54.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:54.851 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:54.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:54.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:54.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:54.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:54.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:54.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:54.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:54.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:54.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:54.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:54.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:54.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:54.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:54.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:55.038 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:46:55.510 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:46:55.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:55.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:55.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:55.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:55.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:55.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:55.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:55.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:55.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:55.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:55.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:55.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:55.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:55.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:55.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:55.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:55.982 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:46:56.453 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:46:56.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:56.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:56.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:56.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:56.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:56.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:56.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:56.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:56.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:56.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:56.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:56.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:56.924 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:46:56.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:46:56.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:56.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:56.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:56.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:56.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:57.395 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:46:57.868 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:46:58.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:58.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:58.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:58.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:58.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:58.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:58.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:58.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:58.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:58.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:58.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:58.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:58.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:58.341 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:46:58.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:58.347 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:46:58.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:58.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:58.814 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:46:59.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:59.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:59.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:59.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:59.244 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:46:59.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:46:59.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:46:59.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:46:59.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:59.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:46:59.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:46:59.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:46:59.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:46:59.287 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:46:59.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:46:59.316 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:46:59.316 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:46:59.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:59.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:46:59.760 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:47:00.233 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:47:00.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:00.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:00.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:00.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:00.269 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:00.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:00.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:00.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:00.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:00.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:00.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:00.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:00.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:00.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:00.339 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:00.339 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:00.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:00.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:00.705 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:47:01.178 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:47:01.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:01.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:01.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:01.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:01.336 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:01.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:01.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:01.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:01.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:01.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:01.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:01.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:01.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:01.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:01.399 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:01.399 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:01.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:01.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:01.648 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:47:02.122 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:47:02.595 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:47:02.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:02.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:02.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:02.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:02.773 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:02.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:02.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:02.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:02.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:02.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:02.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:02.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:02.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:02.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:02.845 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:02.845 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:02.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:02.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:03.067 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:47:03.541 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:47:04.013 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:47:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:04.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:04.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:04.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:04.209 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:04.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:04.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:04.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:04.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:04.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:04.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:04.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:04.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:04.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:04.271 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:04.271 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:04.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:04.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:04.486 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:47:04.959 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:47:05.431 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:47:05.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:05.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:05.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:05.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:05.645 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:05.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:05.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:05.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:05.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:05.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:05.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:05.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:05.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:05.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:05.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:05.722 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:05.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:05.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:05.902 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:47:06.375 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:47:06.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:06.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:06.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:06.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:06.766 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:06.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:06.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:06.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:06.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:06.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:06.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:06.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:06.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:06.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:06.831 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:06.831 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:06.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:06.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:06.847 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:47:07.319 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:47:07.792 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:47:08.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:08.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:08.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:08.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:08.202 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:08.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:08.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:08.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:08.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:08.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:08.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:08.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:08.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:08.265 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:47:08.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:08.275 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:08.276 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:08.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:08.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:08.737 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:47:09.208 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:47:09.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:09.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:09.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:09.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:09.638 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:09.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:09.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:09.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:09.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:09.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:09.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:09.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:09.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:09.679 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:47:09.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:09.704 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:09.704 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:09.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:09.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:10.152 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:47:10.624 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:47:11.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:11.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:11.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:11.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:11.075 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:11.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:11.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:11.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:11.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:11.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:47:11.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:47:11.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:47:11.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:47:11.089 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:47:11.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:47:11.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:11.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5508 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:16.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:47:16.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:47:16.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:47:16.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:47:16.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:47:16.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:47:16.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:47:16.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:47:16.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:16.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:47:16.102 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:47:16.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:47:16.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:47:16.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:47:16.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:16.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:47:16.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:47:16.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:47:16.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:47:16.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:16.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:47:16.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:47:16.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:47:16.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:16.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:47:16.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:47:16.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:47:16.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:47:16.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:16.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:47:16.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:47:16.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:47:16.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:16.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:47:16.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:47:16.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:47:16.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:47:16.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:47:16.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:47:16.116 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:47:16.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:16.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:16.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:16.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:47:16.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:47:16.649 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:47:16.652 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:47:16.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:16.654 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:47:16.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:16.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:16.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:16.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:16.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:16.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:16.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:16.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:16.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:16.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:16.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:16.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:16.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:17.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:47:17.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:17.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:17.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:17.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:17.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:47:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:47:18.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:18.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:18.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:18.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:18.489 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:47:18.961 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:47:19.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:19.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:19.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:47:19.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:19.907 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:47:20.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:20.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:47:20.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:20.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:20.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:20.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:20.454 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:20.454 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=936 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:20.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:20.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:20.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:20.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:20.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:20.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:20.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:20.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:20.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:20.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:20.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:20.853 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:47:21.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:21.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:21.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:21.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:21.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:47:21.798 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:47:22.269 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:47:22.742 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:47:23.215 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:47:23.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:23.687 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:47:24.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:47:24.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:24.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:24.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:24.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:24.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:24.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:24.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:24.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:24.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:24.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:24.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:24.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:24.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:24.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:24.373 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:47:24.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:24.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:24.633 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:47:25.106 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:47:25.579 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:47:26.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:47:26.524 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:47:26.997 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:47:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:27.470 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:47:27.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:27.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:27.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:27.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:27.926 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:27.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:27.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:27.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:27.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:27.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:27.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:27.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:27.942 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:47:27.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:27.943 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:47:27.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:27.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:28.415 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:47:28.888 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:47:29.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:47:29.835 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:47:30.306 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:47:30.780 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:47:30.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:31.253 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:47:31.726 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:47:31.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:31.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:31.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:31.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:31.784 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:31.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:31.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:31.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:31.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:31.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:31.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:31.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:31.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:31.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:31.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:31.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:31.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:31.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:32.199 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:47:32.671 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:47:33.143 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:47:33.614 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:47:34.088 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:47:34.560 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:47:35.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:35.032 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:47:35.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:35.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:35.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:35.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:35.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:35.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:35.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:35.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:35.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:35.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:35.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:35.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:35.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:35.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:35.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:35.506 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:47:35.978 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:47:36.450 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:47:36.921 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:47:37.392 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:47:37.865 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:47:38.338 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:47:38.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:38.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:38.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:38.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:38.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:38.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:38.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:38.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:38.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:38.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:38.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:38.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:38.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:38.809 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:47:38.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:38.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:38.848 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:38.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:38.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:47:39.754 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:47:40.227 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:47:40.699 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:47:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:47:41.645 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:47:42.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:42.117 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:47:42.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:42.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:42.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:42.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:42.511 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:42.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:42.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:42.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:42.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:42.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:42.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:42.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:42.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:47:42.538 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:47:42.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:42.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:42.588 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:47:43.062 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:47:43.534 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:47:44.006 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:47:44.479 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:47:44.952 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:47:45.424 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:47:45.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:45.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:45.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:45.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:45.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:45.818 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:47:45.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:45.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:45.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:45.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:45.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:47:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:47:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:47:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:47:45.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:47:45.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:47:45.831 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:47:45.831 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:45.831 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:50.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:47:50.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:47:50.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:47:50.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:47:50.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:47:50.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:47:50.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:47:50.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:47:50.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:50.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:47:50.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:47:50.844 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:47:50.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:47:50.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:47:50.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:50.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:47:50.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:47:50.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:47:50.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:47:50.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:50.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:47:50.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:47:50.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:47:50.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:50.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:47:50.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:47:50.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:47:50.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:47:50.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:47:50.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:47:50.847 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:47:50.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.849 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:47:50.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:47:50.849 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:47:50.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:47:50.854 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:47:51.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:47:51.372 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:47:51.374 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:47:51.377 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:47:51.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:51.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:51.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:51.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:51.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:51.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:51.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:51.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:51.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:51.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:51.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:51.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:51.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:51.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:51.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:47:51.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:51.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:51.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:51.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:52.276 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:47:52.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:47:52.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:52.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:52.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:52.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:53.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:47:53.694 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:47:53.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:53.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:53.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:53.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:54.165 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:47:54.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:47:54.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:55.111 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:47:55.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:55.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:55.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:55.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:55.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:55.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:55.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:55.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:55.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:55.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:55.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:55.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:55.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:55.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:55.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:55.584 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:47:55.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:47:55.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:47:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:47:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:47:56.057 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:47:56.530 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:47:57.002 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:47:57.473 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:47:57.947 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:47:58.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:58.419 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:47:58.892 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:47:59.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:47:59.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:59.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:47:59.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:47:59.040 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:59.040 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=1768 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:59.040 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=1768 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:47:59.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:47:59.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:59.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:59.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:59.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:47:59.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:47:59.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:47:59.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:47:59.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:47:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:47:59.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:47:59.836 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:48:00.309 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:48:00.781 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:48:01.252 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:48:01.726 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:48:02.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:02.198 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:48:02.671 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:48:02.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:02.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:02.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:02.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:02.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:02.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:02.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:02.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:02.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:02.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:02.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:02.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:02.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:02.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:02.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:03.144 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:48:03.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:03.617 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:48:03.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:03.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:03.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:03.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:03.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:03.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:03.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:03.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:03.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:03.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:03.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:03.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:03.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:03.926 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:03.926 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:48:03.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:03.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:04.089 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:48:04.563 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:48:05.035 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:48:05.507 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:48:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:48:06.453 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:48:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:48:06.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:07.398 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:48:07.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:07.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:07.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:07.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:07.471 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:07.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:07.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:07.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:07.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:07.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:07.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:07.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:07.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:07.489 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:48:07.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:07.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:07.871 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:48:08.344 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:48:08.818 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:48:09.291 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:48:09.764 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:48:10.236 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:48:10.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:10.709 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:48:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:48:11.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:11.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:11.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:11.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:11.333 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:11.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:11.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:11.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:11.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:11.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:11.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:11.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:11.371 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:11.371 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:48:11.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:11.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:11.655 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:48:12.130 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:48:12.603 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:48:13.077 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:48:13.550 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:48:14.021 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:48:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:14.495 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:48:14.967 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:48:15.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:15.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:15.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:15.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:15.189 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:15.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:15.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:15.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:15.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:15.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:15.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:15.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:15.202 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:15.202 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:48:15.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:15.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:15.440 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:48:15.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:15.913 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:48:16.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:16.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:16.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:16.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:16.155 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:16.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:16.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:16.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:16.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:16.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:16.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:16.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:16.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:16.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:16.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:16.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:16.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:16.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:16.385 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:48:16.856 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:48:17.329 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:48:17.802 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:48:18.274 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:48:18.745 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:48:19.218 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:48:19.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:19.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:19.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:19.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:19.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:19.655 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=6217 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:19.655 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=6217 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:19.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:19.655 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=6217 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:19.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:19.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:19.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:19.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:19.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:19.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:19.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:19.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:19.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:19.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:19.691 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:48:20.163 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:48:20.634 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:48:21.107 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:48:21.580 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:48:22.052 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:48:22.523 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:48:22.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:22.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:22.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:22.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:22.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:22.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:22.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:22.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:22.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:22.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:22.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:22.993 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:48:22.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:22.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:22.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:22.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:23.464 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:48:23.938 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:48:24.410 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:48:24.882 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:48:25.353 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:48:25.826 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:48:26.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:26.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:26.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:26.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:26.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:26.262 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=7645 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:26.263 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=7645 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:26.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:26.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:26.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:26.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:26.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:26.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:26.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:26.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:26.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:26.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:26.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:26.299 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:48:26.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:26.771 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:48:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:27.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:27.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:27.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:27.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:27.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:27.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:27.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:27.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:27.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:27.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:27.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:27.242 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:48:27.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:27.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:27.269 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:48:27.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:27.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:27.715 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:48:28.187 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:48:28.659 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:48:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:48:29.605 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:48:30.078 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:48:30.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:30.551 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:48:30.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:30.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:30.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:30.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:30.941 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:30.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:30.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:30.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:30.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:30.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:30.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:30.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:30.969 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:30.969 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:48:30.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:30.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:31.023 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:48:31.496 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:48:31.969 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:48:32.441 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:48:32.914 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:48:33.387 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:48:33.859 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:48:34.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:34.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:34.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:34.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:34.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:34.254 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:34.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:34.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:34.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:34.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:34.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:34.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:34.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:34.281 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:34.281 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:48:34.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:34.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:34.331 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:48:34.803 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:48:35.276 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:48:35.749 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:48:36.222 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:48:36.694 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:48:37.167 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:48:37.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:37.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:37.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:37.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:37.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:37.561 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:37.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:37.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:37.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:37.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:37.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:37.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:37.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:48:37.588 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:48:37.588 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:48:37.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:37.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:37.640 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:48:38.112 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:48:38.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:38.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:38.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:38.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:38.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:38.508 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:48:38.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:38.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:38.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:38.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:38.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:48:38.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:48:38.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:48:38.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:48:38.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:48:38.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:48:38.523 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:48:38.523 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:38.523 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:38.523 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:38.523 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:38.523 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:38.523 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:48:43.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:48:43.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:48:43.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:48:43.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:48:43.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:48:43.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:48:43.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:48:43.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:48:43.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:43.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:48:43.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:48:43.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:48:43.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:48:43.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:48:43.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:43.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:48:43.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:48:43.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:48:43.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:48:43.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:43.548 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:48:43.548 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:48:43.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:48:43.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:43.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:48:43.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:48:43.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:48:43.549 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:48:43.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:48:43.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:48:43.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:48:43.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.556 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:48:43.556 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:48:43.556 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:48:43.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:43.561 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:48:44.038 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:48:44.088 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:48:44.091 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:48:44.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:44.093 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:48:44.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:44.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:44.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:44.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:44.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:44.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:44.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:44.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:44.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:48:44.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:44.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:44.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:44.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:44.981 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:48:45.452 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:48:45.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:45.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:45.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:45.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:45.925 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:48:46.397 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:48:46.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:46.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:46.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:46.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:46.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:48:47.337 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:48:47.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:47.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:47.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:47.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:48:48.276 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:48:48.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:48.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:48.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:48.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:48.747 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:48:49.218 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:48:49.689 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:48:50.161 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:48:50.634 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:48:51.107 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:48:51.579 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:48:52.053 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:48:52.524 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:48:52.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:52.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:52.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:52.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:52.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:52.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:52.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:48:52.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:48:52.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:48:52.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:48:52.869 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:48:52.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:48:52.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:48:57.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:48:57.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:48:57.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:48:57.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:48:57.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:48:57.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:48:57.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:48:57.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:48:57.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:57.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:48:57.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:48:57.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:48:57.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:48:57.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:48:57.878 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:57.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:48:57.878 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:48:57.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:48:57.878 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:48:57.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:48:57.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:48:57.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:48:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:48:57.881 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:48:57.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:48:57.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:48:57.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:48:57.883 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:48:57.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:48:57.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:48:57.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:48:57.888 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:48:58.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:48:58.405 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:48:58.407 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:48:58.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:48:58.410 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:48:58.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:48:58.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:48:58.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:48:58.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:48:58.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:48:58.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:48:58.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:48:58.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:48:58.840 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:48:58.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:58.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:58.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:58.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:48:59.311 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:48:59.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:48:59.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:48:59.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:48:59.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:48:59.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:00.252 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:49:00.723 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:49:00.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:00.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:00.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:00.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:01.194 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:49:01.665 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:49:01.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:02.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:49:02.605 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:49:02.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:02.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:02.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:02.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:03.077 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:49:03.550 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:49:04.023 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:49:04.492 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:49:04.961 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:49:05.432 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:49:05.903 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:49:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:49:06.843 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:49:07.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:07.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:07.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:07.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:07.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:07.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:07.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:07.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:07.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:07.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:07.203 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:49:12.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:12.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:12.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:12.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:12.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:12.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:12.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:12.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:12.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:12.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:12.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:49:12.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:49:12.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:49:12.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:12.217 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:12.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:12.217 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:49:12.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:12.218 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:49:12.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:12.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:49:12.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:49:12.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:12.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:12.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:12.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:49:12.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:12.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:49:12.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:12.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:49:12.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:49:12.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:12.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:12.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:12.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:49:12.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:12.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:49:12.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:12.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:49:12.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:49:12.234 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:49:12.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:12.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:49:12.718 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:49:12.762 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:12.764 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:49:12.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:12.767 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:49:12.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:12.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:12.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:49:13.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:13.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:13.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:13.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:49:13.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:13.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:13.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:13.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:13.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:14.129 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:49:14.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:14.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:14.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:14.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:14.602 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:49:15.074 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:49:15.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:15.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:15.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:15.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:15.545 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:49:16.016 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:49:16.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:16.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:16.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:16.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:16.486 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:49:16.957 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:49:17.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:17.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:17.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:17.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:17.428 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:49:17.898 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:49:18.370 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:49:18.841 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:49:19.314 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:49:19.786 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:49:20.259 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:49:20.732 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:49:21.205 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:49:21.677 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:49:22.147 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:49:22.618 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:49:23.089 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:49:23.563 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:49:24.035 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:49:24.507 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:49:24.978 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:49:25.451 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:49:25.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:25.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:25.569 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=2884 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:25.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:25.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:25.572 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:49:25.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:25.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:25.573 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2885 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:30.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:30.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:30.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:30.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:30.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:30.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:30.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:30.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:49:30.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:49:30.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:49:30.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:30.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:30.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:30.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:49:30.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:30.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:49:30.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:30.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:49:30.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:49:30.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:30.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:30.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:49:30.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:30.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:49:30.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:30.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:49:30.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:49:30.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:30.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:30.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:30.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:49:30.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:30.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:49:30.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:49:30.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:49:30.634 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:49:30.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:30.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:49:31.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:49:31.159 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:31.161 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:49:31.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:31.164 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:49:31.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:31.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:31.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:31.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:31.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:31.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:31.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:31.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:31.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:49:31.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:31.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:31.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:31.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:32.058 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:49:32.204 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:32.531 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:49:32.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:32.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:32.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:32.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:32.731 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:33.004 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:49:33.252 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:33.475 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:49:33.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:33.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:33.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:33.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:33.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:49:34.420 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:49:34.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:34.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:34.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:34.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:34.893 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:49:35.267 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:35.364 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:49:35.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:35.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:35.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:35.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:35.801 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:35.836 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:49:36.309 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:49:36.317 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:36.781 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:49:36.840 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:37.253 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:49:37.724 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:49:38.195 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:49:38.669 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:49:38.846 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:39.141 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:49:39.612 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:49:40.084 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:49:40.557 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:49:40.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:40.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:40.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:40.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:40.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:40.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:40.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:40.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:40.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:40.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:40.895 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:49:40.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:40.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:40.895 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2218 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:45.901 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:45.901 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:45.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:45.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:45.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:45.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:45.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:45.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:45.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:45.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:45.929 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:49:45.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:49:45.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:49:45.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:45.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:45.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:45.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:49:45.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:45.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:49:45.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:45.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:49:45.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:49:45.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:45.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:45.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:45.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:49:45.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:45.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:49:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:45.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:49:45.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:49:45.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:45.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:45.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:45.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:49:45.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:45.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:49:45.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:45.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:49:45.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:49:45.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:49:45.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:49:45.951 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:49:45.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:49:45.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:49:45.952 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:49:45.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:45.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:49:46.435 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:49:46.478 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:46.481 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:49:46.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:46.483 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:49:46.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:46.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:46.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:46.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:46.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:46.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:46.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:46.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:46.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:46.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:46.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:46.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:46.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:46.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:46.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:46.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:46.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:46.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:46.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:46.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:46.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:46.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:46.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:46.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:46.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:46.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:46.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:46.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:46.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:46.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:46.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:46.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:46.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:46.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:46.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:46.906 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:49:46.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:46.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:46.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:46.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:46.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:46.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:46.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:46.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:47.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:49:47.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:47.472 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:49:47.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.483 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:47.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.520 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:47.520 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:49:47.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.530 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:47.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:47.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:47.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.711 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:47.711 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:49:47.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.723 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:47.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.752 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:47.752 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:49:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.770 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:47.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.797 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:47.797 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:49:47.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:47.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.909 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:47.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:47.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:47.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:47.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:47.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:47.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:47.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:47.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:47.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:47.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:47.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:47.987 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:47.987 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:47.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:47.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.162 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:48.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:48.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:48.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:48.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:48.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:48.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:48.221 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:48.221 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:48.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:49:48.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.434 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:48.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:48.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:48.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:48.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:48.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:48.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:48.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:48.509 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:48.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.676 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:48.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:48.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:48.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:48.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:48.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:48.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:48.744 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:48.745 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:48.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.788 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:49:48.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:48.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.931 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:48.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:48.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:48.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:48.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:48.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:48.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:48.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:48.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:48.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:48.975 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:48.975 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:48.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:48.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:49.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:49.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:49.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:49.185 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:49.185 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=700 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:49.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:49.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:49.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:49.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:49.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:49.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:49.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:49.259 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:49:49.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:49.266 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:49.266 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:49.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:49.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:49.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:49.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:49.448 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:49.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:49.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:49.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:49.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:49.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:49.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:49.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:49.499 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:49:49.499 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:49:49.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:49.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:49.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:49.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:49.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:49.693 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:49:49.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:49.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:49.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:49.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:49.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:49.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:49.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:49.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:49.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:49.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:49.705 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:49:54.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:54.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:54.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:54.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:54.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:54.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:54.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:54.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:54.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:54.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:49:54.721 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:49:54.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:49:54.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:49:54.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:54.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:54.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:54.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:49:54.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:49:54.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:49:54.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:54.731 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:49:54.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:49:54.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:54.732 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:54.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:54.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:49:54.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:49:54.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:49:54.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:54.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:49:54.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:49:54.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:54.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:49:54.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:54.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:49:54.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:49:54.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:49:54.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:49:54.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:49:54.740 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:49:54.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:49:54.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:49:54.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:49:54.745 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:49:55.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:49:55.271 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:49:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:55.274 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:49:55.276 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:49:55.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:55.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:55.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:49:55.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:55.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:55.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:55.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:49:55.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:49:55.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 02:49:55.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:49:55.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:49:55.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:55.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:49:55.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:49:55.696 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:49:55.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:55.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:55.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:56.167 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:49:56.641 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:49:56.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:56.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:56.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:56.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:57.113 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:49:57.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:49:57.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:49:57.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:49:57.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:49:57.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:49:57.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:49:57.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:49:57.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:49:57.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:49:57.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:49:57.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:49:57.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:49:57.391 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:49:57.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:02.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:02.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:02.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:02.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:02.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:02.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:02.406 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:02.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:02.406 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:50:02.409 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:50:02.409 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:50:02.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:02.409 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:02.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:02.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:50:02.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:02.410 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:50:02.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:02.413 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:50:02.413 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:50:02.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:02.414 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:02.414 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:50:02.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:02.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:02.414 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:50:02.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:02.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:50:02.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:50:02.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:02.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:02.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:02.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:50:02.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:02.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:50:02.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:50:02.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:50:02.429 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:50:02.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:02.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:02.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:02.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:02.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:02.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:02.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:02.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:02.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:02.431 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:50:07.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:07.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:07.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:07.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:07.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:07.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:07.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:07.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:07.446 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:07.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:07.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:50:07.451 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:50:07.451 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:50:07.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:07.452 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:07.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:07.452 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:50:07.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:07.453 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:50:07.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:07.454 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:50:07.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:50:07.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:07.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:07.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:07.455 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:50:07.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:07.455 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:50:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:07.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:50:07.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:50:07.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:07.459 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:07.460 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:50:07.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:07.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:07.460 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:50:07.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:07.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:50:07.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:50:07.464 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:50:07.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:07.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:50:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:50:07.989 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:50:07.990 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:50:07.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:50:07.991 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:50:08.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:50:08.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:08.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:08.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:08.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:50:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:50:09.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:09.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:09.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:09.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:09.829 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:50:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:50:10.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:10.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:10.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:10.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:10.760 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:50:11.235 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:50:11.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:11.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:11.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:11.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:11.704 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:50:12.174 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:50:12.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:12.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:12.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:12.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:12.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:50:13.121 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:50:13.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:13.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:13.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:13.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:13.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:13.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:13.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:13.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:13.487 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:50:13.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:13.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:18.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:18.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:18.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:18.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:18.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:18.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:18.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:18.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:18.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:18.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:18.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:50:18.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:50:18.510 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:50:18.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:18.510 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:18.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:18.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:50:18.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:18.512 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:50:18.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:18.514 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:18.514 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:50:18.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:18.517 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:50:18.517 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:50:18.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:18.517 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:18.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:18.517 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:50:18.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:18.517 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:50:18.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:18.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:50:18.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:50:18.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:50:18.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:50:18.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:50:18.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:50:18.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:50:18.522 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:50:18.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:18.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:50:19.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:50:19.052 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:50:19.054 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:50:19.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:50:19.056 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:50:19.470 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:50:19.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:19.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:19.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:19.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:19.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:50:20.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:50:20.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:20.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:20.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:20.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:20.885 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:50:21.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:50:21.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:21.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:21.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:21.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:21.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:50:22.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:50:22.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:22.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:22.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:22.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:22.779 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:50:23.251 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:50:23.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:23.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:23.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:23.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:23.726 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:50:24.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:24.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:24.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:24.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:24.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:24.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:24.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:24.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:24.067 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:50:24.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:24.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:29.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:29.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:29.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:29.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:29.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:29.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:29.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:29.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:50:29.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:50:29.086 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:50:29.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:29.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:29.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:29.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:50:29.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:29.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:50:29.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:29.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:50:29.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:50:29.089 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:29.089 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:29.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:29.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:50:29.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:29.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:50:29.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:29.091 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:50:29.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:50:29.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:29.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:29.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:29.092 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:50:29.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:29.092 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:50:29.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:50:29.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:50:29.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:50:29.095 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:50:29.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:29.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:29.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:29.096 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:29.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:34.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:34.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:34.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:34.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:34.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:34.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:34.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:34.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:34.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:34.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:50:34.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:50:34.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:50:34.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:34.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:34.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:34.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:50:34.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:34.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:50:34.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:34.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:34.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:50:34.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:34.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:34.121 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:50:34.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:34.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:50:34.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:50:34.124 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:50:34.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:34.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:50:34.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:50:34.648 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:50:34.649 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:50:34.651 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:50:34.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:50:34.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:50:34.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:50:34.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:50:35.078 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:50:35.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:35.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:35.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:35.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:50:35.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:50:35.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:50:35.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:50:35.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:50:35.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:50:36.024 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:50:36.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:36.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:36.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:36.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:36.496 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:50:36.967 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:50:37.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:37.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:37.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:37.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:37.438 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:50:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:50:38.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:38.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:38.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:38.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:38.379 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:50:38.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:50:39.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:39.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:39.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:39.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:39.319 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:50:39.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:50:40.258 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:50:40.728 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:50:41.199 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:50:41.670 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:50:42.141 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:50:42.612 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:50:43.083 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:50:43.553 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:50:44.024 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:50:44.495 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:50:44.966 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:50:45.439 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:50:45.912 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:50:46.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:50:46.855 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:50:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:50:47.800 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:50:48.272 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:50:48.746 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:50:49.218 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:50:49.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:50:49.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:50:49.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:49.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:49.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:49.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:49.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:49.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:49.526 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:50:49.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:49.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:49.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3332 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:50:54.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:50:54.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:50:54.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:54.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:54.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:54.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:54.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:50:54.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:54.535 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:54.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:50:54.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:50:54.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:50:54.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:50:54.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:54.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:54.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:50:54.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:50:54.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:50:54.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:50:54.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:54.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:50:54.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:50:54.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:54.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:54.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:50:54.540 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:50:54.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:50:54.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:50:54.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:54.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:50:54.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:50:54.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:54.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:50:54.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:50:54.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:50:54.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:50:54.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:50:54.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:50:54.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:50:54.545 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:50:54.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:50:54.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:50:55.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:50:55.069 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:50:55.071 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:50:55.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:50:55.072 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:50:55.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:50:55.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:50:55.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:50:55.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:50:55.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:50:55.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:50:55.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:50:55.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:50:55.121 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:50:55.124 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:50:55.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:50:55.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:50:55.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:50:55.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:50:55.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:50:55.501 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:50:55.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:55.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:55.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:55.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:55.974 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:50:56.447 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:50:56.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:56.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:56.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:56.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:56.919 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:50:57.393 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:50:57.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:57.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:57.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:57.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:57.865 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:50:58.338 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:50:58.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:58.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:58.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:58.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:58.809 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:50:59.282 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:50:59.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:50:59.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:50:59.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:50:59.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:50:59.755 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:51:00.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:51:00.698 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:51:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:51:01.644 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:51:02.117 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:51:02.590 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:51:03.063 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:51:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:03.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:03.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:03.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:03.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:03.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:03.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:03.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:03.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:03.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:03.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:03.155 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:08.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:08.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:08.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:08.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:08.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:08.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:08.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:08.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:08.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:08.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:08.168 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:51:08.170 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:51:08.171 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:51:08.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:08.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:08.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:08.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:51:08.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:08.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:51:08.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:08.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:51:08.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:51:08.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:08.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:08.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:08.175 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:51:08.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:08.175 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:51:08.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:08.177 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:51:08.177 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:51:08.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:08.177 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:08.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:08.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:51:08.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:08.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:51:08.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:51:08.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:51:08.182 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:51:08.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:08.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:51:08.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:51:08.710 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:08.712 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:08.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:08.715 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:51:08.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:08.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:08.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:08.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:08.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:08.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:08.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:08.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:08.755 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:08.757 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:08.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:08.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:08.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:08.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:08.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:09.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:51:09.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:09.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:09.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:09.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:09.607 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:51:10.078 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:51:10.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:10.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:10.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:10.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:10.551 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:51:11.024 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:51:11.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:11.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:11.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:11.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:11.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:51:11.970 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:51:12.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:12.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:12.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:12.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:51:12.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:51:13.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:13.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:13.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:13.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:13.389 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:51:13.861 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:51:14.334 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:51:14.807 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:51:15.280 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:51:15.752 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:51:16.225 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:51:16.698 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:51:16.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:16.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:16.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:16.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:16.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:16.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:16.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:16.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:16.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:16.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:16.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:16.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:16.782 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:16.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:16.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:16.782 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:21.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:21.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:21.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:21.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:21.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:21.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:21.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:21.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:21.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:21.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:21.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:51:21.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:51:21.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:51:21.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:21.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:21.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:21.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:51:21.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:21.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:51:21.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:21.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:21.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:51:21.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:21.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:51:21.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:51:21.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:21.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:21.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:21.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:51:21.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:21.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:51:21.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:51:21.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:51:21.805 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:51:21.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:51:21.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:21.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:21.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:51:22.286 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:51:22.331 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:22.334 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:22.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:22.336 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:51:22.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:22.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:22.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:22.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:22.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:22.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:22.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:22.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:22.378 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:22.382 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:22.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:22.389 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:51:22.389 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:51:22.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:22.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:22.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:51:22.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:22.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:22.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:22.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:22.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:22.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:22.952 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:51:22.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:22.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:22.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:22.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:22.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:22.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:22.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:22.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:22.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:22.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:22.960 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:22.960 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:22.960 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:22.960 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:22.960 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:27.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:27.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:27.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:27.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:27.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:27.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:27.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:27.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:27.976 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:27.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:27.976 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:51:27.980 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:51:27.980 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:51:27.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:27.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:27.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:27.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:51:27.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:27.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:51:27.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:27.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:51:27.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:51:27.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:27.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:27.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:27.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:51:27.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:27.986 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:51:27.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:27.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:51:27.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:51:27.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:27.990 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:27.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:27.990 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:51:27.990 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:27.990 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:51:27.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:51:27.996 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:51:27.996 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:51:27.996 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:28.001 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:51:28.480 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:51:28.525 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:28.528 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:28.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:28.530 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:51:28.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:28.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:28.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:28.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:28.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:28.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:28.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:28.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:28.572 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:28.575 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:28.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:28.584 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:51:28.584 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:51:28.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:28.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:28.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:51:28.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:28.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:29.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:29.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:29.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:29.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:29.147 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:51:29.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:29.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:29.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:29.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:29.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:29.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:29.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:29.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:29.153 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:29.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:29.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:34.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:34.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:34.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:34.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:34.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:34.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:34.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:34.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:34.164 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:34.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:34.165 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:51:34.168 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:51:34.168 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:51:34.169 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:34.169 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:34.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:34.170 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:51:34.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:34.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:51:34.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:34.172 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:51:34.172 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:51:34.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:34.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:34.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:34.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:51:34.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:34.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:51:34.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:34.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:51:34.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:51:34.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:34.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:34.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:34.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:51:34.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:34.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:51:34.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:51:34.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:51:34.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:51:34.181 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:51:34.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:34.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:34.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:51:34.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:51:34.713 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:34.715 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:34.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:34.717 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:51:34.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:34.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:34.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:34.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:34.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:34.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:34.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:34.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:34.803 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:34.808 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:34.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:34.818 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:51:34.818 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:51:34.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:34.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:35.136 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:51:35.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:35.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:35.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:35.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:35.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:35.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:35.330 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:51:35.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:35.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:35.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:35.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:35.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:35.335 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:40.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:40.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:40.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:40.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:40.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:40.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:40.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:40.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:40.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:40.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:40.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:51:40.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:51:40.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:51:40.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:40.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:40.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:40.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:51:40.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:40.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:51:40.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:40.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:51:40.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:51:40.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:40.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:40.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:40.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:51:40.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:40.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:51:40.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:40.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:51:40.360 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:51:40.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:40.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:40.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:40.360 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:51:40.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:40.360 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:51:40.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:51:40.363 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:51:40.363 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:51:40.363 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:40.368 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:51:40.842 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:51:40.886 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:40.887 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:40.889 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:51:40.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:40.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:40.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:40.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:40.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:40.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:40.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:40.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:40.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:40.934 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:40.937 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:40.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:40.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:40.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:40.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:40.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:41.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:51:41.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:41.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:41.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:41.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:41.786 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:51:42.256 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:51:42.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:42.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:42.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:42.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:42.730 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:51:43.202 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:51:43.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:43.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:43.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:43.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:43.675 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:51:44.148 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:51:44.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:44.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:44.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:44.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:44.621 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:51:45.093 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:51:45.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:45.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:45.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:45.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:45.564 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:51:46.037 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:51:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:51:46.982 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:51:47.455 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:51:47.928 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:51:48.401 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:51:48.874 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:51:48.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:48.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:48.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:48.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:48.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:48.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:48.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:48.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:48.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:48.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:48.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:48.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:49.008 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:49.011 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:49.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:49.023 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:51:49.023 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:51:49.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:49.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:49.347 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:51:49.819 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:51:50.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:50.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:50.056 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:51:50.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:50.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:50.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:50.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:50.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:50.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:50.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:50.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:50.061 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:50.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:50.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:55.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:55.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:55.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:55.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:55.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:55.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:55.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:55.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:55.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:55.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:51:55.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:51:55.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:51:55.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:51:55.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:55.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:55.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:55.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:51:55.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:51:55.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:51:55.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:55.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:51:55.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:51:55.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:55.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:55.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:55.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:51:55.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:51:55.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:51:55.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:55.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:51:55.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:51:55.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:55.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:51:55.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:55.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:51:55.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:51:55.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:51:55.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.093 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:51:55.093 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:51:55.093 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:51:55.093 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:51:55.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:51:55.098 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:51:55.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:51:55.615 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:55.616 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:55.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:55.617 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:51:55.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:55.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:55.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:51:55.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:55.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:51:55.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:51:55.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:51:55.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:51:55.669 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:51:55.672 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:51:55.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:51:55.684 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:51:55.684 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:51:55.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:55.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:51:56.047 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:51:56.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:56.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:51:56.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:51:56.237 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:51:56.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:51:56.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:51:56.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:51:56.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:51:56.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:51:56.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:51:56.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:51:56.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:51:56.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:51:56.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:51:56.246 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:51:56.246 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:56.247 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:56.247 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:56.247 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:56.247 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:56.247 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:51:56.247 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:52:01.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:01.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:01.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:01.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:01.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:01.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:01.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:01.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:01.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:01.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:01.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:52:01.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:52:01.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:52:01.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:01.267 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:01.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:01.268 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:52:01.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:01.268 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:52:01.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:01.270 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:52:01.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:52:01.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:01.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:01.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:01.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:52:01.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:01.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:52:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:01.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:52:01.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:52:01.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:01.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:01.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:01.273 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:52:01.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:01.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:52:01.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:01.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:52:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:52:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:52:01.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:52:01.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:52:01.277 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:52:01.277 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:52:01.277 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:01.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:01.282 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:52:01.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:52:01.801 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:01.802 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:01.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:01.803 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:52:01.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:01.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:01.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:01.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:01.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:01.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:01.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:01.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:01.852 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:01.855 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:01.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:01.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:01.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:01.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:01.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:02.230 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:52:02.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:02.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:02.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:02.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:02.703 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:52:03.174 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:52:03.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:03.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:03.646 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:52:04.119 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:52:04.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:04.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:04.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:04.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:04.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:52:05.064 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:52:05.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:05.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:05.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:05.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:05.535 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:52:06.008 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:52:06.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:06.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:06.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:06.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:06.480 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:52:06.953 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:52:07.426 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:52:07.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:52:08.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:52:08.844 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:52:09.316 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:52:09.788 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:52:09.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:09.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:09.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:09.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:09.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:09.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:09.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:09.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:09.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:09.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:09.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:09.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:09.925 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:09.929 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:09.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:09.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:09.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:09.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:09.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:10.259 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:52:10.730 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:52:11.204 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:52:11.676 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:52:12.148 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:52:12.619 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:52:13.093 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:52:13.565 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:52:14.037 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:52:14.508 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:52:14.981 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:52:15.454 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:52:15.926 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:52:16.397 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:52:16.870 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:52:17.343 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:52:17.815 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:52:17.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:17.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:17.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:17.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:17.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:17.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:17.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:17.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:17.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:17.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:17.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:17.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:17.998 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:18.001 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:18.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:18.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:18.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:18.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:18.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:18.288 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:52:18.761 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:52:19.233 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:52:19.704 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:52:20.177 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:52:20.650 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:52:21.122 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:52:21.593 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:52:22.066 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:52:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:52:23.011 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:52:23.482 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:52:23.955 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:52:24.428 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:52:24.900 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:52:25.371 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:52:25.841 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:52:26.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:26.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:26.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:26.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:26.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:26.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:26.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:26.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:26.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:26.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:26.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:26.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:26.075 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:26.079 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:26.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:26.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:26.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:26.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:26.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:26.312 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:52:26.783 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:52:27.257 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:52:27.729 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:52:28.201 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:52:28.675 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:52:29.147 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:52:29.619 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:52:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:52:30.559 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:52:31.032 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:52:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:52:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:52:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:52:32.921 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:52:33.394 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:52:33.867 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:52:34.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:34.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:34.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:34.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:34.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:34.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:34.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:34.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:34.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:34.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:34.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:34.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:34.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:34.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:34.109 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:52:39.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:39.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:39.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:39.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:39.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:39.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:39.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:39.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:39.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:39.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:39.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:39.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:39.130 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:52:39.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:39.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:52:39.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:52:39.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:39.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:39.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:39.133 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:52:39.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:39.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:52:39.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:39.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:39.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:52:39.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:52:39.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:52:39.137 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:52:39.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:39.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:39.141 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:52:39.615 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:52:39.663 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:39.665 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:39.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:39.667 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:52:39.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:39.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:39.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:39.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:39.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:39.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:39.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:39.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:39.753 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:39.757 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:39.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:39.771 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:52:39.771 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:52:39.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:39.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:40.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:52:40.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:40.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:40.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:40.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:40.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:52:41.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:52:41.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:41.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:41.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:41.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:41.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:41.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:41.265 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:52:41.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:41.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:41.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:41.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:41.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:41.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:41.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:41.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:41.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:41.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:41.270 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:52:46.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:46.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:46.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:46.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:46.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:46.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:46.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:46.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:46.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:46.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:46.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:52:46.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:52:46.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:52:46.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:46.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:46.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:46.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:52:46.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:46.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:52:46.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:46.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:52:46.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:52:46.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:46.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:46.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:46.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:52:46.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:46.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:52:46.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:46.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:52:46.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:52:46.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:46.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:46.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:46.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:52:46.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:46.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:52:46.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:52:46.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:52:46.302 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:52:46.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:46.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:46.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:52:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:52:46.831 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:46.834 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:46.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:46.836 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:52:46.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:46.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:46.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:46.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:46.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:46.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:46.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:46.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:46.878 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:46.881 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:46.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:46.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:52:46.893 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:52:46.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:46.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:47.258 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:52:47.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:47.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:47.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:47.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:47.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:47.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:47.451 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:52:47.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:47.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:47.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:47.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:47.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:47.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:47.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:47.456 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:52:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:52.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:52:52.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:52:52.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:52.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:52.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:52.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:52.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:52:52.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:52.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:52.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:52:52.478 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:52:52.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:52:52.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:52:52.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:52.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:52.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:52:52.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:52:52.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:52:52.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:52:52.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:52.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:52:52.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:52:52.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:52.485 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:52.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:52:52.485 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:52:52.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:52:52.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:52:52.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:52.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:52:52.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:52:52.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:52.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:52:52.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:52:52.488 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:52:52.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:52:52.488 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:52:52.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:52:52.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:52:52.492 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:52:52.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:52:52.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:52:52.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:52:52.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:52:53.019 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:52:53.021 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:52:53.023 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:52:53.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:53.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:52:53.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:52:53.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:52:53.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:53.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:53.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:53.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:52:53.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:52:53.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:52:53.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:52:53.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:52:53.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:53.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:52:53.447 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:52:53.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:53.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:53.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:53.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:53.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:52:54.393 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:52:54.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:54.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:54.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:54.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:52:55.338 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:52:55.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:55.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:55.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:55.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:55.812 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:52:56.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:52:56.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:56.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:56.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:56.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:52:57.230 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:52:57.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:52:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:52:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:52:57.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:52:57.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:52:58.175 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:52:58.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:52:59.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:52:59.594 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:53:00.065 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:53:00.538 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:53:01.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:53:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:01.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:01.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:01.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:01.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:01.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:01.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:01.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:01.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:01.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:01.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:01.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:01.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:01.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:01.101 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:01.101 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:06.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:06.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:06.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:06.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:06.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:06.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:06.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:06.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:06.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:06.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:06.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:53:06.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:53:06.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:53:06.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:06.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:06.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:06.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:53:06.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:06.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:53:06.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:06.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:53:06.123 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:53:06.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:06.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:06.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:06.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:53:06.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:06.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:53:06.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:06.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:53:06.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:53:06.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:06.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:06.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:06.129 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:53:06.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:06.129 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:53:06.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:53:06.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:53:06.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:53:06.134 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:53:06.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:06.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:53:06.616 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:53:06.667 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:53:06.669 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:53:06.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:06.672 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:53:06.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:06.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:06.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:53:06.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:06.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:53:06.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:53:06.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:53:06.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:53:06.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:06.712 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:53:06.712 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:53:06.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:06.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:07.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:53:07.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:07.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:07.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:07.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:07.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:53:08.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:53:08.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:08.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:08.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:53:08.980 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:53:09.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:09.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:09.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:09.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:09.453 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:53:09.926 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:53:10.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:10.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:10.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:10.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:10.400 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:53:10.872 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:53:11.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:11.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:11.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:11.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:11.346 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:53:11.818 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:53:12.291 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:53:12.764 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:53:13.236 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:53:13.707 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:53:14.178 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:53:14.651 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:53:14.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:14.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:14.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:14.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:14.720 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:53:14.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:14.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:14.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:14.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:14.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:14.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:14.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:14.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:14.741 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:53:14.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:14.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:14.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:14.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:14.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:14.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:14.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:14.742 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:14.743 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:19.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:19.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:19.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:19.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:19.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:19.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:19.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:19.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:19.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:19.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:19.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:53:19.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:53:19.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:53:19.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:19.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:19.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:19.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:53:19.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:19.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:53:19.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:19.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:19.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:53:19.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:19.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:19.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:53:19.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:53:19.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:53:19.752 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:53:19.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:19.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:19.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:53:20.234 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:53:20.265 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:53:20.266 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:53:20.266 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:53:20.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:20.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:20.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:20.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:53:20.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:20.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:53:20.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:53:20.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:53:20.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:53:20.706 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:53:20.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:20.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:20.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:20.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:21.178 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:53:21.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:53:21.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:21.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:21.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:21.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:22.123 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:53:22.595 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:53:22.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:22.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:22.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:22.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:23.069 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:53:23.541 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:53:23.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:23.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:23.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:23.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:53:24.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:53:24.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:24.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:24.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:24.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:24.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:53:25.428 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:53:25.901 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:53:26.372 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:53:26.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:53:26.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:26.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:26.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:26.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:26.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:26.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:26.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:26.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:26.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:26.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:26.978 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:53:26.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:26.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:31.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:31.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:31.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:31.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:31.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:31.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:31.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:31.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:31.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:31.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:31.993 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:53:31.996 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:53:31.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:53:31.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:31.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:31.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:31.997 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:53:31.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:31.997 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:53:31.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:32.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:53:32.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:53:32.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:32.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:32.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:32.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:53:32.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:32.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:53:32.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:32.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:53:32.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:53:32.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:32.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:32.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:32.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:53:32.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:32.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:53:32.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:53:32.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:53:32.006 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:53:32.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:32.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:53:32.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:53:32.531 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:53:32.532 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:53:32.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:32.533 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:53:32.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:32.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:32.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:53:32.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:32.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:53:32.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:53:32.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:53:32.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:53:32.960 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:53:33.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:33.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:33.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:33.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:33.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:53:33.905 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:53:34.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:34.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:34.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:34.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:34.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:53:34.850 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:53:35.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:35.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:35.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:35.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:35.320 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:53:35.794 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:53:36.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:36.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:36.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:36.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:36.266 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:53:36.738 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:53:37.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:37.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:37.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:37.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:37.209 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:53:37.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:37.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:37.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:37.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:37.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:37.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:37.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:37.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:37.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:37.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:37.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:37.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:37.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:37.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:37.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:37.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:53:37.687 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:53:38.166 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:53:38.646 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:53:39.125 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:53:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:53:40.085 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:53:40.565 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:53:41.046 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:53:41.526 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:53:42.004 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:53:42.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:42.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:42.236 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:53:42.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:42.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:42.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:42.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:42.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:42.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:42.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:42.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:42.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:42.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:42.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:42.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:42.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:53:42.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:42.254 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:53:42.254 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:53:42.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:42.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:42.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:42.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:53:42.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:42.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:53:42.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:42.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:53:42.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:53:42.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:42.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:42.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:42.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:53:42.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:42.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:53:42.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:53:42.259 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:53:42.259 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:53:42.259 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:42.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:42.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:42.260 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:42.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:53:47.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:53:47.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:47.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:47.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:47.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:47.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:47.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:47.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:47.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:53:47.276 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:53:47.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:53:47.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:53:47.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:47.278 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:47.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:53:47.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:53:47.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:53:47.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:53:47.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:47.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:53:47.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:53:47.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:47.281 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:47.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:53:47.281 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:53:47.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:53:47.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:53:47.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:47.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:53:47.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:53:47.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:53:47.286 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:53:47.286 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:53:47.286 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:53:47.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:53:47.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:53:47.811 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:53:47.813 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:53:47.814 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:53:47.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:53:47.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:53:47.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:53:47.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:53:47.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:53:47.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:53:47.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:53:47.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:53:47.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:53:48.240 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:53:48.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:48.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:48.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:48.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:48.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:53:49.183 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:53:49.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:49.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:49.656 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:53:50.129 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:53:50.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:50.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:50.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:53:51.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:53:51.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:51.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:51.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:51.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:51.545 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:53:52.018 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:53:52.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:53:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:53:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:53:52.489 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:53:52.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:53:53.431 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:53:53.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:53.905 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:53:54.377 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:53:54.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:54.849 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:53:55.320 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:53:55.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:55.794 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:53:56.266 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:53:56.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:56.738 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:53:57.212 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:53:57.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:53:57.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:53:57.684 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:53:58.156 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:53:58.631 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:53:59.103 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:53:59.577 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:54:00.050 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:54:00.522 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:54:00.997 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:54:01.470 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:54:01.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:01.941 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:54:02.405 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:54:02.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:02.868 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:54:03.335 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:54:03.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:03.808 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:54:04.280 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:54:04.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:04.746 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:54:05.210 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:54:05.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:54:06.140 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:54:06.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:06.609 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:54:07.076 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:54:07.543 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:54:08.010 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:54:08.473 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:54:08.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:08.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:08.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:08.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:08.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:08.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:08.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:08.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:08.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:54:08.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:54:08.624 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:54:08.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:08.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:13.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:54:13.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:54:13.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:13.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:13.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:13.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:13.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:13.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:54:13.642 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:13.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:54:13.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:54:13.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:54:13.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:54:13.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:54:13.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:13.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:13.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:54:13.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:54:13.644 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:54:13.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:54:13.645 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:54:13.645 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:54:13.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:54:13.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:54:13.646 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:54:13.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:54:13.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:54:13.649 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:54:13.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:13.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:54:14.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:54:14.171 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:54:14.172 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:54:14.173 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:54:14.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:14.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:14.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:14.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:54:14.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:14.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:14.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:14.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:54:14.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:54:14.216 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:54:14.220 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:54:14.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:54:14.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:14.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:14.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:14.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:14.594 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:54:14.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:14.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:14.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:14.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:15.066 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:54:15.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:54:15.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:15.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:15.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:15.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:15.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:15.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:15.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:15.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:15.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:15.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:15.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:15.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:54:15.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:54:15.526 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:54:15.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:15.526 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:15.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:15.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:15.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:15.527 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:20.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:54:20.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:54:20.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:20.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:20.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:20.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:20.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:20.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:54:20.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:20.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:54:20.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:54:20.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:54:20.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:54:20.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:54:20.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:54:20.544 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:54:20.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:20.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:54:20.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:54:20.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:54:20.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:20.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:20.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:54:20.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:54:20.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:54:20.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:20.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:54:20.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:54:20.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:54:20.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:54:20.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:54:20.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:54:20.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:54:20.548 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:20.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:20.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:54:21.019 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:54:21.061 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:54:21.061 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:54:21.061 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:54:21.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:21.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:21.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:21.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:54:21.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:21.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:21.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:21.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:54:21.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:54:21.107 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:54:21.108 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:54:21.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:54:21.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:21.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:21.485 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:54:21.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:21.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:21.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:21.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:21.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:54:22.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 02:54:22.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:22.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:22.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:22.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:22.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:22.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:22.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:22.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:22.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:22.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:54:22.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:54:22.390 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:54:22.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:22.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:22.391 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:54:27.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:54:27.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:54:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:27.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:27.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:27.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:54:27.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:54:27.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:27.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:54:27.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:54:27.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:54:27.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:54:27.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:27.413 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:54:27.413 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:54:27.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:54:27.413 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:27.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:54:27.414 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:54:27.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:54:27.414 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:54:27.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:54:27.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:54:27.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:54:27.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:54:27.417 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:54:27.417 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:54:27.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:54:27.422 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:54:27.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:54:27.929 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:54:27.929 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:54:27.930 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:54:27.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:27.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:27.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:27.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:54:27.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:27.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:27.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:27.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:54:27.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:54:27.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:27.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:27.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:27.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:27.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:28.356 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:54:28.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:28.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:28.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:28.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:28.823 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:54:29.291 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:54:29.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:29.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:29.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:29.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:29.761 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:54:30.232 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:54:30.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:30.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:30.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:30.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:30.701 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:54:31.169 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:54:31.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:31.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:31.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:31.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:31.637 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:54:32.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:54:32.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:54:32.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:54:32.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:54:32.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:54:32.577 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:54:33.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:54:33.515 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:54:33.984 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:54:34.449 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:54:34.915 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:54:35.385 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:54:35.850 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:54:36.317 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:54:36.784 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:54:37.253 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:54:37.723 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:54:38.193 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:54:38.661 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:54:39.131 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:54:39.599 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:54:40.066 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:54:40.535 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:54:41.002 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:54:41.467 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:54:41.938 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:54:42.408 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:54:42.875 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:54:43.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:43.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:43.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:43.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:43.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:43.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:43.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:54:43.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:43.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:43.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:43.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:54:43.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:54:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:43.200 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:54:43.201 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 02:54:43.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:43.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:43.345 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:54:43.813 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:54:44.283 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:54:44.752 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:54:45.225 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:54:45.697 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:54:46.171 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:54:46.644 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:54:47.116 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:54:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:54:48.062 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:54:48.535 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:54:49.008 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:54:49.481 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:54:49.954 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:54:50.425 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:54:50.898 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:54:51.371 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:54:51.844 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:54:52.316 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:54:52.790 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 02:54:53.262 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 02:54:53.735 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 02:54:54.208 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 02:54:54.681 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 02:54:55.154 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 02:54:55.626 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 02:54:56.098 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 02:54:56.570 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 02:54:57.044 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 02:54:57.517 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 02:54:57.990 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 02:54:58.462 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 02:54:58.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:58.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:58.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:58.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:58.650 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:54:58.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:54:58.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:54:58.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:54:58.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:58.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:54:58.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:54:58.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:54:58.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:54:58.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:54:58.703 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:54:58.703 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 02:54:58.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:58.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:54:58.934 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 02:54:59.408 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 02:54:59.880 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 02:55:00.350 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 02:55:00.821 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 02:55:01.293 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 02:55:01.766 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 02:55:02.238 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 02:55:02.711 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 02:55:03.184 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 02:55:03.656 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 02:55:04.129 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 02:55:04.602 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 02:55:05.074 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 02:55:05.547 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 02:55:06.020 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 02:55:06.492 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 02:55:06.963 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 02:55:07.437 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 02:55:07.909 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 02:55:08.382 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 02:55:08.855 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 02:55:09.327 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 02:55:09.800 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 02:55:10.273 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 02:55:10.745 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 02:55:11.218 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 02:55:11.691 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 02:55:12.163 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 02:55:12.636 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 02:55:13.110 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 02:55:13.582 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 02:55:14.056 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 02:55:14.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:14.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:14.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:55:14.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:55:14.121 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:55:14.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:55:14.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:55:14.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:55:14.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:14.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:55:14.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:55:14.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:55:14.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:55:14.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:14.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:14.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:55:14.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:55:14.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:14.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:14.528 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 02:55:15.000 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 02:55:15.474 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 02:55:15.946 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 02:55:16.418 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 02:55:16.890 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 02:55:17.363 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 02:55:17.836 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 02:55:18.308 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 02:55:18.781 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 02:55:19.254 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 02:55:19.726 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 02:55:20.197 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 02:55:20.671 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 02:55:21.144 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 02:55:21.616 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 02:55:22.089 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 02:55:22.562 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 02:55:23.034 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 02:55:23.507 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 02:55:23.980 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 02:55:24.453 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 02:55:24.931 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 02:55:25.404 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 02:55:25.877 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 02:55:26.350 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 02:55:26.822 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 02:55:27.296 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 02:55:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 02:55:28.241 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 02:55:28.712 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 02:55:29.183 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 02:55:29.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:29.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:29.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:55:29.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:55:29.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:29.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:29.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:29.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:29.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:29.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:29.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:55:29.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:55:29.623 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:55:29.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:29.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:29.623 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:29.623 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:29.624 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:29.624 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:29.624 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:29.624 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:29.624 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=13459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:34.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:55:34.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:55:34.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:34.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:34.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:34.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:34.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:34.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:55:34.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:34.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:55:34.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:55:34.640 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:55:34.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:55:34.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:55:34.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:34.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:34.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:55:34.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:55:34.642 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:55:34.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:34.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:55:34.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:55:34.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:55:34.645 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:34.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:34.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:55:34.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:55:34.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:55:34.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:55:34.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:55:34.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:55:34.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:34.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:55:34.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:55:34.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:55:34.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:55:34.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:55:34.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:55:34.652 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:55:34.652 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:34.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:55:34.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:55:34.653 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:34.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:55:39.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:55:39.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:39.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:39.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:39.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:39.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:39.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:55:39.668 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:39.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:55:39.668 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:55:39.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:55:39.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:55:39.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:55:39.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:39.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:39.674 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:55:39.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:55:39.674 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:55:39.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:39.676 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:55:39.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:55:39.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:55:39.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:39.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:39.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:55:39.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:55:39.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:55:39.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:39.679 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:55:39.679 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:55:39.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:55:39.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:39.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:39.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:55:39.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:55:39.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:55:39.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:55:39.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:55:39.684 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:55:39.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:39.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:55:40.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:55:40.216 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:55:40.218 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:55:40.220 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:55:40.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:40.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:55:40.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:55:40.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:55:40.264 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:55:40.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:40.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:55:40.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:55:40.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:55:40.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:55:40.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:40.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:55:40.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:55:40.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:40.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:40.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:55:40.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:40.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:40.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:40.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:41.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:55:41.581 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:55:41.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:41.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:41.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:41.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:42.054 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:55:42.527 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:55:42.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:42.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:42.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:42.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:42.999 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:55:43.473 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:55:43.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:43.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:43.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:43.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:43.945 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:55:44.418 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:55:44.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:44.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:44.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:44.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:44.891 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:55:45.364 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:55:45.836 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:55:46.307 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:55:46.778 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:55:47.251 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:55:47.724 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:55:48.196 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:55:48.667 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:55:49.141 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:55:49.613 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:55:50.086 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:55:50.559 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:55:51.032 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:55:51.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:51.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:51.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:55:51.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:55:51.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:51.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:51.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:51.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:51.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:51.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:51.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:55:51.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:55:51.148 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:55:51.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:51.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:51.149 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:55:56.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:55:56.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:55:56.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:56.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:56.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:56.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:56.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:55:56.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:55:56.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:56.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:55:56.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:55:56.155 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:55:56.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:55:56.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:55:56.156 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:56.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:55:56.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:55:56.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:55:56.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:55:56.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:55:56.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:55:56.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:55:56.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:55:56.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:55:56.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:55:56.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:55:56.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:55:56.160 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:55:56.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:55:56.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:55:56.165 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:55:56.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:55:56.685 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:55:56.687 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:55:56.689 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:55:56.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:56.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:55:56.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:55:56.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:55:56.716 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:55:56.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:56.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:55:56.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:55:56.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:55:56.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:55:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:55:56.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:55:56.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:55:56.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:56.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:55:57.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:55:57.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:57.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:57.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:57.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:57.587 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:55:58.058 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:55:58.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:58.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:58.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:58.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:58.531 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:55:59.004 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:55:59.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:55:59.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:55:59.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:55:59.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:55:59.476 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:55:59.947 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:56:00.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:00.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:00.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:00.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:00.418 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:56:00.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:56:01.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:01.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:01.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:01.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:01.364 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:56:01.836 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:56:02.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:56:02.773 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:56:03.247 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:56:03.719 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:56:04.192 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:56:04.665 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:56:05.138 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:56:05.610 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:56:06.081 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:56:06.552 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:56:07.025 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:56:07.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:07.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:07.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:56:07.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:56:07.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:07.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:07.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:07.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:07.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:07.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:56:07.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:56:07.144 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:56:12.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:56:12.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:56:12.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:12.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:12.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:12.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:12.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:12.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:56:12.155 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:12.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:56:12.155 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:56:12.159 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:56:12.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:56:12.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:56:12.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:12.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:12.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:56:12.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:56:12.160 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:56:12.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:56:12.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:56:12.163 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:56:12.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:56:12.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:56:12.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:56:12.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:56:12.169 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:56:12.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:56:12.170 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:56:12.170 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:12.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:12.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:56:12.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:56:12.698 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:56:12.701 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:12.703 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:56:12.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:56:12.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:56:12.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:56:12.742 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:12.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:12.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:56:12.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:56:12.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:56:12.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:56:12.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:12.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:56:12.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:56:12.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:12.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:13.125 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:56:13.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:13.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:13.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:13.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:13.597 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:56:14.070 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:56:14.091 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:14.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:14.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:14.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:14.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:14.543 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:56:15.015 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:56:15.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:15.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:15.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:15.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:56:15.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:56:16.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:16.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:16.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:16.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:16.432 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:56:16.904 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:56:17.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:56:17.849 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:56:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:56:18.794 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:56:19.265 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:56:19.738 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:56:20.211 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:56:20.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:56:21.157 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:56:21.629 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:56:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:56:22.573 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:56:23.046 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:56:23.519 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:56:23.991 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:56:24.462 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:56:24.935 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:56:25.408 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:56:25.881 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:56:26.351 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:56:26.825 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:56:27.298 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:56:27.770 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:56:28.241 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:56:28.712 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:56:29.185 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:56:29.658 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:56:30.130 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:56:30.604 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:56:31.076 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:56:31.549 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:56:32.022 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:56:32.495 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:56:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:32.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:32.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:56:32.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:56:32.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:32.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:32.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:32.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:32.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:32.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:32.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:56:32.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:56:32.821 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:56:32.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:32.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:37.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:56:37.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:56:37.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:37.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:37.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:37.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:37.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:37.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:56:37.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:37.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:56:37.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:56:37.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:56:37.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:56:37.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:56:37.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:37.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:37.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:56:37.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:56:37.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:56:37.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:37.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:56:37.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:56:37.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:56:37.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:37.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:37.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:56:37.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:56:37.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:56:37.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:37.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:56:37.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:56:37.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:56:37.854 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:37.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:37.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:56:37.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:56:37.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:56:37.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:37.858 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:56:37.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:56:37.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:56:37.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:56:37.858 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:56:37.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:56:37.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:56:37.859 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:56:37.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:37.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:56:38.342 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:56:38.380 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:56:38.382 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:38.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:38.383 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:56:38.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:56:38.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:56:38.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:56:38.414 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:38.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:38.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:56:38.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:56:38.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:56:38.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:56:38.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:38.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:56:38.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:56:38.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:38.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:38.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:56:38.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:38.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:38.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:38.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:56:39.300 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:39.756 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:56:39.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:39.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:39.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:39.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:40.227 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:56:40.260 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:40.701 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:56:40.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:40.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:40.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:40.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:56:41.226 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:41.646 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:56:41.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:41.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:41.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:41.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:42.116 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:56:42.186 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:56:42.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:42.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:42.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:42.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:43.063 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:56:43.153 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:43.535 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:56:44.006 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:56:44.112 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:44.479 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:56:44.952 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:56:45.079 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:45.425 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:56:45.898 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:56:46.039 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:46.371 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:56:46.843 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:56:47.005 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:47.314 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:56:47.787 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:56:47.965 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:48.260 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:56:48.733 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:56:48.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:48.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:48.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:56:48.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:56:48.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:48.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:48.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:48.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:48.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:48.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:56:48.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:56:48.842 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:56:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:48.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:48.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:56:53.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:56:53.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:56:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:53.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:53.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:56:53.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:56:53.849 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:53.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:56:53.849 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:56:53.850 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:56:53.850 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:56:53.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:56:53.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:53.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:56:53.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:56:53.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:56:53.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:56:53.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:53.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:56:53.852 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:56:53.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:56:53.852 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:53.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:56:53.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:56:53.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:56:53.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:56:53.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:56:53.854 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:56:53.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:56:53.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:56:53.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:56:53.856 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:56:53.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:56:53.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:56:53.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:56:54.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:56:54.381 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:56:54.383 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:54.385 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:56:54.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:54.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:56:54.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:56:54.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:56:54.423 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:56:54.426 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:54.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:54.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:56:54.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:56:54.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:56:54.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:56:54.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:56:54.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:56:54.493 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:56:54.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:56:54.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:54.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:56:54.812 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:56:54.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:54.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:54.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:54.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:55.283 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:56:55.754 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:56:55.777 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:56:55.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:55.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:55.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:55.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:56.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:56:56.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:56:56.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:56.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:57.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:56:57.646 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:56:57.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:57.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:57.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:57.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:58.119 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:56:58.592 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:56:58.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:56:58.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:56:58.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:56:58.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:56:59.065 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:56:59.537 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:57:00.011 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:57:00.483 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:57:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:57:01.429 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:57:01.902 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:57:02.374 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:57:02.845 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:57:03.319 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:57:03.791 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:57:04.264 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:57:04.737 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:57:05.210 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:57:05.421 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:57:05.682 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:57:06.153 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:57:06.627 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:57:07.100 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:57:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:57:08.046 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:57:08.518 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:57:08.989 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:57:09.463 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:57:09.935 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:57:10.407 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:57:10.878 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:57:11.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:11.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:11.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:11.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:11.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:11.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:11.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:11.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:11.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:11.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:11.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:11.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:11.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:11.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:11.221 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:57:11.221 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3748 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:11.221 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3748 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:11.221 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3748 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:11.221 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3748 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:11.221 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3748 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:16.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:16.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:16.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:16.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:16.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:16.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:16.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:16.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:16.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:16.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:16.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:57:16.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:57:16.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:57:16.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:16.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:16.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:16.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:57:16.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:16.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:57:16.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:16.240 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:16.240 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:57:16.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:16.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:16.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:57:16.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:57:16.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:57:16.248 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:57:16.248 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:16.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:57:16.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:57:16.775 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:57:16.777 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:57:16.778 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:57:16.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:16.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:16.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:16.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:16.817 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:57:16.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:16.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:16.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:16.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:16.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:16.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:16.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:16.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:16.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:16.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:17.201 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:57:17.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:17.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:17.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:17.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:17.674 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:57:18.146 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:57:18.170 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:57:18.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:18.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:18.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:18.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:18.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:57:19.090 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:57:19.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:19.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:19.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:19.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:19.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:57:20.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:57:20.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:20.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:20.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:20.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:20.506 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:57:20.980 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:57:21.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:21.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:21.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:21.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:21.452 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:57:21.925 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:57:22.396 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:57:22.869 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:57:23.342 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:57:23.814 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:57:24.285 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:57:24.758 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:57:25.231 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:57:25.703 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:57:26.177 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:57:26.649 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:57:26.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:26.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:26.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:26.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:26.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:26.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:26.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:26.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:26.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:26.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:26.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:26.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:26.904 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:57:26.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:26.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:26.904 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:31.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:31.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:31.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:31.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:31.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:31.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:31.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:31.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:31.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:31.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:31.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:57:31.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:57:31.925 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:57:31.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:31.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:31.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:31.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:57:31.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:31.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:57:31.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:31.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:57:31.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:57:31.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:31.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:31.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:31.929 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:57:31.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:31.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:57:31.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:31.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:31.931 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:57:31.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:57:31.934 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:57:31.934 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:57:31.934 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:57:31.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:31.939 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:57:32.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:57:32.467 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:57:32.469 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:57:32.470 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:57:32.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:32.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:32.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:32.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:32.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:32.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:32.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:32.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:32.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:32.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:32.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:57:32.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:32.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:32.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:32.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:32.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:32.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:32.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:32.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:32.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:32.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:32.935 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:57:32.935 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:57:32.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:32.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:32.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:32.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:32.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:33.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:57:33.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:33.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:33.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:33.619 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:57:33.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:33.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:33.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:33.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:33.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:33.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:33.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:33.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:33.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:33.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:33.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:33.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:33.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:33.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:33.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:33.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:33.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:33.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:33.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:33.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:33.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:33.828 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:57:33.828 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:57:33.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:33.831 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:57:33.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:34.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:34.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:34.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:34.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:34.224 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:57:34.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:34.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:34.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:34.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:34.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:34.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:34.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:34.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:34.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:34.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:34.238 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:57:34.238 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:34.238 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:34.238 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:39.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:39.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:39.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:39.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:39.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:39.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:39.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:39.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:39.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:39.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:39.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:57:39.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:57:39.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:57:39.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:39.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:39.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:39.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:57:39.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:39.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:57:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:39.257 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:39.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:57:39.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:39.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:39.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:57:39.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:57:39.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:57:39.262 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:57:39.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:39.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:39.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:57:39.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:57:39.790 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:57:39.792 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:57:39.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:39.795 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:57:39.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:39.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:39.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:39.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:39.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:39.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:39.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:39.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:39.837 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:57:39.840 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 02:57:39.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:39.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:39.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:39.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:39.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:40.216 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:57:40.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:40.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:40.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:40.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:40.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:40.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:40.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:40.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:40.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:40.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:40.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:40.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:40.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:40.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:40.240 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:40.240 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:45.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:45.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:45.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:45.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:45.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:45.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:45.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:45.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:45.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:45.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:57:45.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:57:45.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:57:45.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:57:45.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:45.265 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:45.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:57:45.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:57:45.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:57:45.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:45.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:57:45.269 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:57:45.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:45.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:45.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:45.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:57:45.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:57:45.270 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:57:45.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:45.272 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:57:45.272 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:57:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:57:45.275 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:57:45.275 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:57:45.275 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:57:45.280 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:57:45.758 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:57:45.802 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:57:45.804 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:57:45.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:45.806 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:57:45.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:45.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:45.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:45.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:45.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:45.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:45.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:45.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:45.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:45.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:45.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:45.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:46.228 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:57:46.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:46.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:46.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:46.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:46.701 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:57:47.174 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:57:47.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:47.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:47.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:47.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:47.647 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:57:48.120 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:57:48.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:48.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:48.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:48.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:48.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:57:48.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:48.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:48.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:48.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:49.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:49.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:49.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:49.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:49.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:49.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:49.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:49.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:49.065 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:57:49.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:49.073 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:57:49.073 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 02:57:49.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:49.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:49.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:49.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:49.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:49.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:49.538 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:57:50.010 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:57:50.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:50.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:50.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:50.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:50.483 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:57:50.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:57:51.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:57:51.903 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:57:52.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:52.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:52.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:52.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:52.234 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:57:52.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:52.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:52.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:52.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:52.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:52.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:52.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:52.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:52.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:52.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:52.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:52.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:52.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:52.376 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:57:52.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:52.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:57:53.322 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:57:53.793 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:57:54.266 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:57:54.738 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:57:55.210 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:57:55.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:55.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:55.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:55.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:55.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:55.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:55.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:57:55.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:55.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:57:55.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:57:55.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:57:55.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:57:55.681 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:57:55.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:55.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:57:55.691 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:57:55.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:55.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:55.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:56.153 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:57:56.626 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:57:57.099 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:57:57.571 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:57:58.044 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:57:58.517 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:57:58.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:57:58.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:57:58.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:57:58.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:57:58.846 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:57:58.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:57:58.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:57:58.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:57:58.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:57:58.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:57:58.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:57:58.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:57:58.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:57:58.861 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:57:58.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:57:58.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:57:58.861 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2932 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:03.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:58:03.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:58:03.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:03.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:03.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:03.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:03.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:03.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:58:03.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:03.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:58:03.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:58:03.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:58:03.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:58:03.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:58:03.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:03.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:03.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:58:03.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:58:03.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:58:03.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:03.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:58:03.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:58:03.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:58:03.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:03.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:03.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:58:03.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:58:03.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:58:03.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:58:03.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:58:03.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:58:03.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:58:03.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:58:03.892 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:58:03.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:03.897 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:58:04.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:58:04.417 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:58:04.418 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:58:04.420 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:58:04.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:58:04.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:58:04.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:58:04.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:58:04.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:04.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:58:04.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:58:04.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:58:04.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:58:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:58:04.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:04.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:04.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:04.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:05.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:58:05.789 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:58:05.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:06.263 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:58:06.735 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:58:06.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:06.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:06.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:07.207 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:58:07.681 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:58:07.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:08.153 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:58:08.625 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:58:08.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:08.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:08.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:08.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:09.096 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:58:09.569 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:58:10.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:58:10.514 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:58:10.987 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:58:11.459 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:58:11.931 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:58:12.402 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:58:12.873 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:58:13.346 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:58:13.819 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:58:14.291 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:58:14.762 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:58:15.235 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:58:15.708 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:58:16.180 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:58:16.651 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:58:17.124 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:58:17.596 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:58:18.068 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:58:18.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:58:18.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:58:18.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:18.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:18.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:18.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:18.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:18.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:18.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:18.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:18.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:58:18.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:58:18.365 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:58:18.365 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:18.365 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:18.365 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:18.365 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:18.365 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:18.365 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:18.366 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:23.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:58:23.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:58:23.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:23.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:23.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:23.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:23.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:23.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:58:23.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:23.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:58:23.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:58:23.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:58:23.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:58:23.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:58:23.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:23.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:58:23.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:58:23.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:58:23.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:23.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:58:23.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:58:23.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:58:23.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:23.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:23.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:58:23.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:58:23.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:58:23.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:23.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:58:23.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:58:23.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:58:23.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:23.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:23.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:58:23.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:58:23.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:58:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:58:23.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:58:23.388 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:58:23.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:23.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:58:23.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:58:23.910 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:58:23.913 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:58:23.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:58:23.915 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:58:23.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:58:23.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:58:23.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:58:23.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:23.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:58:23.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:58:23.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:58:23.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:58:23.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:58:23.977 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 02:58:23.977 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 02:58:23.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:23.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:24.343 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:58:24.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:24.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:24.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:24.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:24.815 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:58:25.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:58:25.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:25.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:25.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:25.761 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:58:25.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:25.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:58:25.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:58:25.979 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 02:58:25.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:58:25.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:25.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:58:25.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:58:25.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:58:25.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:58:26.235 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:58:26.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:26.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:26.707 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:58:27.179 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:58:27.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:27.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:27.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:27.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:27.650 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:58:28.123 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:58:28.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:28.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:28.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:28.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:58:29.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:58:29.541 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:58:30.014 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:58:30.486 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:58:30.959 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:58:31.432 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:58:31.904 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:58:32.375 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:58:32.848 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:58:33.318 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:58:33.788 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:58:34.258 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:58:34.724 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:58:35.191 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:58:35.655 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:58:36.121 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:58:36.585 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:58:37.050 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:58:37.512 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:58:37.975 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:58:38.438 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:58:38.901 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:58:39.365 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:58:39.829 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:58:40.293 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:58:40.757 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:58:41.221 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:58:41.685 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:58:42.149 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:58:42.612 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:58:43.076 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:58:43.541 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:58:44.006 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:58:44.470 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:58:44.933 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:58:45.397 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 02:58:45.861 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 02:58:46.325 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 02:58:46.788 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 02:58:47.252 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 02:58:47.715 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 02:58:48.179 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 02:58:48.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:58:48.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:58:48.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:58:48.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:48.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:48.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:48.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:48.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:48.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:48.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:48.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:48.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:58:48.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:58:48.465 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:48.466 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:58:53.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:58:53.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:58:53.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:53.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:53.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:53.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:53.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:58:53.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:58:53.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:53.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:58:53.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:58:53.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:58:53.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:58:53.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:58:53.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:53.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:58:53.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:58:53.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:58:53.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:58:53.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:53.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:58:53.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:58:53.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:58:53.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:53.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:58:53.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:58:53.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:58:53.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:58:53.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:53.511 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:58:53.512 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:58:53.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:58:53.512 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:58:53.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:58:53.512 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:58:53.512 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:58:53.512 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:58:53.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:53.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:58:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:58:53.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:58:53.519 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:58:53.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:58:53.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:58:53.524 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:58:53.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:58:54.059 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:58:54.061 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:58:54.061 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:58:54.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:58:54.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:58:54.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:58:54.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:58:54.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:58:54.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:58:54.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:58:54.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:58:54.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:58:54.458 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:58:54.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:54.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:54.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:54.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:54.921 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:58:55.384 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:58:55.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:55.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:55.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:55.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:55.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:58:56.312 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:58:56.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:56.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:56.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:56.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:56.784 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:58:57.273 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:58:57.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:57.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:57.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:57.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:57.744 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:58:58.215 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:58:58.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:58:58.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:58:58.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:58:58.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:58:58.686 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:58:59.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:58:59.670 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:59:00.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:59:00.616 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:59:01.088 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:59:01.558 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:59:02.029 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:59:02.500 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:59:02.971 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:59:03.444 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:59:03.912 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:59:04.382 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:59:04.854 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:59:05.399 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:59:05.870 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:59:06.341 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:59:07.121 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:59:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:59:08.064 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:59:08.537 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:59:09.064 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:59:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:59:09.995 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:59:10.461 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:59:10.929 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:59:11.396 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:59:11.863 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:59:12.330 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:59:12.795 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:59:13.261 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:59:13.728 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:59:14.194 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:59:14.663 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:59:15.126 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:59:15.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:59:15.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:59:15.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:15.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:15.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:59:15.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:59:15.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:59:15.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:59:15.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:59:15.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:59:15.548 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:59:20.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:59:20.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:59:20.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:59:20.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:59:20.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:59:20.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:59:20.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:59:20.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:59:20.561 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:20.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:59:20.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:59:20.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:59:20.564 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:59:20.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:59:20.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:20.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:59:20.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:59:20.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:59:20.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:59:20.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:20.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:59:20.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:59:20.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:59:20.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:20.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:59:20.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:59:20.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:59:20.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:59:20.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:20.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:59:20.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:59:20.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:59:20.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:20.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:59:20.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:59:20.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:59:20.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:59:20.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:59:20.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:59:20.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:59:20.578 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:59:20.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:20.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:20.583 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:59:21.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:59:21.124 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:59:21.126 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:59:21.127 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:59:21.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:59:21.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:59:21.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:59:21.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:59:21.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:59:21.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:59:21.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:59:21.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:59:21.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:59:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:59:21.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:21.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:21.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:21.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:21.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:59:22.453 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:59:22.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:22.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:22.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:22.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:22.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:59:23.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:59:23.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:23.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:23.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:23.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:23.865 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:59:24.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:59:24.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:24.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:24.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:24.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:24.803 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:59:25.273 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:59:25.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:25.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:25.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:25.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:25.744 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:59:26.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:59:26.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:59:27.147 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:59:27.616 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:59:28.084 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:59:28.553 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:59:29.021 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:59:29.490 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:59:29.958 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:59:30.428 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:59:30.899 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:59:31.368 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:59:31.835 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:59:32.302 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:59:32.773 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 02:59:33.244 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 02:59:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 02:59:34.177 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 02:59:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 02:59:35.114 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 02:59:35.584 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 02:59:36.054 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 02:59:36.523 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 02:59:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 02:59:37.462 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 02:59:37.929 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 02:59:38.399 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 02:59:38.869 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 02:59:39.337 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 02:59:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 02:59:40.369 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 02:59:40.837 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 02:59:41.303 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 02:59:41.769 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 02:59:42.233 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 02:59:42.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:59:42.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:59:42.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:42.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:42.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:42.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:42.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:59:42.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:59:42.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:59:42.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:59:42.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:59:42.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:59:42.606 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 02:59:42.606 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:42.606 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:42.606 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:42.607 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:42.607 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:42.607 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:42.607 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 02:59:47.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 02:59:47.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 02:59:47.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:59:47.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:59:47.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:59:47.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:59:47.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 02:59:47.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:59:47.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:47.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 02:59:47.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:59:47.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 02:59:47.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 02:59:47.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:59:47.610 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 02:59:47.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 02:59:47.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:59:47.612 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 02:59:47.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 02:59:47.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 02:59:47.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 02:59:47.614 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 02:59:47.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 02:59:47.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 02:59:47.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 02:59:48.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 02:59:48.131 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 02:59:48.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 02:59:48.133 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 02:59:48.134 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 02:59:48.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 02:59:48.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 02:59:48.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 02:59:48.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 02:59:48.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 02:59:48.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 02:59:48.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 02:59:48.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 02:59:48.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 02:59:48.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:48.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:48.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:48.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:49.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 02:59:49.489 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 02:59:49.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:49.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:49.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:49.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:49.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 02:59:50.424 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 02:59:50.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:50.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:50.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:50.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:50.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 02:59:51.362 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 02:59:51.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:51.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:51.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:51.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:51.828 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 02:59:52.295 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 02:59:52.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 02:59:52.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 02:59:52.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 02:59:52.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 02:59:52.761 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 02:59:53.226 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 02:59:53.693 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 02:59:54.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 02:59:54.624 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 02:59:55.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 02:59:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 02:59:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 02:59:56.493 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 02:59:56.958 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 02:59:57.425 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 02:59:57.890 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 02:59:58.356 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 02:59:58.823 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 02:59:59.287 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 02:59:59.753 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:00:00.220 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:00:00.685 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:00:01.150 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:00:01.614 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:00:02.079 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:00:02.545 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:00:03.009 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:00:03.474 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:00:03.937 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:00:04.402 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:00:04.869 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:00:05.339 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:00:05.803 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:00:06.268 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:00:06.734 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:00:07.199 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:00:07.666 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:00:08.133 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:00:08.601 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:00:09.067 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:00:09.534 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:00:09.999 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:00:10.465 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:00:10.929 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:00:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:00:11.860 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:00:12.326 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:00:12.790 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:00:13.258 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:00:13.729 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:00:14.192 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:00:14.660 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:00:15.124 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:00:15.591 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:00:16.055 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:00:16.521 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:00:16.984 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:00:17.455 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:00:17.919 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:00:18.384 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:00:18.853 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:00:19.320 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:00:19.788 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:00:20.254 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:00:20.718 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:00:21.182 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:00:21.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:00:21.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:00:21.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:21.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:21.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:21.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:21.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:00:21.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:00:21.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:00:21.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:00:21.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:00:21.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:00:21.645 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:21.645 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:26.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:00:26.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:00:26.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:00:26.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:00:26.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:00:26.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:00:26.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:00:26.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:00:26.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:26.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:00:26.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:00:26.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:00:26.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:00:26.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:26.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:00:26.646 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:00:26.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:00:26.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:26.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:00:26.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:00:26.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:00:26.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:00:26.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:00:26.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:00:26.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:00:26.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:00:26.650 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:00:26.650 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:00:26.650 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:26.655 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:00:27.121 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:00:27.166 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:00:27.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:00:27.167 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:00:27.168 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:00:27.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:00:27.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:00:27.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:00:27.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:00:27.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:00:27.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:00:27.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:00:27.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:00:27.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:00:27.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:27.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:27.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:27.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:28.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:00:28.516 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:00:28.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:28.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:28.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:28.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:28.981 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:00:29.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:00:29.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:29.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:29.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:29.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:29.912 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:00:30.378 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:00:30.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:30.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:30.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:30.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:30.843 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:00:31.360 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:00:31.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:31.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:31.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:31.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:31.827 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:00:32.289 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:00:32.757 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:00:33.222 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:00:33.689 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:00:34.154 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:00:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:00:35.086 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:00:35.549 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:00:36.012 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:00:36.477 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:00:36.943 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:00:37.410 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:00:37.874 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:00:38.343 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:00:38.814 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:00:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:00:39.747 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:00:40.211 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:00:40.777 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:00:41.249 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:00:41.714 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:00:42.182 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:00:42.649 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:00:43.116 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:00:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:00:44.049 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:00:44.515 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:00:44.981 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:00:45.445 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:00:45.911 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:00:46.378 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:00:46.943 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:00:47.409 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:00:47.872 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:00:48.340 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:00:48.803 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:00:49.267 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:00:49.732 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:00:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:00:50.664 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:00:51.128 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:00:51.593 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:00:52.063 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:00:52.533 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:00:52.998 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:00:53.467 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:00:53.934 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:00:54.403 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:00:54.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:00:54.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:00:54.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:54.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:54.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:54.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:54.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:00:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:00:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:00:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:00:54.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:00:54.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:00:54.681 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:00:54.681 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:54.682 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:54.682 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:54.682 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:54.682 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:54.682 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:54.682 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6080 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:00:59.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:00:59.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:00:59.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:00:59.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:00:59.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:00:59.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:00:59.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:00:59.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:00:59.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:59.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:00:59.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:00:59.683 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:00:59.683 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:00:59.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:00:59.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:59.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:00:59.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:00:59.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:00:59.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:00:59.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:00:59.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:00:59.685 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:00:59.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:00:59.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:00:59.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:00:59.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:00:59.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:00:59.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:00:59.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:00:59.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:00:59.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:00:59.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:00:59.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:00:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:00:59.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:00:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:00:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:00:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:00:59.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:00:59.689 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:00:59.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:00:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:00:59.694 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:00.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:00.205 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:00.205 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:00.206 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:00.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:00.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:00.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:00.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:00.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:00.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:00.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:00.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:00.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:00.211 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:01:00.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:00.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:05.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:05.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:05.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:05.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:05.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:05.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:05.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:05.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:05.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:05.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:05.217 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:01:05.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:01:05.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:01:05.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:05.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:05.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:05.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:01:05.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:05.218 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:05.219 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:05.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:01:05.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:05.220 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:01:05.220 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:01:05.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:05.220 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:05.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:05.220 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:01:05.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:05.220 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:01:05.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:01:05.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:01:05.223 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:01:05.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:05.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:05.691 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:05.735 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:05.735 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:05.735 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:05.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:05.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:05.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:05.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:05.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:05.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:05.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:05.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:05.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:05.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:05.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:05.740 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:01:10.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:10.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:10.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:10.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:10.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:10.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:10.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:10.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:10.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:10.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:10.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:10.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:10.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:01:10.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:10.751 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:01:10.752 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:01:10.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:10.752 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:10.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:10.752 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:01:10.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:10.752 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:01:10.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:10.754 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:10.754 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:01:10.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:01:10.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:01:10.758 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:01:10.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:10.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:10.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:11.229 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:11.280 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:11.282 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:11.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:11.283 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:11.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:11.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:11.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:11.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:11.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:11.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:11.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:11.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:11.291 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:01:11.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:11.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:16.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:16.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:16.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:16.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:16.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:16.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:16.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:16.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:16.298 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:16.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:16.298 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:01:16.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:01:16.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:01:16.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:16.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:16.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:16.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:01:16.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:16.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:01:16.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:16.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:01:16.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:01:16.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:16.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:16.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:16.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:01:16.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:16.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:01:16.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:16.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:01:16.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:01:16.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:16.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:16.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:16.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:01:16.307 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:16.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:01:16.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:16.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:01:16.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:01:16.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:01:16.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:01:16.311 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:01:16.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:16.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:16.838 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:16.839 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:16.840 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:16.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:01:16.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:01:16.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:01:17.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:01:17.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:17.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:17.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:17.713 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:01:18.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:01:18.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:18.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:18.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:18.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:18.644 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:01:19.111 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:01:19.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:19.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:19.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:19.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:19.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:01:20.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:01:20.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:20.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:20.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:20.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:20.509 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:01:20.976 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:01:21.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:21.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:21.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:21.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:21.443 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:01:21.910 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:01:22.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:01:22.842 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:01:23.640 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:01:24.106 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:01:24.572 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:01:24.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:24.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:24.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:24.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:24.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:24.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:24.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:24.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:24.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:24.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:24.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:24.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:24.881 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:01:29.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:29.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:29.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:29.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:29.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:29.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:29.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:29.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:29.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:29.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:29.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:29.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:29.893 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:01:29.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:29.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:01:29.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:01:29.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:29.896 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:29.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:29.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:01:29.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:29.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:01:29.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:29.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:01:29.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:01:29.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:29.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:29.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:29.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:01:29.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:29.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:01:29.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:01:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:01:29.905 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:01:29.905 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:01:29.905 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:29.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:29.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:29.910 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:30.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:30.431 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:30.432 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:30.433 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:30.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:01:30.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:01:30.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:01:30.844 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:01:30.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:30.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:30.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:30.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:31.311 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:01:31.778 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:01:31.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:31.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:31.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:31.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:32.247 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:01:32.715 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:01:32.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:32.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:32.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:32.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:33.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:01:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:01:33.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:34.119 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:01:34.587 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:01:34.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:34.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:34.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:34.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:35.054 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:01:35.522 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:01:35.990 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:01:36.458 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:01:36.926 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:01:37.393 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:01:37.861 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:01:38.329 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:01:38.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:38.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:38.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:38.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:38.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:38.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:38.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:38.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:38.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:38.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:38.485 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:01:43.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:43.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:43.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:43.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:43.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:43.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:43.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:43.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:43.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:43.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:01:43.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:43.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:01:43.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:01:43.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:43.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:43.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:43.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:01:43.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:43.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:01:43.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:43.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:01:43.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:01:43.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:43.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:43.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:43.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:01:43.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:43.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:01:43.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:01:43.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:01:43.507 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:01:43.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:43.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:43.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:44.034 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:44.035 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:44.035 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:44.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:44.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:44.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:01:44.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:01:44.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:01:44.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:01:44.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:01:44.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:01:44.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:01:44.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:44.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:44.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:44.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:44.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:01:45.373 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:01:45.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:45.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:45.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:45.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:45.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:01:46.362 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:01:46.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:46.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:46.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:46.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:01:47.291 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:01:47.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:47.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:47.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:47.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:47.755 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:01:48.219 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:01:48.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:48.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:48.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:48.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:48.684 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:01:49.149 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:01:49.614 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:01:50.080 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:01:50.545 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:01:51.010 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:01:51.476 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:01:51.942 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:01:52.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:52.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:52.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:52.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:52.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:52.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:52.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:52.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:52.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:52.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:52.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:52.074 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:01:52.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:57.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:01:57.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:01:57.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:57.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:57.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:57.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:57.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:01:57.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:57.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:57.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:01:57.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:01:57.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:01:57.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:01:57.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:57.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:57.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:01:57.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:01:57.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:01:57.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:01:57.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:57.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:01:57.093 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:01:57.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:57.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:01:57.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:01:57.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:57.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:01:57.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:01:57.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:01:57.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:01:57.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:01:57.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:01:57.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:01:57.102 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:01:57.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:01:57.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:01:57.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:01:57.627 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:01:57.628 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:01:57.630 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:01:57.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:01:57.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:01:57.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:01:57.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:01:57.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:01:57.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:01:57.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:01:57.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:01:57.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:01:58.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:01:58.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:58.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:58.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:58.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:01:58.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:01:59.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:01:59.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:01:59.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:01:59.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:01:59.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:01:59.906 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:02:00.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:00.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:00.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:00.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:00.372 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:02:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:02:01.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:01.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:01.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:01.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:01.302 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:02:01.768 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:02:02.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:02.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:02.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:02.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:02.233 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:02:02.698 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:02:03.163 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:02:03.629 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:02:04.094 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:02:04.558 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:02:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:02:05.488 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:02:05.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:05.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:05.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:05.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:05.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:05.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:05.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:05.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:05.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:05.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:05.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:05.669 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:02:05.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:05.670 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1878 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:10.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:10.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:10.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:10.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:10.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:10.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:10.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:10.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:10.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:10.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:10.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:02:10.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:02:10.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:02:10.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:10.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:10.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:10.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:02:10.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:10.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:02:10.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:10.680 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:10.680 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:02:10.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:10.681 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:10.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:02:10.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:02:10.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:02:10.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:02:10.684 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:02:10.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:10.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:10.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:10.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:10.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:02:11.153 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:02:11.201 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:02:11.201 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:02:11.202 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:02:11.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:11.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:11.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:02:11.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:02:11.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:02:11.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:02:11.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:02:11.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:02:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:02:11.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:02:11.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:11.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:11.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:11.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:12.082 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:02:12.546 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:02:12.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:12.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:12.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:12.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:02:13.472 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:02:13.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:13.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:13.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:13.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:13.935 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:02:14.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:02:14.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:14.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:14.864 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:02:15.329 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:02:15.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:15.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:15.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:15.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:15.794 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:02:16.259 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:02:16.723 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:02:17.187 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:02:17.651 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:02:18.116 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:02:18.827 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:02:19.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:19.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:19.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:19.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:19.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:19.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:19.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:19.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:19.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:19.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:19.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:19.249 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:02:19.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:24.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:24.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:24.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:24.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:24.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:24.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:24.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:24.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:24.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:24.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:24.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:24.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:24.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:02:24.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:24.265 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:02:24.265 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:02:24.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:24.266 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:24.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:24.266 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:02:24.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:24.266 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:02:24.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:24.268 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:02:24.268 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:02:24.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:24.268 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:24.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:24.268 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:02:24.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:24.268 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:02:24.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:24.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:02:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:02:24.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:02:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:02:24.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:02:24.273 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:02:24.273 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:02:24.273 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:24.278 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:02:24.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:02:24.799 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:02:24.800 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:02:24.801 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:02:24.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:02:24.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:24.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:24.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:02:24.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:02:24.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:02:24.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:02:24.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:02:24.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:02:25.208 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:02:25.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:25.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:25.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:25.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:25.672 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:02:26.137 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:02:26.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:26.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:26.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:26.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:26.602 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:02:27.068 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:02:27.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:27.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:27.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:27.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:27.534 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:02:28.000 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:02:28.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:28.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:28.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:28.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:02:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:02:29.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:29.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:29.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:29.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:29.395 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:02:29.861 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:02:30.326 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:02:30.791 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:02:31.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:02:31.722 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:02:32.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:02:32.653 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:02:33.118 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:02:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:02:34.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:02:34.514 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:02:34.980 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:02:35.445 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:02:35.911 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:02:36.377 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:02:36.842 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:02:37.308 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:02:37.773 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:02:38.238 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:02:38.703 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:02:39.169 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:02:39.634 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:02:40.099 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:02:40.564 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:02:40.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:40.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:40.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:40.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:40.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:40.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:40.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:40.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:40.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:40.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:40.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:40.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:40.842 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:02:40.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3633 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:40.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3633 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:40.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3633 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:40.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3633 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:40.842 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3633 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:40.843 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3633 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:02:45.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:45.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:45.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:45.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:45.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:45.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:45.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:45.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:45.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:45.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:45.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:02:45.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:02:45.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:02:45.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:45.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:45.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:45.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:02:45.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:45.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:02:45.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:45.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:02:45.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:02:45.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:45.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:45.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:45.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:02:45.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:45.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:02:45.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:45.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:02:45.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:02:45.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:45.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:45.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:45.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:02:45.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:45.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:02:45.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:02:45.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:02:45.868 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:02:45.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:45.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:02:46.337 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:02:46.394 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:02:46.395 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:02:46.396 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:02:46.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:02:46.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:46.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:46.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:02:46.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:02:46.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:02:46.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:02:46.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:02:46.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:02:46.802 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:02:46.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:46.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:46.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:46.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:47.267 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:02:47.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:02:47.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:47.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:47.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:47.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:48.198 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:02:48.663 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:02:48.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:48.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:48.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:48.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:49.128 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:02:49.593 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:02:49.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:49.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:49.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:49.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:50.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:02:50.524 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:02:50.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:50.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:50.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:50.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:50.989 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:02:51.454 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:02:51.920 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:02:52.385 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:02:52.850 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:02:53.315 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:02:53.781 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:02:54.247 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:02:54.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:54.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:54.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:54.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:54.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:54.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:54.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:54.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:54.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:54.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:54.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:54.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:54.441 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:02:59.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:02:59.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:02:59.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:59.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:59.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:59.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:59.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:02:59.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:59.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:59.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:02:59.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:02:59.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:02:59.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:02:59.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:59.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:59.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:02:59.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:02:59.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:02:59.450 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:02:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:59.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:02:59.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:02:59.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:59.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:02:59.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:02:59.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:02:59.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:02:59.460 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:02:59.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:02:59.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:02:59.465 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:02:59.930 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:02:59.986 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:02:59.987 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:02:59.988 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:02:59.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:02:59.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:02:59.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:02:59.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:02:59.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:02:59.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:02:59.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:02:59.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:02:59.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:03:00.396 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:03:00.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:00.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:00.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:00.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:00.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:03:01.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:03:01.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:01.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:01.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:01.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:01.791 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:03:02.257 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:03:02.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:02.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:02.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:02.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:02.722 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:03:03.188 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:03:03.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:03.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:03.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:03.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:03.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:03:04.119 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:03:04.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:04.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:04.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:04.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:04.584 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:03:05.049 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:03:05.515 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:03:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:03:06.446 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:03:06.911 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:03:07.376 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:03:07.842 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:03:08.308 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:03:08.773 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:03:09.239 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:03:09.704 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:03:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:03:10.635 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:03:11.101 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:03:11.566 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:03:12.032 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:03:12.498 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:03:12.963 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:03:13.429 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:03:13.895 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:03:14.360 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:03:14.826 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:03:15.291 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:03:15.757 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:03:16.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:16.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:16.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:16.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:16.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:16.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:16.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:16.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:16.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:16.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:16.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:16.042 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:16.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:21.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:21.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:21.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:21.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:21.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:21.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:21.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:21.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:21.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:21.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:21.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:21.056 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:21.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:21.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:21.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:21.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:21.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:21.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:21.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:21.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:21.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:21.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:21.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:21.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:21.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:21.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:21.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:21.067 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:21.067 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:21.067 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:21.072 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:21.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:21.597 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:21.598 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:21.599 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:21.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:21.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:21.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:21.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:21.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:21.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:21.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:21.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:21.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:21.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:21.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:21.630 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:21.630 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:26.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:26.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:26.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:26.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:26.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:26.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:26.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:26.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:26.642 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:26.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:26.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:26.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:26.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:26.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:26.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:26.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:26.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:26.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:26.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:26.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:26.648 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:26.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:26.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:26.651 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:26.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:26.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:26.651 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:26.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:26.651 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:26.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:26.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:26.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:26.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:26.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:26.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:26.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:26.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:26.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:26.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:26.657 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:26.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:26.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:27.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:27.186 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:27.187 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:27.188 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:27.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:27.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:27.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:27.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:27.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:27.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:27.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:27.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:27.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:27.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:27.218 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:27.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:27.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:32.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:32.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:32.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:32.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:32.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:32.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:32.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:32.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:32.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:32.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:32.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:32.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:32.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:32.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:32.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:32.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:32.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:32.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:32.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:32.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:32.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:32.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:32.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:32.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:32.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:32.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:32.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:32.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:32.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:32.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:32.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:32.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:32.242 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:32.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:32.242 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:32.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:32.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:32.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.243 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:32.243 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:32.243 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:32.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:32.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:32.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:32.248 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:32.715 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:32.779 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:32.780 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:32.781 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:32.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:32.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:32.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:32.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:32.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:32.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:32.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:32.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:32.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:32.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:32.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:32.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:32.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:32.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:32.817 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:32.817 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:32.817 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:32.817 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:32.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:32.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:32.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:37.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:37.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:37.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:37.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:37.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:37.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:37.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:37.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:37.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:37.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:37.829 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:37.831 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:37.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:37.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:37.834 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:37.834 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:37.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:37.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:37.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:37.835 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:37.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:37.835 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:37.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:37.837 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:37.837 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:37.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:37.837 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:37.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:37.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:37.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:37.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:37.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:37.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:37.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:37.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:37.843 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:37.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:37.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:37.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:37.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:38.314 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:38.370 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:38.371 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:38.372 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:38.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:38.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:38.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:38.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:38.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:38.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:38.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:38.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:38.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:38.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:38.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:38.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:38.412 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:38.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:38.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:38.412 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:43.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:43.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:43.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:43.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:43.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:43.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:43.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:43.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:43.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:43.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:43.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:43.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:43.425 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:43.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:43.425 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:43.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:43.425 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:43.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:43.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:43.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:43.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:43.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:43.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:43.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:43.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:43.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:43.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:43.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:43.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:43.433 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:43.433 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:43.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:43.433 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:43.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:43.433 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:43.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:43.433 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:43.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:43.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:43.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:43.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:43.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:43.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:43.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:43.439 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:43.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:43.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:43.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:43.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:43.912 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:43.969 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:43.970 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:43.971 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:43.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:43.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:43.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:43.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:44.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:44.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:44.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:44.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:44.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:44.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:44.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:44.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:44.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:44.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:44.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:44.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:44.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:44.027 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:49.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:49.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:49.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:49.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:49.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:49.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:49.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:49.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:49.038 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:49.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:49.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:49.041 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:49.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:49.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:49.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:49.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:49.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:49.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:49.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:49.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:49.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:49.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:49.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:49.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:49.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:49.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:49.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:49.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:49.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:49.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:49.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:49.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:49.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:49.051 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:49.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:49.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:49.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:49.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:49.595 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:49.596 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:49.597 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:49.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:49.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:49.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:49.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:49.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:49.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:49.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:49.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:49.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:49.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:49.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:49.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:49.660 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:03:49.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:49.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:49.660 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:49.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:49.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:49.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:03:54.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:03:54.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:03:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:54.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:54.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:03:54.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:54.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:54.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:03:54.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:54.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:03:54.666 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:03:54.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:54.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:03:54.668 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:03:54.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:54.669 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:03:54.669 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:03:54.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:03:54.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:03:54.672 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:03:54.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:03:54.676 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:03:55.141 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:03:55.187 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:03:55.188 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:03:55.188 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:03:55.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:03:55.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:03:55.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:03:55.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:03:55.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:03:55.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:03:55.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:03:55.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:03:55.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:03:55.605 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:03:55.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:55.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:55.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:55.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:56.069 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:03:56.533 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:03:56.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:56.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:56.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:56.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:56.997 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:03:57.461 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:03:57.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:57.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:57.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:03:58.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:03:58.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:58.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:58.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:58.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:58.988 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:03:59.452 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:03:59.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:03:59.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:03:59.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:03:59.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:03:59.916 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:04:00.380 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:04:00.844 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:04:01.308 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:04:01.772 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:04:02.236 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:04:02.700 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:04:03.164 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:04:03.628 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:04:04.092 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:04:04.555 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:04:05.018 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:04:05.482 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:04:05.948 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:04:06.411 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:04:06.874 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:04:07.337 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:04:07.801 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:04:08.267 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:04:08.730 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:04:09.193 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:04:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:04:10.122 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:04:10.586 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:04:11.050 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:04:11.514 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:04:11.978 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:04:12.441 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:04:12.904 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:04:13.368 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:04:13.831 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:04:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:04:14.758 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:04:15.221 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:04:15.685 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:04:16.149 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:04:16.613 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:04:17.077 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:04:17.540 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:04:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:04:18.468 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:04:18.932 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:04:19.395 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:04:19.860 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:04:20.324 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:04:20.788 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:04:21.252 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:04:21.715 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:04:22.183 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:04:22.945 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:04:23.410 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:04:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:04:24.337 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:04:24.801 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:04:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:04:25.731 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:04:26.197 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:04:26.662 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:04:27.127 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:04:27.593 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:04:28.059 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:04:28.525 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:04:28.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:04:28.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:04:28.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:28.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:28.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:28.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:28.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:28.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:28.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:28.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:28.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:28.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:28.696 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:28.696 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7383 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:04:33.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:33.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:33.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:33.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:33.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:33.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:33.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:33.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:33.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:33.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:33.709 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:04:33.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:04:33.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:04:33.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:33.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:33.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:33.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:04:33.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:33.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:04:33.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:33.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:04:33.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:04:33.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:33.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:33.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:33.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:04:33.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:33.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:04:33.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:33.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:04:33.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:04:33.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:33.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:33.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:04:33.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:33.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:04:33.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:04:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:04:33.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:04:33.723 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:04:33.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:33.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:33.725 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:33.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:38.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:38.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:38.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:38.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:38.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:38.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:38.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:38.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:38.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:38.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:04:38.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:04:38.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:04:38.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:38.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:38.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:38.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:38.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:38.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:38.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:04:38.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:38.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:04:38.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:04:38.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:38.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:38.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:38.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:04:38.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:38.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:04:38.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:04:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:04:38.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:04:38.737 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:04:38.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:38.741 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:04:39.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:04:39.251 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:04:39.251 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:04:39.251 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:04:39.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:04:39.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:04:39.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:39.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:39.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:39.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:40.129 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:04:40.594 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:04:40.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:40.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:40.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:40.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:41.058 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:04:41.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:04:41.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:41.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:41.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:41.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:41.985 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:04:42.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:04:42.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:42.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:42.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:42.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:42.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:42.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:42.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:42.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:42.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:42.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:42.268 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:04:47.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:47.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:47.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:47.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:47.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:47.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:47.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:47.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:47.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:47.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:47.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:04:47.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:04:47.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:04:47.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:47.275 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:47.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:47.275 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:04:47.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:47.276 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:04:47.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:47.277 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:47.277 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:04:47.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:47.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:04:47.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:04:47.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:47.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:47.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:47.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:04:47.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:47.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:04:47.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:47.280 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:04:47.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:04:47.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:04:47.280 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:04:47.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:04:47.281 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:04:47.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:47.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:04:47.750 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:04:47.798 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:04:47.798 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:04:47.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:04:47.799 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:04:48.213 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:04:48.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:48.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:48.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:48.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:48.676 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:04:49.141 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:04:49.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:49.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:49.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:49.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:49.603 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:04:50.066 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:04:50.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:50.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:50.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:50.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:04:50.991 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:04:51.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:51.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:51.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:51.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:51.453 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:04:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:04:52.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:52.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:52.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:52.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:52.379 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:04:52.842 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:04:53.305 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:04:53.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:04:53.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:53.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:53.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:53.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:53.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:53.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:53.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:53.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:53.803 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:04:53.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:53.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:58.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:04:58.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:04:58.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:58.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:58.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:58.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:58.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:04:58.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:58.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:58.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:04:58.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:58.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:04:58.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:04:58.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:58.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:04:58.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:04:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:58.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:04:58.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:04:58.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:58.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:04:58.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:04:58.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:04:58.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:04:58.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:04:58.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:04:58.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:04:58.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:04:58.814 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:04:58.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:04:58.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:04:59.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:04:59.326 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:04:59.326 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:04:59.327 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:04:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:04:59.743 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:04:59.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:04:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:04:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:04:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:00.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:05:00.668 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:05:00.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:00.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:00.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:00.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:01.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:05:01.593 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:05:01.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:01.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:01.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:01.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:02.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:05:02.518 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:05:02.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:02.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:02.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:02.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:02.980 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:05:03.442 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:05:03.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:03.905 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:05:04.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:05:04.830 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:05:05.292 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:05:05.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:05.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:05.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:05.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:05.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:05.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:05.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:05.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:05.331 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:05.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:05.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:10.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:10.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:10.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:10.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:10.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:10.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:10.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:10.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:10.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:10.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:10.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:10.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:10.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:05:10.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:10.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:10.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:05:10.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:10.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:10.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:05:10.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:05:10.345 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:05:10.345 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:05:10.345 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:10.350 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:05:10.815 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:05:10.857 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:05:10.857 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:05:10.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:10.858 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:05:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:05:11.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:11.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:11.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:11.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:11.742 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:05:12.204 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:05:12.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:12.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:12.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:12.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:12.666 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:05:13.129 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:05:13.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:13.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:13.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:13.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:05:14.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:05:14.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:14.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:14.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:14.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:14.518 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:05:14.982 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:05:15.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:15.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:15.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:15.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:15.444 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:05:15.906 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:05:16.368 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:05:16.830 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:05:16.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:16.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:16.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:16.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:16.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:16.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:16.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:16.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:16.862 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:16.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:16.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:16.862 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1437 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:21.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:21.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:21.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:21.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:21.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:21.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:21.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:21.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:21.867 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:21.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:21.867 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:05:21.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:05:21.868 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:05:21.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:21.868 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:21.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:21.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:05:21.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:21.869 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:05:21.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:21.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:05:21.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:05:21.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:21.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:21.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:21.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:05:21.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:21.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:05:21.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:21.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:21.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:05:21.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:05:21.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:05:21.874 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:05:21.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:21.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:21.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:05:22.343 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:05:22.386 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:05:22.386 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:05:22.387 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:05:22.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:22.806 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:05:22.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:22.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:22.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:22.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:05:23.733 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:05:23.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:24.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:05:24.661 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:05:25.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:25.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:25.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:25.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:25.126 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:05:25.589 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:05:26.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:26.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:26.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:26.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:26.051 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:05:26.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:26.514 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:05:26.983 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:05:27.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:27.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:27.473 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:05:27.935 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:05:28.397 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:05:28.860 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:05:29.324 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:05:30.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:30.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:30.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:30.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:30.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:30.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:30.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:30.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:30.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:30.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:30.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:30.409 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:35.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:35.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:35.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:35.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:35.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:35.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:35.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:35.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:35.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:35.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:35.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:05:35.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:05:35.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:05:35.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:35.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:35.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:35.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:05:35.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:35.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:05:35.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:35.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:35.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:05:35.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:35.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:35.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:05:35.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:05:35.419 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:05:35.419 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:05:35.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:35.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:35.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:05:35.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:05:35.933 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:05:35.934 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:05:35.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:35.935 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:05:36.349 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:05:36.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:36.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:36.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:36.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:36.812 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:05:37.275 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:05:37.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:37.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:37.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:37.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:37.737 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:05:38.200 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:05:38.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:38.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:38.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:38.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:38.663 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:05:39.125 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:05:39.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:39.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:39.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:39.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:39.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:05:39.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:39.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:39.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:39.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:39.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:39.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:39.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:39.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:39.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:39.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:39.945 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:39.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=998 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:39.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=998 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:39.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=998 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:39.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=998 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:44.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:44.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:44.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:44.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:44.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:44.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:44.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:44.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:44.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:44.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:44.951 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:44.952 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:44.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:05:44.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:44.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:05:44.953 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:05:44.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:44.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:44.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:44.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:05:44.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:44.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:05:44.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:44.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:44.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:05:44.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:05:44.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:05:44.957 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:44.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:44.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:05:45.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:05:45.470 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:05:45.471 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:05:45.471 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:05:45.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:45.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:45.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:45.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:45.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:45.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:45.476 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:45.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:45.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:50.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:50.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:50.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:50.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:50.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:50.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:50.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:50.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:50.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:50.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:50.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:05:50.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:05:50.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:05:50.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:50.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:50.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:50.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:05:50.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:50.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:05:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:50.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:50.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:05:50.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:50.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:50.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:05:50.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:05:50.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:05:50.487 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:05:50.955 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:05:51.000 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:05:51.001 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:05:51.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:51.002 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:05:51.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:51.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:51.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:51.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:51.006 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:51.007 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:05:56.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:56.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:56.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:56.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:56.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:56.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:56.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:56.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:56.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:56.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:05:56.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:56.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:05:56.017 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:05:56.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:56.019 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:05:56.019 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:05:56.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:56.019 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:56.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:56.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:05:56.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:05:56.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:05:56.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:56.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:05:56.021 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:05:56.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:05:56.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:05:56.023 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:05:56.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:05:56.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:05:56.028 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:05:56.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:05:56.540 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:05:56.541 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:05:56.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:05:56.542 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:05:56.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:05:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:05:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:05:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:05:56.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:05:56.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:05:56.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:05:56.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:05:56.547 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:05:56.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:05:56.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:01.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:01.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:01.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:01.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:01.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:01.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:01.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:01.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:01.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:01.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:01.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:06:01.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:06:01.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:06:01.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:01.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:01.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:01.555 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:06:01.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:01.555 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:06:01.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:01.556 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:01.556 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:06:01.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:01.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:06:01.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:06:01.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:01.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:01.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:06:01.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:01.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:06:01.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:01.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:06:01.560 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:06:01.560 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:06:01.560 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:01.564 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:06:02.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:06:02.071 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:06:02.071 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:06:02.072 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:06:02.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:02.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:02.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:02.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:06:02.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:02.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:06:02.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:06:02.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:06:02.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:06:02.491 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:06:02.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:02.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:02.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:02.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:02.955 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:06:03.420 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:06:03.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:03.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:03.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:03.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:03.883 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:06:04.346 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:06:04.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:04.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:04.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:04.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:04.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:06:05.125 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:06:05.125 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:06:05.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:05.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:05.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:05.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:05.176 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:06:05.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:05.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:05.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:05.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:05.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:05.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:05.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:05.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:05.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:05.178 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:06:05.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:05.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:10.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:10.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:10.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:10.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:10.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:10.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:10.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:10.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:06:10.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:06:10.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:06:10.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:10.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:10.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:10.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:06:10.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:10.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:06:10.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:10.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:10.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:06:10.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:10.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:06:10.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:06:10.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:10.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:10.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:10.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:06:10.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:10.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:06:10.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:06:10.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:06:10.206 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:06:10.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:10.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:10.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:10.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:06:10.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:06:10.730 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:06:10.732 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:06:10.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:10.733 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:06:10.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:10.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:06:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:10.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:06:10.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:06:10.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:06:10.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:06:11.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:06:11.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:11.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:11.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:11.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:11.608 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:06:12.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:06:12.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:12.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:12.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:12.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:12.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:06:13.007 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:06:13.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:13.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:13.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:13.473 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:06:13.775 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:06:13.775 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:06:13.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:13.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:13.940 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:06:14.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:14.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:14.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:14.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:14.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:06:14.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:14.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:14.416 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:06:14.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:14.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:14.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:14.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:14.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:14.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:14.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:14.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:14.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:14.421 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:06:14.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:14.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:19.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:19.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:19.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:19.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:19.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:19.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:19.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:19.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:19.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:19.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:19.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:06:19.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:06:19.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:06:19.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:19.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:19.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:19.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:06:19.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:19.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:06:19.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:19.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:19.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:06:19.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:19.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:19.441 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:06:19.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:06:19.447 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:06:19.447 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:19.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:19.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:06:19.917 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:06:19.973 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:06:19.974 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:06:19.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:19.975 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:06:19.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:19.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:19.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:06:19.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:19.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:06:19.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:06:19.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:06:19.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:06:20.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:06:20.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:20.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:20.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:20.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:20.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:06:21.316 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:06:21.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:21.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:21.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:21.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:06:22.247 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:06:22.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:22.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:22.712 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:06:23.011 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:06:23.011 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:06:23.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:23.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:23.178 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:06:23.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:23.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:23.643 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:06:23.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:23.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:24.109 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:06:24.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:24.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:24.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:06:24.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:25.039 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:06:25.505 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:06:25.971 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:06:26.436 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:06:26.902 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:06:27.366 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:06:27.832 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:06:28.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:28.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:28.013 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:06:28.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:28.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:28.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:28.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:28.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:28.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:28.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:28.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:28.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:28.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:28.026 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:06:28.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:33.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:33.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:33.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:33.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:33.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:33.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:33.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:33.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:33.038 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:33.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:33.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:33.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:33.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:06:33.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:33.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:06:33.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:06:33.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:33.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:33.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:33.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:06:33.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:33.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:06:33.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:33.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:33.045 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:06:33.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:33.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:06:33.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:06:33.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:06:33.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:06:33.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:06:33.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:06:33.050 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:06:33.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:33.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:06:33.520 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:06:33.576 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:06:33.577 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:06:33.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:33.578 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:06:33.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:33.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:33.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:06:33.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:33.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:06:33.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:06:33.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:06:33.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:06:33.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:06:34.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:34.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:34.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:34.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:34.450 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:06:34.914 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:06:35.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:35.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:35.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:35.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:35.379 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:06:35.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:06:36.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:36.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:36.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:36.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:36.310 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:06:36.628 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:06:36.628 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:06:36.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:36.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:36.777 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:06:37.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:37.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:37.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:37.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:06:37.707 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:06:38.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:38.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:38.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:38.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:38.172 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:06:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:06:39.102 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:06:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:06:40.033 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:06:40.498 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:06:40.964 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:06:41.430 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:06:41.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:41.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:41.630 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:06:41.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:41.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:41.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:41.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:41.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:41.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:41.644 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:06:41.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:41.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:41.644 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1885 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:46.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:46.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:46.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:46.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:46.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:46.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:46.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:46.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:46.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:46.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:06:46.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:46.654 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:06:46.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:06:46.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:46.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:06:46.657 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:06:46.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:46.657 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:46.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:46.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:06:46.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:06:46.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:06:46.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:46.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:06:46.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:06:46.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:46.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:06:46.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:46.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:06:46.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:06:46.660 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:06:46.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:46.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:06:46.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:06:46.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:06:46.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:06:46.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:06:46.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:06:47.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:06:47.188 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:06:47.189 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:06:47.190 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:06:47.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:47.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:47.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:47.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:06:47.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:47.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:06:47.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:06:47.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:06:47.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:06:47.601 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:06:47.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:47.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:47.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:47.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:48.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:06:48.531 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:06:48.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:48.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:48.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:48.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:48.996 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:06:49.461 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:06:49.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:49.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:49.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:49.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:49.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:06:50.243 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:06:50.243 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:06:50.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:50.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:06:50.390 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:06:50.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:50.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:50.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:50.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:50.945 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:06:51.410 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:06:51.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:51.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:51.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:51.875 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:06:52.417 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:06:52.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:06:53.347 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:06:53.974 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:06:54.553 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:06:55.018 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:06:55.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:06:55.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:06:55.245 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:06:55.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:06:55.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:06:55.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:06:55.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:06:55.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:06:55.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:06:55.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:06:55.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:06:55.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:06:55.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:06:55.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:06:55.256 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:06:55.256 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:06:55.256 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:00.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:00.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:00.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:00.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:00.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:00.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:00.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:00.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:00.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:00.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:00.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:00.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:00.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:00.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:00.265 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:00.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:00.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:00.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:00.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:00.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:00.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:00.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:00.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:00.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:00.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:00.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:00.269 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:00.269 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:00.269 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:00.274 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:00.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:00.784 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:00.785 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:00.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:00.786 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:00.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:00.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:00.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:00.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:00.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:00.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:00.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:00.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:00.826 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:07:00.826 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:07:00.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:00.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:01.200 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:07:01.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:01.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:01.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:01.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:02.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:07:02.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:07:02.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:02.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:02.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:02.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:03.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:07:03.547 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:07:03.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:03.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:03.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:03.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:04.011 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:07:04.477 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:07:04.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:04.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:04.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:04.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:04.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:07:05.406 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:07:05.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:05.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:05.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:05.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:05.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:05.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:05.828 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:07:05.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:05.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:05.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:05.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:05.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:05.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:05.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:05.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:05.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:05.836 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:07:05.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:05.836 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:10.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:10.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:10.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:10.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:10.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:10.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:10.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:10.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:10.844 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:10.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:10.844 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:10.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:10.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:10.847 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:10.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:10.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:10.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:10.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:10.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:10.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:10.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:10.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:10.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:10.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:10.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:10.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:10.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:10.854 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:10.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:10.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:10.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:10.859 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:10.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:10.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:10.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:10.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:11.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:11.387 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:11.388 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:11.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:11.389 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:11.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:11.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:11.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:11.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:11.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:11.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:11.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:11.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:11.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:07:11.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:11.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:11.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:11.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:12.263 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:07:12.729 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:07:12.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:12.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:12.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:12.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:13.195 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:07:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:07:13.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:13.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:13.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:13.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:14.125 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:07:14.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:07:14.443 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:07:14.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:14.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:14.590 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:07:14.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:14.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:14.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:14.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:15.055 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:07:15.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:07:15.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:15.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:15.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:15.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:15.987 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:07:16.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:16.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:16.445 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:07:16.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:16.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:16.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:16.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:16.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:16.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:16.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:16.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:16.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:16.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:16.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:16.452 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:07:21.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:21.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:21.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:21.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:21.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:21.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:21.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:21.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:21.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:21.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:21.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:21.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:21.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:21.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:21.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:21.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:21.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:21.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:21.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:21.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:21.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:21.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:21.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:21.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:21.473 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:21.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:21.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:21.474 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:21.474 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:21.479 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:21.943 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:21.996 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:21.998 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:21.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:21.999 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:22.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:22.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:22.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:22.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:22.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:22.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:22.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:22.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:22.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:07:22.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:22.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:22.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:22.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:22.874 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:07:23.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:07:23.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:23.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:23.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:23.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:23.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:07:24.269 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:07:24.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:24.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:24.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:24.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:24.734 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:07:25.199 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:07:25.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:25.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:25.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:25.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:25.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:25.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:25.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:25.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:25.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:25.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:25.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:25.235 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:07:25.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:25.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:25.236 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:30.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:30.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:30.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:30.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:30.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:30.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:30.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:30.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:30.247 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:30.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:30.247 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:30.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:30.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:30.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:30.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:30.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:30.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:30.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:30.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:30.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:30.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:30.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:30.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:30.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:30.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:30.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:30.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:30.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:30.255 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:30.255 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:30.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:30.256 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:30.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:30.256 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:30.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:30.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:30.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:30.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:30.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:30.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:30.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:30.260 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:30.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:30.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:30.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:30.731 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:30.786 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:30.787 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:30.788 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:30.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:30.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:30.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:30.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:30.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:30.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:30.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:30.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:30.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:31.197 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:07:31.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:31.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:31.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:31.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:31.664 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:07:32.128 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:07:32.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:32.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:32.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:32.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:32.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:07:33.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:07:33.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:33.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:33.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:33.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:33.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:07:33.991 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:07:34.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:34.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:34.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:34.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:34.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:34.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:34.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:34.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:34.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:34.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:34.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:34.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:34.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:34.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:34.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:34.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:34.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:34.311 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:07:39.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:39.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:39.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:39.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:39.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:39.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:39.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:39.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:39.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:39.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:39.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:39.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:39.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:39.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:39.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:39.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:39.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:39.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:39.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:39.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:39.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:39.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:39.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:39.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:39.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:39.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:39.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:39.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:39.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:39.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:39.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:39.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:39.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:39.337 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:39.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:39.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:39.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:39.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:39.858 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:39.860 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:39.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:39.861 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:39.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:39.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:39.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:39.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:39.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:39.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:39.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:39.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:40.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:40.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:40.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:40.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:40.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:40.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:40.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:40.127 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:07:40.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:40.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:40.127 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:45.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:45.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:45.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:45.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:45.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:45.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:45.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:45.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:45.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:45.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:45.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:45.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:45.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:45.141 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:45.141 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:45.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:45.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:45.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:45.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:45.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:45.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:45.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:45.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:45.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:45.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:45.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:45.149 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:45.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:45.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:45.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:45.670 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:45.670 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:45.671 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:45.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:45.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:45.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:45.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:45.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:45.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:45.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:45.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:45.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:45.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:45.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:45.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:45.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:45.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:45.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:45.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:45.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:45.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:45.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:45.893 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:07:45.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:45.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:45.893 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:07:50.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:07:50.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:07:50.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:50.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:50.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:50.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:50.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:07:50.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:50.900 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:50.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:07:50.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:50.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:07:50.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:07:50.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:50.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:07:50.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:07:50.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:50.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:07:50.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:07:50.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:50.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:07:50.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:07:50.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:07:50.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:07:50.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:07:50.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:07:50.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:07:50.914 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:07:50.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:07:50.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:07:50.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:07:50.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:07:51.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:07:51.441 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:07:51.442 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:07:51.443 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:07:51.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:07:51.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:07:51.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:07:51.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:07:51.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:07:51.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:07:51.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:07:51.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:07:51.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:07:51.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:07:51.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:51.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:51.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:51.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:52.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:07:52.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:07:52.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:52.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:52.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:52.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:53.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:07:53.710 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:07:53.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:53.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:53.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:53.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:54.175 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:07:54.640 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:07:54.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:54.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:54.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:54.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:55.106 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:07:55.571 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:07:55.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:07:55.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:07:55.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:07:55.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:07:56.036 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:07:56.502 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:07:56.967 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:07:57.433 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:07:57.898 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:07:58.363 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:07:58.829 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:07:59.295 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:07:59.761 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:08:00.226 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:08:00.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:08:00.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:08:00.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:00.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:00.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:00.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:00.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:00.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:00.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:00.284 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:08:00.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:00.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:05.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:05.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:05.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:05.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:05.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:05.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:05.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:05.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:05.296 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:05.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:05.296 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:08:05.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:08:05.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:08:05.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:05.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:05.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:05.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:08:05.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:05.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:08:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:05.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:08:05.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:08:05.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:05.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:05.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:05.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:08:05.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:05.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:08:05.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:05.304 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:08:05.304 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:08:05.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:05.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:05.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:05.305 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:08:05.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:05.305 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:08:05.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:08:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:08:05.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:08:05.310 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:08:05.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:05.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:05.315 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:08:05.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:08:05.837 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:08:05.838 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:08:05.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:05.840 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:08:05.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:08:05.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:08:05.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:08:05.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:08:05.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:08:05.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:08:05.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:08:05.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:08:06.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:08:06.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:06.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:06.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:06.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:06.712 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:08:07.177 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:08:07.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:07.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:07.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:07.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:07.643 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:08:08.110 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:08:08.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:08.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:08.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:08.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:08:09.041 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:08:09.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:09.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:09.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:09.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:09.506 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:08:09.971 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:08:10.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:10.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:10.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:10.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:10.436 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:08:10.901 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:08:11.368 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:08:11.834 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:08:12.299 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:08:12.764 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:08:13.231 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:08:13.696 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:08:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:08:14.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:08:14.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:08:14.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:14.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:14.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:14.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:14.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:14.603 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:08:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:19.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:19.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:19.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:19.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:19.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:19.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:19.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:19.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:19.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:19.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:19.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:19.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:19.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:08:19.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:19.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:08:19.621 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:08:19.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:19.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:19.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:19.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:08:19.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:19.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:08:19.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:19.624 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:19.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:08:19.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:08:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:08:19.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:08:19.630 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:08:19.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:19.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:08:20.101 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:08:20.158 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:08:20.159 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:08:20.160 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:08:20.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:20.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:08:20.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:08:20.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:08:20.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:08:20.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:08:20.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:08:20.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:08:20.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:08:20.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:08:20.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:20.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:20.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:20.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:21.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:08:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:08:21.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:21.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:21.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:21.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:21.964 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:08:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:08:22.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:22.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:22.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:22.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:22.896 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:08:23.194 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:08:23.194 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 03:08:23.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:08:23.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:08:23.195 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:08:23.361 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:08:23.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:23.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:23.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:23.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:23.827 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:08:24.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:08:24.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:08:24.225 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:08:24.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:24.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:24.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:24.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:24.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:24.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:24.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:24.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:24.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:24.231 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:08:24.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:24.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:29.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:29.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:29.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:29.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:29.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:29.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:29.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:29.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:29.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:29.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:29.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:08:29.249 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:08:29.249 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:08:29.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:29.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:29.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:29.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:08:29.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:29.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:08:29.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:29.253 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:08:29.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:08:29.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:29.254 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:29.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:29.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:08:29.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:29.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:08:29.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:29.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:08:29.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:08:29.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:29.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:29.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:29.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:08:29.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:29.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:08:29.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:08:29.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:08:29.264 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:08:29.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:29.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:29.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:08:29.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:08:29.817 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:08:29.818 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:08:29.820 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:08:29.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:29.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:29.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:29.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:29.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:29.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:29.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:29.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:29.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:29.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:29.997 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:08:29.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:29.997 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=160 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:34.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:34.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:34.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:34.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:34.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:34.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:35.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:35.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:35.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:35.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:35.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:35.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:35.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:08:35.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:35.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:08:35.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:08:35.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:35.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:35.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:35.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:08:35.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:35.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:08:35.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:35.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:35.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:08:35.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:08:35.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:08:35.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:08:35.022 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:08:35.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:35.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:08:35.492 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:08:35.551 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:08:35.552 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:08:35.553 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:08:35.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:35.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:08:36.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:36.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:36.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:36.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:36.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:08:36.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:08:37.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:37.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:37.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:37.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:37.353 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:08:37.818 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:08:38.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:38.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:38.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:38.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:38.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:08:38.749 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:08:39.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:39.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:39.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:39.215 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:08:39.681 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:08:40.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:40.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:40.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:40.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:40.147 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:08:40.615 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:08:41.081 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:08:41.546 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:08:42.159 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:08:42.623 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:08:43.085 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:08:43.550 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:08:44.014 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:08:44.478 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:08:44.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:44.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:44.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:44.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:44.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:44.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:44.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:44.568 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:08:44.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:44.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:49.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:49.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:49.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:49.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:49.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:49.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:49.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:49.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:49.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:49.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:08:49.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:49.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:08:49.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:08:49.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:49.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:08:49.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:08:49.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:49.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:08:49.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:08:49.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:49.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:08:49.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:08:49.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:08:49.584 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:08:49.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:08:49.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:08:49.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:08:50.054 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:08:50.102 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:08:50.103 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:08:50.104 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:08:50.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:50.518 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:08:50.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:50.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:50.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:50.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:50.981 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:08:51.445 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:08:51.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:51.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:51.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:51.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:51.908 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:08:52.410 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:08:52.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:52.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:52.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:52.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:52.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:08:53.338 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:08:53.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:53.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:53.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:53.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:53.801 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:08:54.266 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:08:54.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:54.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:54.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:54.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:54.731 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:08:55.195 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:08:55.659 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:08:56.124 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:08:56.589 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:08:57.053 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:08:57.518 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:08:57.984 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:08:58.448 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:08:58.912 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:08:59.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:08:59.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:08:59.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:08:59.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:08:59.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:08:59.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:08:59.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:08:59.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:08:59.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:08:59.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:08:59.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:08:59.117 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:08:59.117 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2087 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:04.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:04.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:04.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:04.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:04.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:04.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:04.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:04.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:04.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:04.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:04.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:04.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:04.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:04.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:04.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:04.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:04.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:04.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:04.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:04.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:04.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:04.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:04.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:04.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:04.126 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:04.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:04.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:04.128 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:04.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:04.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:04.676 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:04.677 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:04.677 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:04.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:05.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:05.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:09:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:05.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:05.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:09:06.228 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:09:06.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:06.693 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:09:07.158 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:09:07.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:07.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:07.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:07.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:07.623 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:09:07.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:07.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:07.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:07.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:07.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:07.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:07.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:07.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:07.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:07.721 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:07.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:07.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:07.722 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:12.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:12.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:12.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:12.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:12.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:12.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:12.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:12.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:12.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:12.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:12.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:12.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:12.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:12.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:12.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:12.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:12.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:12.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:12.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:12.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:12.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:12.736 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:12.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:12.736 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:12.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:12.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:12.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:12.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:12.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:12.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:12.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:12.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:12.739 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:12.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:12.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:12.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:12.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:12.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:12.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.744 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:12.744 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:12.744 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:12.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:12.749 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:13.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:13.268 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:13.269 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:13.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:13.270 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:13.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:13.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:13.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:09:13.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:13.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:09:13.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:09:13.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:09:13.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:09:13.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:13.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:09:13.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:09:13.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:13.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:13.678 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:09:13.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:13.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:13.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:13.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:13.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:13.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:13.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:13.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:13.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:13.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:13.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:13.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:13.689 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:13.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:13.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:18.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:18.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:18.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:18.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:18.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:18.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:18.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:18.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:18.697 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:18.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:18.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:18.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:18.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:18.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:18.698 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:18.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:18.698 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:18.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:18.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:18.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:18.699 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:18.699 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:18.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:18.700 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:18.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:18.700 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:18.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:18.700 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:18.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:18.701 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:18.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:18.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:18.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:18.704 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:18.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:18.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:19.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:19.223 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:19.224 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:19.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:19.225 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:19.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:19.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:19.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:19.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:19.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:19.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:19.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:19.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:19.232 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:19.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:19.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:24.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:24.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:24.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:24.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:24.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:24.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:24.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:24.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:24.239 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:24.239 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:24.239 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:24.240 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:24.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:24.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:24.240 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:24.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:24.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:24.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:24.241 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:24.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:24.243 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:24.243 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:24.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:24.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:24.246 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:24.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:24.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:24.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:24.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:24.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:24.246 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:24.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:24.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:24.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:24.249 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:24.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:24.250 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:24.250 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:24.250 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:24.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:24.255 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:24.719 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:24.768 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:24.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:24.769 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:24.770 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:25.183 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:09:25.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:25.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:25.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:25.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:25.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:09:26.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:09:26.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:26.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:26.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:26.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:26.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:09:27.035 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:09:27.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:27.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:27.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:27.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:27.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:27.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:27.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:27.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:27.162 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:27.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:27.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:32.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:32.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:32.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:32.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:32.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:32.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:32.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:32.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:32.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:32.178 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:32.178 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:32.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:32.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:32.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:32.181 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:32.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:32.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:32.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:32.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:32.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:32.184 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:32.184 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:32.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:32.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:32.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:32.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:32.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:32.185 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:32.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:32.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:32.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:32.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:32.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:32.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:32.201 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:32.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:32.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:32.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:32.732 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:32.733 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:32.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:32.734 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:32.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:32.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:32.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:09:32.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:32.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:09:32.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:09:32.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:09:32.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:09:33.135 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:09:33.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:33.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:33.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:33.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:33.600 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:09:34.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:09:34.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:34.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:34.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:34.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:34.531 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:09:34.996 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:09:35.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:35.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:35.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:35.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:09:35.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:35.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:35.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:35.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:35.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:35.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:35.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:35.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:35.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:35.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:35.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:35.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:35.501 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:35.501 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=725 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:40.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:40.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:40.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:40.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:40.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:40.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:40.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:40.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:40.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:40.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:40.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:40.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:40.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:40.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:40.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:40.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:40.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:40.518 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:40.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:40.518 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:40.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:40.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:40.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:40.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:40.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:40.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:40.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:40.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:40.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:40.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:40.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:40.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:40.525 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:40.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:40.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:40.527 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:40.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:45.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:45.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:45.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:45.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:45.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:45.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:45.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:45.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:45.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:45.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:45.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:45.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:45.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:45.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:45.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:45.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:45.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:45.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:45.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:45.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:45.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:45.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:45.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:45.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:45.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:45.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:45.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:45.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:45.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:45.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:45.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:45.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:45.551 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:45.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:45.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:45.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:45.559 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:45.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:45.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.560 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:45.560 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:45.561 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:45.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:45.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:46.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:46.104 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:46.105 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:46.107 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:46.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:46.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:46.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:09:46.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:46.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:09:46.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:09:46.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:09:46.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:09:46.498 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:09:46.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:46.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:46.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:46.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:46.965 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:09:47.431 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:09:47.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:47.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:47.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:47.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:47.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:09:48.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:48.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:48.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:48.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:48.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:48.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:48.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:48.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:48.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:48.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:48.152 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:48.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:48.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:48.152 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:09:53.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:53.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:53.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:53.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:53.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:53.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:53.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:53.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:53.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:53.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:09:53.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:09:53.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:09:53.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:09:53.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:53.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:53.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:53.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:09:53.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:09:53.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:09:53.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:53.180 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:09:53.180 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:09:53.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:53.180 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:53.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:53.180 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:09:53.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:09:53.180 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:09:53.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:53.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:09:53.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:09:53.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:53.190 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:09:53.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:09:53.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:09:53.191 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:09:53.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:09:53.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:09:53.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:09:53.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:09:53.665 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:09:53.855 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:09:53.856 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:09:53.858 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:09:53.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:09:53.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:53.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:53.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:09:53.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:09:53.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:09:53.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:09:53.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:09:53.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:09:54.135 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:09:54.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:54.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:09:55.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:55.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:55.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:55.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:09:56.031 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:09:56.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:09:56.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:09:56.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:09:56.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:09:56.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:09:56.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:09:56.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:09:56.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:09:56.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:09:56.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:09:56.053 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:09:56.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:09:56.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:01.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:01.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:01.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:01.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:01.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:01.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:01.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:01.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:01.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:01.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:01.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:01.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:01.126 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:01.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:01.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:01.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:01.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:01.131 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:01.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:01.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:01.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:01.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:01.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:01.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:01.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:01.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:01.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:01.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:01.137 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:01.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:01.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:01.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:01.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:02.038 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:02.040 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:02.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:02.041 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:02.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:02.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:02.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:02.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:10:02.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:10:02.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:10:02.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:10:02.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:10:02.067 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:10:02.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:02.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:02.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:02.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:02.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:10:02.999 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:10:03.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:03.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:03.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:03.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:03.464 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:10:03.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:10:04.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:04.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:04.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:04.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:04.395 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:10:04.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:04.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:04.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:04.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:04.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:04.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:04.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:04.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:04.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:04.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:04.651 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:04.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:04.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:09.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:09.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:09.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:09.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:09.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:09.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:09.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:09.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:09.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:09.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:09.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:09.662 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:09.663 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:09.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:09.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:09.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:09.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:09.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:09.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:09.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:09.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:09.666 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:09.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:09.669 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:09.669 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:09.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:09.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:09.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:09.675 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:09.675 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:09.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:10.146 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:10.206 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:10.207 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:10.208 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:10.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:10.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:10.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:10.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:10.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:10:10.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:10:10.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:10:10.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:10:10.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:10:10.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:10:10.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:10.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:10.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:10.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:11.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:10:11.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:10:11.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:11.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:11.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:11.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:12.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:10:12.472 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:10:12.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:12.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:12.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:12.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:12.937 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:10:13.403 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:10:13.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:13.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:13.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:13.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:13.869 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:10:13.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:13.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:13.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:13.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:13.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:13.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:13.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:13.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:13.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:13.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:13.889 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:13.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:13.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:18.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:18.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:18.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:18.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:18.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:18.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:18.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:18.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:18.895 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:18.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:18.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:18.898 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:18.898 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:18.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:18.901 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:18.901 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:18.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:18.901 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:18.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:18.901 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:18.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:18.901 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:18.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:18.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:18.904 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:18.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:18.904 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:18.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:18.904 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:18.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:18.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.909 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:18.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:18.910 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:18.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:18.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:18.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:18.914 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:19.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:19.434 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:19.434 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:19.435 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:19.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:19.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:19.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:19.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:19.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:10:19.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:10:19.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:10:19.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:10:19.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:10:19.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:10:19.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:19.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:19.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:19.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:20.311 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:10:20.777 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:10:20.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:20.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:20.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:20.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:21.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:10:21.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:10:21.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:21.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:21.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:21.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:22.173 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:10:22.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:22.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:22.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:22.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:22.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:22.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:22.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:22.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:22.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:22.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:22.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:22.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:22.538 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:22.538 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=795 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:22.538 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=795 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:22.538 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=795 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:22.538 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=795 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:27.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:27.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:27.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:27.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:27.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:27.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:27.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:27.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:27.550 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:27.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:27.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:27.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:27.552 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:27.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:27.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:27.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:27.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:27.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:27.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:27.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:27.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:27.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:27.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:27.556 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:27.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:27.556 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:27.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:27.556 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:27.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:27.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:27.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:27.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:27.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:27.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:27.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:27.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:27.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:27.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:27.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:27.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:27.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:27.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:27.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:27.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:28.035 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:28.090 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:28.091 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:28.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:28.092 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:28.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:10:28.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:28.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:28.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:28.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:28.965 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:10:29.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:10:29.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:29.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:29.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:29.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:29.896 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:10:30.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:30.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:30.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:30.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:30.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:30.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:30.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:30.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:30.101 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:30.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:30.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:35.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:35.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:35.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:35.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:35.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:35.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:35.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:35.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:35.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:35.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:35.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:35.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:35.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:35.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:35.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:35.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:35.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:35.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:35.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.127 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:35.127 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:35.127 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:35.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.132 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:35.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:35.650 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:35.651 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:35.651 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:35.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:35.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:35.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:35.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:35.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:36.062 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:10:36.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:36.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:36.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:36.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:10:36.994 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:10:37.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:37.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:37.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:37.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:10:37.925 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:10:38.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:38.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:38.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:38.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:10:38.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:38.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:38.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:38.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:38.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:38.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:38.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:38.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:38.689 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:43.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:43.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:43.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:43.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:43.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:43.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:43.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:43.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:43.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:43.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:43.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:43.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:43.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:43.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:43.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:43.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:43.703 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:43.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:43.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:43.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:43.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:43.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:43.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:43.706 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:43.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:43.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:43.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:43.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:43.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:43.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:43.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:43.708 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:43.709 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:43.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:43.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:43.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:43.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:43.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.713 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:43.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:43.713 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:43.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:43.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:43.718 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:44.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:44.238 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:44.239 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:44.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:44.241 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:44.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:44.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:44.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:44.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:44.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:44.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:44.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:44.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:44.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:44.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:44.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:44.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:44.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:44.277 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:44.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:44.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:44.278 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:10:49.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:49.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:49.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:49.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:49.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:49.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:49.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:49.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:49.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:49.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:49.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:49.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:49.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:49.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:49.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:49.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:49.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:49.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:49.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:49.297 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:49.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:49.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:49.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:49.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:49.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:49.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:49.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:49.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:49.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:49.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:49.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:49.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:49.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:49.305 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:49.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:49.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:49.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.310 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:49.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:49.833 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:49.834 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:49.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:49.835 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:49.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:49.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:49.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:49.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:49.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:50.241 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:10:50.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:50.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:50.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:50.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:50.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:10:51.172 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:10:51.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:51.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:51.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:51.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:51.637 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:10:52.102 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:10:52.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:52.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:52.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:52.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:52.568 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:10:52.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:52.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:52.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:52.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:52.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:52.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:52.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:52.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:52.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:52.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:52.873 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:52.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:52.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:57.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:57.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:57.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:57.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:57.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:57.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:57.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:57.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:57.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:57.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:10:57.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:57.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:10:57.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:10:57.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:57.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:10:57.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:10:57.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:57.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:10:57.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:10:57.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:57.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:10:57.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:10:57.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:10:57.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:10:57.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:10:57.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:57.894 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:10:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:10:57.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:10:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:10:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:10:57.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:10:57.895 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:10:57.895 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:10:57.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:10:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:57.900 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:10:58.363 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:10:58.421 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:10:58.421 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:10:58.422 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:10:58.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:58.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:10:58.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:10:58.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:10:58.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:58.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:58.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:10:58.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:10:58.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:10:58.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:10:58.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:10:58.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:10:58.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:10:58.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:10:58.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:10:58.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:10:58.462 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:10:58.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:10:58.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:03.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:03.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:03.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:03.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:03.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:03.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:03.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:03.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:03.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:03.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:03.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:03.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:03.476 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:03.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:03.476 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:03.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:03.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:03.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:03.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:03.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:03.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:03.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:03.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:03.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:03.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:03.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:03.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:03.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:03.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:03.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:03.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:03.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:03.487 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:03.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:03.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:03.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:03.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:03.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:04.015 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:04.016 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:04.017 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:04.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:04.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:04.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:04.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:04.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:04.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:04.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:04.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:04.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:04.026 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:04.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:04.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:09.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:09.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:09.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:09.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:09.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:09.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:09.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:09.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:09.037 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:09.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:09.037 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:09.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:09.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:09.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:09.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:09.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:09.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:09.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:09.045 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:09.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:09.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:09.050 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:09.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:09.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:09.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:09.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:09.518 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:09.576 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:09.577 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:09.578 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:09.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:09.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:09.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:09.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:09.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:09.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:09.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:09.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:09.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:09.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:09.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:09.586 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:14.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:14.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:14.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:14.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:14.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:14.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:14.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:14.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:14.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:14.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:14.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:14.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:14.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:14.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:14.606 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:14.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:14.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:14.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:14.611 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:14.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:14.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:14.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:15.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:15.138 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:15.139 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:15.141 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:15.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:15.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:15.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:15.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:15.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:15.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:15.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:15.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:15.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:15.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:15.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:15.148 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:15.148 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:11:20.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:20.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:20.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:20.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:20.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:20.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:20.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:20.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:20.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:20.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:20.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:20.159 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:20.159 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:20.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:20.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:20.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:20.160 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:20.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:20.160 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:20.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:20.162 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:20.162 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:20.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:20.162 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:20.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:20.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:20.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:20.163 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:20.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:20.165 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:20.165 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:20.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:20.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:20.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:20.166 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:20.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:20.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:20.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:20.168 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:20.169 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:20.169 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:20.169 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:20.174 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:20.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:20.693 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:20.694 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:20.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:20.695 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:20.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:20.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:20.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:20.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:20.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:20.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:20.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:20.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:20.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:20.703 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:20.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:25.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:25.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:25.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:25.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:25.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:25.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:25.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:25.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:25.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:25.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:25.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:25.713 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:25.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:25.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:25.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:25.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:25.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:25.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:25.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:25.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:25.716 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:25.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:25.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:25.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:25.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:25.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:25.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:25.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:25.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:25.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:25.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:25.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:25.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:25.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:25.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:25.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:25.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:25.726 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:25.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:25.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:25.731 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:26.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:26.252 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:26.253 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:26.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:26.254 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:26.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:11:26.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:26.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:26.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:26.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:27.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:11:27.593 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:11:27.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:27.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:27.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:28.059 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:11:28.525 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:11:28.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:28.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:28.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:28.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:28.990 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:11:29.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:11:29.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:11:29.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:11:29.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:11:29.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:11:29.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:11:29.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:11:29.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:11:29.455 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:11:29.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:29.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:29.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:29.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:29.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:11:30.387 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:11:30.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:30.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:30.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:30.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:30.853 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:11:31.319 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:11:31.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:11:31.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:11:31.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:31.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:31.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:31.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:31.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:31.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:31.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:31.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:31.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:31.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:31.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:31.437 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:36.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:36.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:36.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:36.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:36.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:36.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:36.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:36.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:36.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:36.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:36.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:36.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:36.452 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:36.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:36.452 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:36.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:36.453 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:36.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:36.453 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:36.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:36.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:36.455 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:36.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:36.455 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:36.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:36.455 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:36.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:36.456 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:36.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:36.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:36.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:36.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:36.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:36.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:36.458 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:36.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:36.459 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:36.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:36.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:36.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:36.464 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:36.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:36.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:36.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:36.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:36.991 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:36.993 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:36.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:36.994 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:37.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:11:37.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:11:37.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:11:37.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:37.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:37.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:37.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:37.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:37.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:37.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:37.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:37.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:37.025 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:37.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:42.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:42.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:42.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:42.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:42.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:42.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:42.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:42.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:42.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:42.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:42.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:42.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:42.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:42.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:42.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:42.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:42.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:42.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:42.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:42.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:42.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:42.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:42.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:42.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:42.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:42.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:42.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:42.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:42.044 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:42.044 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:42.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:42.044 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:42.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:42.044 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:42.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:42.044 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:42.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:42.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:42.049 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:42.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:42.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:42.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:42.575 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:42.576 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:42.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:42.578 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:42.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:11:42.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:11:42.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:11:42.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:42.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:42.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:42.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:42.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:42.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:42.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:42.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:42.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:42.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:42.609 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:42.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:42.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:47.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:47.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:47.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:47.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:47.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:47.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:47.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:47.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:47.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:47.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:47.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:47.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:47.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:47.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:47.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:47.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:47.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:47.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:47.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:47.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:47.626 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:47.626 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:47.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:47.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:47.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:47.627 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:47.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:47.627 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:47.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:47.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:47.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:47.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:47.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:47.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:47.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:47.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:47.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:47.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:47.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:47.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:47.635 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:47.635 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:47.635 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:47.640 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:48.106 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:48.161 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:48.162 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:48.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:48.163 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:48.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:11:48.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:11:48.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:11:48.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:48.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:48.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:48.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:48.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:48.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:48.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:48.196 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:53.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:53.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:53.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:53.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:53.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:53.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:53.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:53.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:53.203 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:53.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:53.203 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:53.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:53.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:53.208 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:53.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:53.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:53.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:53.210 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:53.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:53.210 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:53.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:53.210 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:53.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:53.210 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:53.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:53.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:53.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:53.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:53.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:53.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:53.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:53.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:53.215 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:53.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:53.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:53.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:53.216 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:53.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:58.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:58.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:58.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:58.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:58.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:58.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:58.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:58.230 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:58.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:11:58.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:11:58.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:11:58.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:11:58.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:58.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:58.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:58.233 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:11:58.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:11:58.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:11:58.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:58.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:11:58.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:11:58.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:58.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:58.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:58.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:11:58.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:11:58.237 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:11:58.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:58.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:11:58.240 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:11:58.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:58.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:11:58.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:11:58.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:11:58.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:11:58.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:11:58.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:58.244 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:11:58.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:11:58.245 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:11:58.245 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:11:58.245 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:11:58.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:11:58.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:11:58.250 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:11:58.716 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:11:58.800 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:11:58.801 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:11:58.802 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:11:58.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:11:58.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:11:58.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:11:58.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:11:58.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:11:58.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:11:58.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:11:58.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:11:58.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:11:58.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:11:58.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:11:58.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:11:58.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:11:58.872 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:11:58.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:11:58.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:03.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:03.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:03.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:03.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:03.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:03.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:03.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:03.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:03.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:12:03.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:12:03.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:12:03.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:03.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:03.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:03.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:12:03.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:03.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:12:03.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:03.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:12:03.889 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:12:03.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:03.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:03.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:03.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:12:03.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:03.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:12:03.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:03.892 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:03.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:12:03.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:12:03.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:12:03.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:12:03.898 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:12:03.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:03.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:12:04.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:12:04.424 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:12:04.425 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:12:04.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:04.426 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:12:04.428 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 03:12:04.428 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 200
2026-04-19 03:12:04.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 03:12:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:12:04.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:05.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:05.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:05.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:05.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:05.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:05.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:12:05.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:12:05.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:06.048 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 03:12:06.048 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 0
2026-04-19 03:12:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 03:12:06.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:06.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:06.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:06.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:06.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:06.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:06.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:06.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:06.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:06.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:06.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:06.054 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:12:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:06.054 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:11.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:11.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:11.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:11.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:11.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:11.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:11.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:11.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:11.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:11.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:11.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:12:11.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:12:11.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:12:11.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:11.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:11.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:11.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:12:11.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:11.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:12:11.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:11.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:12:11.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:12:11.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:11.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:11.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:11.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:12:11.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:11.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:12:11.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:11.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:12:11.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:12:11.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:11.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:11.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:11.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:12:11.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:11.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:12:11.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:11.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:12:11.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:12:11.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:12:11.079 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:11.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:12:11.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:12:11.603 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:12:11.604 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:12:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:11.605 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:12:11.606 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 03:12:11.606 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 200
2026-04-19 03:12:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 03:12:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:12.016 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:12:12.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:12.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:12.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:12.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:12.482 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:12:12.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:12.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:12.947 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:12:13.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] fake_trx.py:382 (BTS@172.18.105.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 03:12:13.225 [INFO] fake_trx.py:385 (BTS@172.18.105.20:5700) Artificial TRXC delay set to 0
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:13.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:13.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:13.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:13.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:13.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:13.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:13.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:13.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:13.231 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:12:13.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:13.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:13.231 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:18.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:18.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:18.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:18.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:18.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:18.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:18.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:18.241 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:18.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:18.241 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:18.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:18.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:12:18.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:18.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:18.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:12:18.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:18.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:12:18.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:12:18.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:18.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:18.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:18.250 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:12:18.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:18.250 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:12:18.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:12:18.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:12:18.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:12:18.256 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:12:18.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:18.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:18.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:12:18.726 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:12:18.781 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:12:18.782 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:12:18.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:18.783 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:12:18.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:18.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:18.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:18.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:18.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:18.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:18.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:18.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:18.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:18.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:18.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:18.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:18.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:18.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:18.815 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:12:18.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:18.815 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.815 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.815 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.815 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.815 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.816 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:18.816 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:23.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:23.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:23.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:23.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:23.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:23.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:23.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:23.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:23.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:23.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:23.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:23.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:23.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:12:23.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:23.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:23.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:12:23.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:23.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:23.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:12:23.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:12:23.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:12:23.840 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:12:23.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:12:23.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:23.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:12:24.311 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:12:24.365 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:12:24.366 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:12:24.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:24.367 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:12:24.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:24.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:24.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:24.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:24.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:24.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:24.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:24.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:24.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:24.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:24.399 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:12:24.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:24.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:24.400 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:12:29.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:12:29.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:12:29.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:29.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:29.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:29.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:29.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:12:29.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:29.412 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:29.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:12:29.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:29.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:12:29.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:12:29.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:29.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:12:29.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:12:29.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:29.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:29.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:12:29.417 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:12:29.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:12:29.417 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:12:29.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:29.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:12:29.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:12:29.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:29.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:12:29.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:12:29.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:12:29.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:12:29.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:12:29.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:12:29.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:12:29.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:12:29.425 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:12:29.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:12:29.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:12:29.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:12:29.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:12:29.948 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:12:29.949 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:12:29.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:29.950 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:12:29.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:29.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:29.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:29.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:29.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:29.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:29.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:29.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:29.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:29.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:29.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:29.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:29.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:30.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:30.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:30.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:30.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:30.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:30.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:30.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:30.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:30.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:30.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:30.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:30.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:30.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:30.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:30.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:30.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:30.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:30.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:12:30.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:30.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:30.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:30.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:30.825 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:12:31.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:12:31.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:31.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:31.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:31.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:31.755 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:12:32.220 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:12:32.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:32.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:32.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:32.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:32.685 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:12:33.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:33.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:33.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:33.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:33.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:33.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:33.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:33.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:33.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:33.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:33.150 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:12:33.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:33.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:33.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:33.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:33.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:33.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:33.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:33.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:33.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:33.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:33.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:33.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:33.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:33.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:33.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:33.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:33.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:33.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:33.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:33.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:33.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:12:34.080 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:12:34.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:12:34.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:12:34.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:12:34.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:12:34.546 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:12:35.011 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:12:35.476 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:12:35.941 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:12:36.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:36.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:36.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:36.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:36.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:36.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:36.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:36.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:36.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:36.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:36.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:36.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:36.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:36.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:36.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:36.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:36.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:36.406 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:12:36.870 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:12:37.337 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:12:37.802 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:12:38.268 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:12:38.734 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:12:39.200 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:12:39.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:39.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:39.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:39.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:39.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:39.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:39.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:39.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:39.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:39.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:39.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:39.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:39.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:39.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:39.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:39.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:39.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:39.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:39.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:39.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:39.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:39.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:39.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:39.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:39.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:39.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:39.665 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:12:40.128 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:12:40.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:40.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:40.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:40.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:40.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:40.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:40.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:40.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:40.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:40.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:40.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:40.365 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:40.365 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:40.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:40.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:40.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:40.427 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:40.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:40.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:40.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:40.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:40.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:40.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:40.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:40.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:40.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:40.456 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:40.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:40.593 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:12:41.060 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:12:41.525 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:12:41.991 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:12:42.456 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:12:42.921 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:12:43.386 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:12:43.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:43.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:43.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:43.460 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:43.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:43.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:43.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:43.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:43.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:43.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:43.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:43.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:43.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:43.528 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:43.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:43.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:43.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:43.589 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:43.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:43.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:43.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:43.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:43.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:43.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:43.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:43.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:43.624 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:43.624 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:43.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:43.852 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:12:44.316 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:12:44.781 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:12:45.246 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:12:45.711 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:12:46.176 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:12:46.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:46.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:46.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:46.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:46.628 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:46.642 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:12:46.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:46.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:46.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:46.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:46.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:46.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:46.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:46.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:46.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:46.689 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:46.689 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:46.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:46.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:47.115 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:12:47.580 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:12:48.044 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:12:48.508 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:12:48.973 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:12:49.438 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:12:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:49.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:49.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:49.693 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:49.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:49.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:49.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:49.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:49.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:49.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:49.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:49.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:49.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:49.722 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:49.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:49.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:49.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:49.802 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:49.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:49.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:49.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:49.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:49.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:49.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:49.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:49.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:49.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:12:49.861 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:12:49.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:49.903 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:12:50.367 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:12:50.832 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:12:51.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:51.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:51.007 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:12:51.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:51.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:51.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:51.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:51.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:51.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:51.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:51.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:51.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:51.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:51.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:51.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:51.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:51.297 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:12:51.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:51.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:51.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:51.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:51.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:51.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:51.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:51.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:51.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:51.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:51.763 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:12:52.228 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:12:52.693 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:12:53.158 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:12:53.623 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:12:54.088 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:12:54.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:54.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:54.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:54.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:54.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:54.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:54.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:54.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:54.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:54.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:54.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:54.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:54.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:54.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:54.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:54.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:54.553 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:12:54.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:54.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:54.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:54.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:54.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:54.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:54.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:54.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:54.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:54.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:54.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:55.018 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:12:55.483 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:12:55.948 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:12:56.413 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:12:56.878 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:12:57.343 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:12:57.811 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:12:58.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:58.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:58.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:58.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:58.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:12:58.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:12:58.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:12:58.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:58.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:58.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:58.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:12:58.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:12:58.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:12:58.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:12:58.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:12:58.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:58.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:12:58.543 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:12:59.008 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:12:59.472 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:12:59.938 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:13:00.403 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:13:00.868 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:13:01.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:01.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:01.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:01.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:01.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:01.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:01.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:01.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:01.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:01.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:01.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:01.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:01.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:01.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:01.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:01.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:01.333 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:13:01.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:01.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:01.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:01.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:01.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:01.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:01.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:01.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:01.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:01.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:01.798 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:13:02.263 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:13:02.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:02.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:02.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:02.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:02.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:02.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:02.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:02.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:02.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:02.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:02.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:02.359 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:02.359 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:02.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:02.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:02.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:02.651 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:02.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:02.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:02.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:02.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:02.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:02.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:02.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:02.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:02.686 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:02.686 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:02.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:02.728 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:13:03.193 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:13:03.658 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:13:04.123 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:13:04.589 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:13:05.054 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:13:05.519 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:13:05.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:05.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:05.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:05.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:05.690 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:05.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:05.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:05.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:05.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:05.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:05.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:05.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:05.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:05.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:05.756 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:05.756 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:05.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:05.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:05.984 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:13:06.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:06.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:06.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:06.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:06.371 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:06.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:06.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:06.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:06.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:06.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:06.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:06.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:06.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:06.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:06.406 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:06.406 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:06.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:06.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:06.449 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:13:06.914 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:13:07.379 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:13:07.844 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:13:08.309 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:13:08.773 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:13:09.238 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:13:09.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:09.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:09.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:09.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:09.409 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:09.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:09.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:09.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:09.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:09.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:09.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:09.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:09.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:09.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:09.475 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:09.475 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:09.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:09.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:09.704 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:13:10.169 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:13:10.635 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:13:11.100 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:13:11.566 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:13:12.032 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:13:12.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:12.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:12.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:12.479 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:12.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:12.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:12.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:12.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:12.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:12.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:12.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:12.498 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:13:12.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:12.547 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:12.548 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:12.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:12.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:12.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:12.648 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:12.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:12.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:12.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:12.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:12.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:12.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:12.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:12.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:12.687 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:12.687 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:12.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:12.964 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:13:13.430 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:13:13.896 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:13:14.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:14.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:14.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:14.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:14.347 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:14.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:14.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:14.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:14.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:14.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:14.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:14.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:14.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:14.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:14.354 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:13:14.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:19.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:19.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:19.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:19.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:19.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:19.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:19.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:19.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:19.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:19.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:19.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:13:19.368 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:13:19.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:13:19.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:19.369 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:19.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:19.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:13:19.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:19.369 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:13:19.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:19.371 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:13:19.371 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:13:19.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:19.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:19.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:19.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:13:19.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:19.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:13:19.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:19.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:13:19.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:13:19.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:19.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:19.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:19.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:13:19.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:19.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:13:19.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:13:19.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:13:19.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:13:19.380 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:19.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:19.382 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:24.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:24.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:24.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:24.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:24.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:24.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:24.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:24.392 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:13:24.394 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:13:24.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:13:24.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:24.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:24.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:24.394 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:13:24.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:24.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:13:24.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:24.397 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:13:24.397 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:13:24.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:24.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:24.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:24.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:13:24.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:24.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:13:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:24.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:24.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:13:24.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:13:24.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:13:24.405 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:13:24.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:24.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:13:24.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:13:24.933 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:13:24.934 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:13:24.935 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:13:24.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:24.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:24.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:24.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:24.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:24.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:24.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:24.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:24.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:24.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:24.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:24.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:24.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:24.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:25.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:25.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:25.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:25.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:25.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.064 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:25.064 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:13:25.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.153 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:25.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:25.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:25.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:25.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:25.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:25.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:25.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:25.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:25.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:25.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:25.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:25.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:25.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:13:25.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:25.349 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:25.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:25.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:25.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:25.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:25.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:25.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:25.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:25.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:25.421 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:25.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:25.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:25.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:25.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:25.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:25.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:25.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:25.427 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:13:25.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:25.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:30.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:30.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:30.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:30.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:30.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:30.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:30.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:30.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:30.438 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:30.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:30.438 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:13:30.440 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:13:30.441 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:13:30.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:30.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:30.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:30.441 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:13:30.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:30.441 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:13:30.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:30.443 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:13:30.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:13:30.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:30.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:30.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:30.444 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:13:30.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:30.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:13:30.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:30.446 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:13:30.446 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:13:30.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:30.446 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:30.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:30.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:13:30.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:30.446 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:13:30.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:13:30.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:13:30.451 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:13:30.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:30.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:30.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:13:30.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:13:30.976 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:13:30.977 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:13:30.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:30.978 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:13:30.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:30.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:30.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:30.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:30.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:30.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:30.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:30.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:31.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:31.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:31.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:31.387 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:13:31.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:31.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:31.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:31.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:31.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:31.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:31.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:31.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:31.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:31.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:31.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:31.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:31.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:31.433 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:31.433 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:13:31.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:31.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:31.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:31.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:31.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:31.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:31.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:13:32.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:32.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:32.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:32.108 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:32.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:32.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:32.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:32.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:32.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:32.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:32.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:32.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:32.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:32.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:32.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:32.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:32.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:32.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:32.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:32.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:32.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:32.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:32.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:32.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:32.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:32.323 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:32.323 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:32.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.385 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:13:32.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:32.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:32.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:32.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:32.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:32.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:32.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:32.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:32.777 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:32.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:32.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:32.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:32.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:32.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:32.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:32.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:32.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:32.783 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:13:32.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:32.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:32.783 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:13:37.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:37.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:37.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:37.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:37.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:37.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:37.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:37.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:37.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:37.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:37.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:37.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:37.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:13:37.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:37.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:13:37.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:13:37.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:37.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:37.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:37.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:13:37.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:37.790 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:13:37.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:37.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:37.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:13:37.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:13:37.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:13:37.793 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:13:37.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:37.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:37.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:13:38.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:13:38.306 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:13:38.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:38.306 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:13:38.307 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:13:38.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:38.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:38.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:38.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:38.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:38.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:38.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:38.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:38.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:38.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:38.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:38.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:38.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:38.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:38.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:38.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:38.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:38.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:38.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:38.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:38.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:38.544 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:38.544 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:13:38.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:13:38.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:38.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:38.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:38.787 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:38.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:38.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:38.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:38.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:38.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:38.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:38.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:38.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:38.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:38.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:38.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:38.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:38.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:38.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:38.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:38.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:39.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:39.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:39.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:39.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:39.191 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:13:39.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:39.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:39.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:39.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:39.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:39.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:39.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:39.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:39.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:13:39.657 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:39.657 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:39.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:39.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:39.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:39.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:39.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:39.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:40.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:40.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:40.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:40.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:40.039 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:40.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:40.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:40.041 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:13:45.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:45.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:45.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:45.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:45.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:45.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:45.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:45.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:45.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:45.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:45.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:13:45.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:13:45.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:13:45.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:45.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:45.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:13:45.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:45.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:13:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:45.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:13:45.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:13:45.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:45.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:45.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:45.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:13:45.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:45.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:13:45.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:45.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:13:45.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:13:45.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:45.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:45.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:45.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:13:45.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:45.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:13:45.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:45.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:13:45.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:13:45.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:13:45.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:13:45.069 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:13:45.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:45.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:45.074 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:13:45.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:13:45.594 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:13:45.595 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:13:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:45.596 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:13:45.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:45.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:45.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:45.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:45.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:45.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:45.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:45.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:45.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:45.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:45.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:45.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:45.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:45.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:45.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:45.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:45.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:45.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:45.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:45.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:45.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:45.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:45.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:45.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:45.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:45.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:45.824 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:45.824 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:13:45.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:45.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.004 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:13:46.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:46.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:46.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:46.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:46.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:46.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:46.100 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:46.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:46.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:46.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:46.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:46.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:46.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:46.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:46.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:46.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:46.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:46.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:46.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:46.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:46.467 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:13:46.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:46.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:46.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:46.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:46.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:46.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:46.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:46.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:46.512 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:46.512 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:46.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:46.931 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:13:47.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:47.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:47.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:47.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:47.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:47.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:47.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:47.315 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:47.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:47.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:47.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:47.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:47.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:47.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:47.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:47.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:47.319 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:13:47.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:47.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:52.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:13:52.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:13:52.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:52.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:52.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:52.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:52.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:13:52.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:52.330 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:52.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:13:52.330 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:13:52.332 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:13:52.333 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:13:52.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:52.333 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:52.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:13:52.333 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:13:52.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:13:52.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:13:52.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:52.336 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:13:52.336 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:13:52.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:52.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:13:52.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:13:52.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:13:52.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:13:52.343 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:13:52.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:13:52.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:13:52.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:13:52.866 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:13:52.867 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:13:52.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:52.868 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:13:52.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:52.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:52.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:52.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:52.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:52.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:52.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:52.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:52.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:52.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:52.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:52.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:52.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:53.277 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:13:53.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:53.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:53.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:53.742 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:13:54.207 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:13:54.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:54.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:54.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:54.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:13:54.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:54.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:54.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:54.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:54.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:54.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:54.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:54.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:54.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:54.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:54.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:54.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:54.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:54.761 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:54.761 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:13:54.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:54.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:55.137 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:13:55.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:55.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:55.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:55.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:55.600 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:13:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:13:56.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:56.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:56.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:56.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:56.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:13:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:56.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:56.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:56.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:56.915 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:13:56.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:56.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:56.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:56.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:56.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:56.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:56.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:56.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:56.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:56.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:56.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:56.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:56.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:13:57.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:13:57.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:13:57.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:13:57.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:13:57.517 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:13:57.982 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:13:58.445 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:13:58.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:58.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:58.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:58.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:58.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:13:58.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:13:58.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:13:58.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:58.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:13:58.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:13:58.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:13:58.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:13:58.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:13:58.533 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:13:58.533 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:13:58.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:58.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:13:58.908 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:13:59.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:13:59.835 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:14:00.298 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:14:00.760 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:14:01.223 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:14:01.686 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:14:02.148 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:14:02.611 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:14:03.086 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:14:03.552 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:14:04.092 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:14:04.555 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:14:05.017 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:14:05.480 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:14:05.942 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:14:06.404 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:14:06.867 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:14:07.332 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:14:07.796 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:14:08.260 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:14:08.724 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:14:09.187 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:14:09.650 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:14:10.114 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:14:10.579 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:14:11.043 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:14:11.506 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:14:11.971 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:14:12.825 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:14:13.288 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:14:13.751 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:14:14.215 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:14:14.678 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:14:15.141 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:14:15.604 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:14:16.068 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:14:16.531 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:14:16.995 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:14:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:14:17.920 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:14:18.383 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:14:18.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:18.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:18.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:18.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:18.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:14:18.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:14:18.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:14:18.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:14:18.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:14:18.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:14:18.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:18.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:18.487 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:14:18.487 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:14:23.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:14:23.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:14:23.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:14:23.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:14:23.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:14:23.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:14:23.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:14:23.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:14:23.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:23.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:14:23.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:14:23.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:14:23.498 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:14:23.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:14:23.500 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:14:23.500 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:14:23.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:14:23.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:14:23.502 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:14:23.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:14:23.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:14:23.505 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:14:23.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:23.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:23.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:23.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:23.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:14:23.974 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:14:24.018 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:14:24.018 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:14:24.018 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:14:24.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:24.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:24.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:24.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:24.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:24.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:24.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:24.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:24.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:24.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:24.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:24.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:24.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:24.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:24.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:14:24.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:24.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:24.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:24.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:24.899 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:14:25.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:14:25.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:25.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:25.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:25.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:25.825 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:14:25.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:25.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:25.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:25.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:25.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:25.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:25.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:25.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:25.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:25.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:25.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:25.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:25.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:25.912 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:14:25.912 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:14:25.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:25.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:26.288 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:14:26.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:26.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:26.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:26.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:26.754 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:14:27.218 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:14:27.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:27.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:27.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:27.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:27.680 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:14:28.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:28.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:28.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:28.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:28.002 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:14:28.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:28.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:28.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:28.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:28.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:28.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:28.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:28.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:28.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:28.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:28.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:28.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:28.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:28.143 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:14:28.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:28.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:28.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:28.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:28.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:14:29.068 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:14:29.530 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:14:29.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:29.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:29.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:29.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:29.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:29.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:29.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:29.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:29.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:29.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:29.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:29.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:29.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:29.618 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:14:29.618 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:14:29.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:29.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:29.993 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:14:30.456 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:14:30.918 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:14:31.693 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:14:32.557 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:14:33.021 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:14:33.483 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:14:33.946 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:14:34.409 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:14:34.872 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:14:35.336 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:14:35.799 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:14:36.262 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:14:36.725 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:14:37.189 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:14:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:14:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:14:38.577 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:14:39.039 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:14:39.502 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:14:39.964 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:14:40.427 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:14:40.890 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:14:41.352 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:14:41.815 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:14:42.277 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:14:42.740 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:14:43.203 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:14:43.665 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:14:44.128 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:14:44.591 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:14:45.054 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:14:45.517 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:14:45.982 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:14:46.448 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:14:46.914 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:14:47.473 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:14:47.936 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:14:48.398 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:14:48.860 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:14:49.323 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:14:49.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:49.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:49.571 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:14:49.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:49.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:49.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:49.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:49.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:14:49.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:14:49.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:14:49.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:14:49.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:14:49.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:14:49.573 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:14:54.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:14:54.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:14:54.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:14:54.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:14:54.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:14:54.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:14:54.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:14:54.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:14:54.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:54.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:14:54.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:14:54.586 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:14:54.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:14:54.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:14:54.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:14:54.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:14:54.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:14:54.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:14:54.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:14:54.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:54.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:14:54.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:14:54.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:14:54.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:14:54.596 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:14:54.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:14:54.597 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:14:54.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:14:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:14:54.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:14:55.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:14:55.122 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:14:55.123 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:14:55.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:55.124 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:14:55.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:55.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:55.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:55.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:55.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:55.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:55.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:55.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:55.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:55.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:55.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:55.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:55.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:55.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:55.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:55.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:55.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:55.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:55.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:55.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:55.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:55.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:55.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:55.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:55.529 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:14:55.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:55.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:55.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:55.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:55.994 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:14:56.459 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:14:56.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:56.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:56.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:56.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:56.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:14:57.388 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:14:57.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:57.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:57.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:57.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:57.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:57.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:57.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:57.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:57.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:57.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:57.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:57.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:57.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:57.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:57.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:57.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:57.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:57.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:57.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:57.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:57.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:57.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:57.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:57.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:57.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:57.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:57.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:57.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:57.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:57.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:57.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:57.853 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:14:58.318 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:14:58.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:58.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:58.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:58.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:58.782 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:14:59.247 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:14:59.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:14:59.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:14:59.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:14:59.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:14:59.711 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:14:59.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:59.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:59.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:59.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:59.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:14:59.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:14:59.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:14:59.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:59.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:14:59.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:14:59.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:14:59.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:14:59.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:14:59.851 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:14:59.851 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:14:59.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:14:59.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:00.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:00.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:00.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:00.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:00.119 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:00.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:00.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:00.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:00.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:00.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:00.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:00.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:00.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:00.175 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:15:00.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:00.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:00.182 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:00.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:00.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:00.640 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:15:01.103 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:15:01.567 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:15:02.030 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:15:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:02.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:02.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:02.403 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:02.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:02.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:02.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:02.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:02.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:02.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:02.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:02.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:02.448 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:02.448 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:02.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:15:02.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:02.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:02.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:02.717 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:02.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:02.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:02.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:02.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:02.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:02.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:02.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:02.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:02.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:02.776 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:02.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:02.956 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:15:03.419 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:15:03.882 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:15:04.345 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:15:04.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:04.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:04.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:04.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:04.766 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:04.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:04.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:04.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:04.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:04.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:04.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:04.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:04.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:04.808 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:15:04.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:04.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:04.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:04.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:04.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:05.271 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:15:05.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:05.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:05.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:05.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:05.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:05.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:05.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:05.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:05.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:05.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:05.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:05.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:05.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:05.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:05.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:05.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:05.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:05.734 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:15:06.197 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:15:06.660 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:15:07.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:07.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:07.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:07.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:07.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:07.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:07.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:07.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:07.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:07.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:07.123 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:15:07.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:07.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:07.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:07.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.586 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:15:07.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:07.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:07.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:07.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:07.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:07.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:07.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:07.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:07.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:07.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:07.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:07.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:07.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:07.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:07.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:08.048 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:15:08.511 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:15:08.974 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:15:09.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:09.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:09.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:09.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:09.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:09.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:09.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:09.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:09.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:09.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:09.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:09.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:09.437 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:15:09.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:09.440 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:09.440 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:09.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:09.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:09.899 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:15:10.362 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:15:10.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:10.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:10.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:10.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:10.677 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:10.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:10.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:10.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:10.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:10.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:10.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:10.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:10.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:10.734 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:10.734 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:10.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:10.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:10.825 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:15:11.287 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:15:11.750 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:15:12.212 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:15:12.674 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:15:13.137 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:15:13.600 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:15:14.063 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:15:14.526 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:15:14.989 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:15:15.451 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:15:15.914 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:15:16.376 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:15:16.840 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:15:17.303 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:15:17.766 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:15:18.229 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:15:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:15:19.155 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:15:19.619 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:15:20.082 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:15:20.545 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:15:21.009 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:15:21.472 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:15:21.935 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:15:22.398 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:15:22.863 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:15:23.328 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:15:23.793 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:15:24.258 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:15:24.723 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:15:25.188 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:15:25.651 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:15:26.115 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:15:26.578 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:15:27.041 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:15:27.504 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:15:27.966 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:15:28.430 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:15:28.893 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:15:29.356 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:15:29.820 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:15:30.292 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:15:30.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:30.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:30.688 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:30.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:30.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:30.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:30.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:30.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:30.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:30.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:30.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:30.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:30.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:30.692 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:30.692 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=7943 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:35.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:35.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:35.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:35.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:35.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:35.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:35.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:35.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:35.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:35.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:15:35.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:35.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:15:35.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:15:35.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:35.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:35.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:35.703 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:15:35.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:35.703 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:15:35.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:35.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:35.704 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:15:35.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:15:35.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:15:35.706 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:15:35.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:35.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:35.707 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:15:35.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:40.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:40.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:40.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:40.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:40.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:40.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:40.714 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:40.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:40.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:15:40.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:15:40.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:15:40.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:40.715 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:40.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:40.715 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:15:40.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:40.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:15:40.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:40.716 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:15:40.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:15:40.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:40.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:40.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:40.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:15:40.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:40.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:15:40.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:40.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:40.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:15:40.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:15:40.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:15:40.720 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:15:40.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:40.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:15:41.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:15:41.235 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:15:41.235 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:15:41.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.236 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:15:41.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:41.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:41.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:41.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:41.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:41.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:41.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:41.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:41.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:41.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:41.472 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:41.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.550 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:41.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:41.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:41.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:41.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.614 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:41.614 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:41.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.655 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:15:41.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.698 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:41.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:41.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:41.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:41.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:41.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:41.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:41.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:41.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:41.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:41.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:41.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:41.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:41.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:41.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:41.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:41.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:42.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:42.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:42.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:42.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:42.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:42.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:42.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:42.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:42.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:42.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:15:42.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:42.134 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:42.134 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:42.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:42.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:42.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:42.205 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:42.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:42.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:42.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:42.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:42.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:42.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:42.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:42.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:42.265 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:42.265 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:42.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:42.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:42.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:42.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:42.446 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:42.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:42.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:42.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:42.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:42.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:42.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:42.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:42.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:42.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:42.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:42.460 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:42.461 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:47.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:47.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:47.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:47.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:47.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:47.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:47.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:47.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:47.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:47.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:47.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:15:47.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:47.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:47.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:15:47.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:47.462 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:15:47.462 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:15:47.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:47.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:47.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:47.463 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:15:47.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:47.463 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:15:47.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:47.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:15:47.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:15:47.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:15:47.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:15:47.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:15:47.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:15:47.465 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:15:47.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:47.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:15:47.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:15:47.979 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:15:47.980 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:15:47.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:47.980 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:15:47.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:47.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:47.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:47.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:47.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:47.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:47.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:47.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:48.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:48.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:48.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:48.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.398 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:15:48.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:48.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:48.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:48.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:48.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:48.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:48.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:48.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:48.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:48.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:48.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:48.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:48.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:48.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:48.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:48.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:48.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:48.860 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:15:48.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:48.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:48.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:48.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:48.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:48.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:48.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:48.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:48.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:48.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:48.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:48.902 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:48.902 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:48.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:48.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:49.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:15:49.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:49.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:49.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:49.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:49.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:49.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:49.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:49.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:49.588 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:49.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:49.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:49.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:49.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:49.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:49.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:49.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:49.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:49.602 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:49.602 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:49.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:49.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:49.810 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:15:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:50.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:50.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:50.084 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:50.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:50.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:50.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:50.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:50.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:50.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:50.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:50.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:50.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:50.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:50.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:50.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:50.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:50.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:50.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:50.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:50.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:50.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:50.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:50.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:50.272 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:15:50.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:50.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:50.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:50.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:50.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:50.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:50.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:50.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:50.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:50.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:50.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:50.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:50.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:50.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:50.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:50.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:50.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:50.736 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:15:50.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:50.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:50.742 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:50.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:50.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:51.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:51.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:51.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:51.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:51.124 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:51.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:51.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:51.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:51.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:51.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:51.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:51.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:51.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:51.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:51.152 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:51.152 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:51.198 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:15:51.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:51.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:51.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:51.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:51.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:51.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:51.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:51.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:51.584 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:51.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:51.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:51.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:51.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:51.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:51.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:51.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:51.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:51.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:51.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:51.588 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:51.588 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=903 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:15:56.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:56.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:56.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:56.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:56.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:56.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:56.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:56.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:56.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:56.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:15:56.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:56.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:15:56.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:15:56.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:56.597 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:15:56.597 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:15:56.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:56.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:15:56.599 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:15:56.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:56.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:15:56.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:56.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:15:56.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:15:56.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:15:56.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:15:56.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:15:56.603 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:15:56.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:15:56.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:15:56.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:15:56.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:15:57.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:15:57.116 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:15:57.117 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:15:57.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.117 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:15:57.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:57.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:57.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:57.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:57.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:57.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:57.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:57.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:57.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:57.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.354 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:57.354 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:57.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.409 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:57.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:57.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:57.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:57.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.448 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:57.448 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:15:57.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.528 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:57.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:57.536 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:15:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:57.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:57.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:57.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:57.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:57.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:57.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:57.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:57.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:57.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:57.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:57.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:57.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:57.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:57.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:57.999 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:15:58.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:58.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:58.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:58.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:58.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:58.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:58.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:58.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:58.042 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:58.042 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:58.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:15:58.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:58.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:58.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:58.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:58.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:58.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:58.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:58.608 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:58.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:58.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:58.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:15:58.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:15:58.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:15:58.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:15:58.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:15:58.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:58.641 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:15:58.641 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:15:58.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.925 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:15:58.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:15:58.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:15:58.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:15:58.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:15:58.937 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:15:58.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:15:58.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:15:58.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:15:58.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:15:58.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:15:58.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:15:58.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:15:58.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:15:58.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:15:58.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:15:58.941 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:03.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:03.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:03.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:03.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:03.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:03.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:03.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:03.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:03.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:03.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:03.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:03.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:03.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:03.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:03.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:03.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:03.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:03.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:03.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:03.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:03.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:03.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:03.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:03.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:03.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:03.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:03.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:03.951 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:03.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:03.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:04.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:04.466 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:04.467 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:04.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:04.468 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:04.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:04.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:04.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:04.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:04.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:04.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:04.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:04.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:04.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:04.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:04.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:04.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:04.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:04.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:04.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:04.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:04.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:04.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:05.350 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:05.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:05.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:05.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:05.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:05.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:05.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:05.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:05.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:05.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:05.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:05.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:05.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:05.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:05.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:05.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:05.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:05.816 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:05.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:05.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:05.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:05.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:06.280 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:16:06.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:06.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:06.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:06.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:06.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:06.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:06.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:06.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:06.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:06.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:06.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:06.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:06.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:06.370 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:06.370 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:06.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:06.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:06.743 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:16:06.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:06.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:07.205 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:16:07.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:07.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:07.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:07.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:07.495 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:07.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:07.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:07.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:07.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:07.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:07.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:07.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:07.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:07.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:07.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:07.528 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:07.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:07.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:07.668 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:16:07.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:07.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:07.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:07.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:08.130 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:16:08.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:08.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:08.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:08.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:08.442 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:08.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:08.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:08.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:08.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:08.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:08.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:08.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:08.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:08.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:08.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:08.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:08.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:08.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:08.593 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:16:08.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:08.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:08.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:08.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:09.055 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:16:09.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:09.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:09.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:09.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:09.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:09.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:09.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:09.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:09.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:09.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:09.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:09.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:09.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:09.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:09.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:09.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:09.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:09.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:16:09.981 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:16:10.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:10.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:10.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:10.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:10.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:10.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:10.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:10.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:10.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:10.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:10.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:10.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:10.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:10.072 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:10.072 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:10.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:10.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:10.443 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:16:10.912 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:16:11.377 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:16:11.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:11.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:11.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:11.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:11.824 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:11.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:11.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:11.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:11.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:11.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:11.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:11.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:11.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:11.839 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:16:11.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:11.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:11.843 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:11.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:11.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:16:12.784 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:16:13.250 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:16:13.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:13.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:13.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:13.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:13.697 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:13.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:13.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:13.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:13.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:13.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:13.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:13.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:13.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:13.701 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:13.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:13.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:18.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:18.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:18.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:18.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:18.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:18.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:18.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:18.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:18.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:18.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:18.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:18.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:18.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:18.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:18.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:18.710 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:18.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:18.710 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:18.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:18.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:18.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:18.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:18.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:18.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:18.714 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:18.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:18.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:18.719 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:19.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:19.292 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:19.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.292 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:19.293 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:19.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:19.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:19.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:19.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:19.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:19.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:19.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:19.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:19.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:19.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:19.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:19.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:19.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:19.462 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:19.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.646 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:19.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.698 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:19.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:19.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:19.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:19.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:19.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:19.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:19.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:19.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:19.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:19.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:19.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:19.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:19.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:19.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:19.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:19.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:19.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:19.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:19.877 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:19.877 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:19.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:19.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:20.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:20.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:20.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:20.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:20.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:20.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:20.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:20.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:20.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:20.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:20.774 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:20.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:20.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:20.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:20.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:20.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:20.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:20.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:20.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:20.778 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:20.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:20.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:20.778 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:25.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:25.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:25.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:25.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:25.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:25.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:25.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:25.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:25.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:25.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:25.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:25.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:25.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:25.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:25.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:25.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:25.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:25.786 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:25.786 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:25.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:25.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:25.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:25.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:25.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:25.787 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:25.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:25.789 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:25.789 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:25.789 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:25.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:25.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:26.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:26.300 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:26.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.301 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:26.302 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:26.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:26.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:26.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:26.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:26.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:26.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:26.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:26.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:26.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:26.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:26.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:26.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.491 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:26.491 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:26.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.633 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:26.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:26.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:26.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:26.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:26.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:26.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:26.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:26.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.719 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:26.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:26.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:26.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:26.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:26.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:26.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:26.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:26.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:26.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:26.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:26.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:26.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:26.952 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:26.952 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:26.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:26.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:27.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:27.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:27.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:27.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:27.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:27.791 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:27.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:27.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:27.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:27.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:27.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:27.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:27.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:27.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:27.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:27.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:27.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:27.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:27.794 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:27.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:27.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:27.794 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:32.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:32.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:32.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:32.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:32.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:32.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:32.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:32.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:32.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:32.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:32.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:32.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:32.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:32.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:32.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:32.806 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:32.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:32.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:32.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:32.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:32.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:32.810 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:32.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:33.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:33.323 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:33.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.324 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:33.324 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:33.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:33.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:33.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:33.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:33.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:33.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:33.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:33.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:33.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:33.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:33.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:33.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:33.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.514 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:33.514 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:33.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.656 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:33.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:33.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:33.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:33.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:33.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:33.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:33.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:33.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:33.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:33.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:33.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:33.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:33.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:33.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:33.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:33.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:33.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:33.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:33.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:33.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:33.975 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:33.975 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:33.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:33.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:34.204 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:34.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:34.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:34.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:34.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:34.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:34.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:34.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:34.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:34.815 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:34.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:34.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:34.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:34.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:34.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:34.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:34.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:34.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:34.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:34.817 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:34.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:34.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:34.818 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=443 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:16:39.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:39.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:39.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:39.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:39.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:39.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:39.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:39.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:39.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:39.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:39.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:39.830 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:39.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:39.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:39.831 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:39.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:39.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:39.833 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:39.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:39.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:39.835 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:39.835 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:39.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:39.840 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:40.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:40.348 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:40.349 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:40.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.349 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:40.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:40.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:40.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:40.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:40.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:40.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:40.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:40.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:40.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:40.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:40.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:40.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:40.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:40.540 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:40.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.682 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:40.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:40.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:40.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:40.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:40.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:40.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:40.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:40.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.769 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:40.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:40.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:40.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:40.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:40.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:40.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:40.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:40.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:40.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:41.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:41.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:41.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:41.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:41.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:41.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:41.048 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:41.048 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:41.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:41.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:41.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:41.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:41.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:41.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:41.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:41.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:41.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:41.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:41.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:41.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:41.841 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:41.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:41.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:41.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:41.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:41.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:41.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:41.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:41.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:41.845 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:41.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:41.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:46.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:46.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:46.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:46.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:46.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:46.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:46.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:46.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:46.851 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:46.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:46.851 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:46.852 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:46.852 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:46.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:46.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:46.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:46.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:46.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:46.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:46.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:46.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:46.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:46.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:46.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:46.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:46.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:46.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:46.857 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:46.858 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:46.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:46.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:47.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:47.372 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:47.372 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:47.373 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:47.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:47.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:47.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:47.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:47.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:47.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:47.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:47.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:47.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:47.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:47.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:47.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:47.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:47.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:47.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:47.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:47.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:47.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:47.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:47.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:47.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:47.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:47.746 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:47.746 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:47.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:47.790 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:47.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:47.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:47.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:47.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:48.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:48.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:48.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:48.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:48.238 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:48.253 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:48.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:48.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:48.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:48.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:48.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:48.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:48.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:48.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:48.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:48.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:48.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:48.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:48.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:48.716 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:48.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:48.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:48.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:48.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:49.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:16:49.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:49.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:49.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:49.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:49.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:49.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:49.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:49.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:49.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:49.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:49.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:49.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:49.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:49.362 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:49.362 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:49.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:49.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:49.643 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:16:49.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:49.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:49.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:49.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:50.109 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:16:50.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:16:50.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:50.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:50.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:50.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:51.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:16:51.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:51.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:51.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:51.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:51.354 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:51.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:51.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:51.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:51.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:51.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:51.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:51.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:51.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:51.360 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:16:51.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:51.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:56.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:16:56.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:16:56.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:56.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:56.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:56.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:56.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:16:56.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:56.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:56.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:16:56.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:56.363 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:16:56.363 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:16:56.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:56.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:16:56.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:16:56.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:56.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:16:56.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:16:56.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:56.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:16:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:16:56.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:16:56.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:16:56.369 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:16:56.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:16:56.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:16:56.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:16:56.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:16:56.884 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:16:56.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:56.885 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:16:56.885 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:16:56.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:56.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:56.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:56.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:56.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:56.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:56.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:56.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:56.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:56.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:56.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:56.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:56.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:57.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:57.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:57.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:57.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:57.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:57.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:57.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:57.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:57.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:57.302 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:16:57.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:57.306 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:57.306 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:16:57.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:57.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:57.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:57.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:16:57.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:57.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:57.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:57.773 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:16:57.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:57.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:57.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:57.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:57.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:57.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:57.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:57.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:57.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:57.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:57.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:58.228 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:16:58.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:58.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:58.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:58.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:58.692 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:16:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:58.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:58.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:58.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:58.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:16:58.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:16:58.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:16:58.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:58.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:16:58.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:16:58.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:16:58.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:16:58.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:16:58.874 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:16:58.874 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:16:58.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:58.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:16:59.155 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:16:59.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:16:59.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:16:59.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:16:59.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:16:59.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:17:00.081 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:17:00.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:00.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:00.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:00.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:00.544 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:17:00.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:00.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:00.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:00.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:00.856 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:00.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:00.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:00.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:00.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:00.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:00.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:00.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:00.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:00.859 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:00.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:00.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:00.859 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=989 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:05.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:05.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:05.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:05.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:05.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:05.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:05.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:05.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:05.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:05.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:05.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:05.865 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:05.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:05.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:05.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:05.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:05.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:05.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:05.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:05.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.869 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:05.869 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:05.869 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:05.870 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:05.874 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:17:06.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:17:06.386 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:17:06.387 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:17:06.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:06.388 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:17:06.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:06.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:06.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:06.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:06.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:06.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:06.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:06.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:06.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:06.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:06.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:06.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:06.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:06.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:06.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:06.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:06.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:06.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:06.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:06.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:06.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:06.763 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:06.763 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:17:06.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:06.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:17:06.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:06.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:06.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:06.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:07.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:07.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:07.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:07.258 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:07.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:07.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:07.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:07.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:07.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:07.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:07.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:07.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:07.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:17:07.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:07.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:07.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:07.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:07.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:07.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:17:07.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:08.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:08.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:08.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:08.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:17:08.690 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:17:08.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:08.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:08.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:08.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:08.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:08.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:08.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:08.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:08.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:08.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:08.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:08.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:08.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:08.934 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:08.934 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:17:08.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:08.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:09.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:09.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:09.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:09.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:09.191 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:17:09.663 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:17:10.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:10.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:10.136 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:17:10.609 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:17:11.081 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:17:11.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:11.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:11.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:11.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:11.553 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:17:12.026 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:17:12.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:12.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:12.277 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:12.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:12.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:12.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:12.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:12.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:12.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:12.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:12.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:12.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:12.280 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:12.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:17.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:17.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:17.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:17.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:17.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:17.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:17.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:17.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:17.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:17.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:17.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:17.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:17.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:17.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:17.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:17.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:17.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:17.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:17.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:17.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:17.311 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:17.311 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:17.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:17.311 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:17.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:17.311 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:17.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:17.311 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:17.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:17.313 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:17.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:17.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:17.315 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:17.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:17.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:17.316 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:17.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:17.321 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:17:17.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:17:17.836 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:17:17.838 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:17:17.840 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:17:17.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:17.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:17.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:17.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:17.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:17.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:17.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:17.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:17.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:17.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:17.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:17.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:17.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:18.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:18.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:18.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:18.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:18.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:18.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:18.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:18.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:18.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:18.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:17:18.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:18.263 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:18.264 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:17:18.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:18.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:18.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:18.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:17:18.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:18.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:18.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:18.772 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:18.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:18.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:18.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:18.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:18.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:18.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:18.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:18.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:18.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:18.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:18.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:19.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:17:19.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:19.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:19.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:19.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:19.647 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:17:19.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:19.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:19.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:19.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:19.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:19.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:19.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:19.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:19.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:19.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:19.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:19.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:19.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:19.828 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:19.828 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:17:19.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:19.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:20.113 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:17:20.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:20.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:20.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:20.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:17:21.043 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:17:21.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:21.508 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:17:21.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:21.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:21.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:21.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:21.821 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:21.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:21.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:21.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:21.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:21.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:21.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:21.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:21.825 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:26.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:26.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:26.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:26.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:26.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:26.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:26.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:26.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:26.834 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:26.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:26.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:26.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:26.835 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:26.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:26.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:26.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:26.836 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:26.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:26.836 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:26.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:26.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:26.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:26.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:26.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:26.839 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:26.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:26.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:26.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:26.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:26.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:26.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:26.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:26.841 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:26.841 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:26.841 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:17:27.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:17:27.364 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:17:27.367 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:17:27.368 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:17:27.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:27.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:27.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:27.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:27.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:27.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:27.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:27.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:27.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:27.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:27.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:27.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:27.397 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:27.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:27.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:27.397 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:27.397 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:27.397 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:27.397 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:17:32.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:32.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:32.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:32.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:32.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:32.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:32.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:32.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:32.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:32.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:32.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:32.400 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:32.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:32.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:32.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:32.402 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:32.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:32.402 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:32.402 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:32.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:32.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:32.402 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:32.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:32.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:32.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:32.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:32.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:32.405 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:32.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:32.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:32.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:17:32.874 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:17:32.919 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:17:32.919 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:17:32.919 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:17:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:32.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:32.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:32.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:32.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:32.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:32.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:32.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:32.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:32.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:32.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:32.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:32.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:32.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:32.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:32.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:32.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:32.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:32.940 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:37.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:37.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:37.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:37.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:37.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:37.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:37.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:37.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:37.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:37.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:37.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:37.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:37.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:37.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:37.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:37.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:37.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:37.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:37.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:37.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:37.948 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:37.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:37.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:37.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:37.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:37.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:37.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:37.951 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:37.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:37.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:17:38.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:17:38.465 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:17:38.465 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:17:38.466 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:17:38.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:38.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:38.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:38.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:38.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:38.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:38.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:38.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:38.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:38.478 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:38.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:38.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:43.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:43.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:43.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:43.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:43.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:43.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:43.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:43.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:43.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:43.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:43.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:43.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:43.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:43.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:43.484 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:43.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:43.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:43.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:43.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:43.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:43.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:43.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:43.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:43.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:43.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:43.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:43.489 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:43.489 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:43.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:43.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:43.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:43.491 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:17:43.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:48.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:17:48.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:17:48.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:48.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:48.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:48.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:48.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:17:48.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:48.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:48.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:17:48.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:48.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:17:48.498 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:17:48.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:48.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:17:48.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:17:48.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:48.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:48.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:17:48.500 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:17:48.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:17:48.500 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:17:48.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:48.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:17:48.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:17:48.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:17:48.503 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:17:48.503 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:17:48.503 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:48.508 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:17:48.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:17:49.015 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:17:49.015 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:17:49.015 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:17:49.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:49.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:49.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:49.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:49.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:49.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:49.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:49.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:49.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:49.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:49.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:49.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:49.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:49.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:49.434 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:17:49.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:49.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:49.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:49.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:49.897 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:17:50.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:50.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:50.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:50.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:50.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:50.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:50.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:50.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:50.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:50.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:50.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:50.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:50.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:50.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:50.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:50.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:50.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:50.360 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:17:50.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:50.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:50.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:50.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:50.823 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:17:50.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:50.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:50.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:50.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:50.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:50.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:50.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:50.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:50.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:50.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:50.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:50.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:51.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:51.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:51.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:51.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:51.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:51.286 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:17:51.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:51.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:51.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:51.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:51.749 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:17:51.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:51.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:51.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:51.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:51.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:51.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:51.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:51.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:51.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:51.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:51.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:51.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:51.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:51.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:51.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:51.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:51.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:52.211 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:17:52.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:52.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:52.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:52.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:52.674 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:17:52.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:52.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:52.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:52.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:52.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:52.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:52.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:52.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:52.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:52.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:52.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:52.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:52.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:52.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:52.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:52.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:52.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:53.136 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:17:53.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:53.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:53.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:53.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:53.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:53.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:53.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:53.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:53.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:53.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:53.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:53.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:53.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:53.459 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:53.459 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:17:53.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:53.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:53.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:17:53.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:17:53.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:17:53.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:17:53.599 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:17:54.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:54.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:54.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:54.003 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:54.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:54.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:54.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:54.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:54.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:54.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:54.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:54.061 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:17:54.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:54.099 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:54.099 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 03:17:54.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.558 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:17:54.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:54.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:54.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:54.661 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:54.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:54.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:54.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:54.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:54.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:54.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:54.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:54.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:54.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:54.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:54.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:54.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:54.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:17:55.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:55.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:55.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:55.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:55.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:55.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:55.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:55.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:55.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:55.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:55.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:55.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:55.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.482 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:17:55.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:55.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:55.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:55.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:55.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:55.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:55.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:55.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:55.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:55.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:55.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:17:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:17:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:55.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:55.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:55.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:55.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:56.408 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:17:56.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:56.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:56.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:56.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:56.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:56.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:56.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:56.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:56.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:56.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:56.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:56.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:56.495 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:56.495 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:17:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:56.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:17:57.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:57.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:57.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:57.094 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:57.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:57.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:57.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:57.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:57.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:57.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:57.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:57.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:57.146 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:17:57.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.332 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:17:57.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:57.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:57.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:57.730 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:57.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:57.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:57.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:57.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:57.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:57.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:57.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:57.750 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:57.750 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:17:57.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:57.795 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:17:58.258 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:17:58.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:58.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:58.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:58.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:58.497 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:58.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:58.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:58.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:58.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:58.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:58.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:58.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:58.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:58.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:58.536 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:58.536 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:17:58.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:58.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:58.720 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:17:59.185 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:17:59.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:59.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:59.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:59.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:59.444 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:17:59.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:17:59.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:17:59.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:17:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:59.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:17:59.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:17:59.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:17:59.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:17:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:17:59.465 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:17:59.465 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:17:59.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:59.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:17:59.648 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:18:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:18:00.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:00.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:00.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:00.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:00.389 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:18:00.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:00.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:00.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:00.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:00.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:00.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:00.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:00.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:00.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:00.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:18:00.438 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:18:00.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:00.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:00.575 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:18:01.038 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:18:01.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:01.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:01.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:01.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:01.335 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:18:01.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:01.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:01.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:01.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:01.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:01.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:01.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:01.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:01.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:01.364 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:18:01.364 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:18:01.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:01.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:01.500 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:18:01.986 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:18:02.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:02.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:02.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:02.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:02.303 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:18:02.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:02.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:02.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:02.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:02.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:02.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:02.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:02.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:02.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:02.361 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:18:02.361 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:18:02.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:02.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:02.450 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:18:02.912 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:18:03.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:03.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:03.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:03.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:03.244 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:18:03.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:03.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:03.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:03.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:03.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:03.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:03.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:03.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:03.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:03.282 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:18:03.282 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:18:03.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:03.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:03.374 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:18:03.836 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:18:04.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:04.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:04.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:04.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:04.186 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:18:04.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:04.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:04.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:04.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:04.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:04.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:04.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:04.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:04.207 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:18:04.207 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:18:04.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:04.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:04.299 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:18:04.764 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:18:05.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:05.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:05.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:05.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:05.132 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:18:05.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:18:05.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:18:05.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:18:05.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:18:05.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:05.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:05.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:18:05.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:18:05.136 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:18:05.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:05.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:10.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:18:10.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:18:10.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:10.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:10.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:10.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:10.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:10.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:18:10.145 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:10.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:18:10.145 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:18:10.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:18:10.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:18:10.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:18:10.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:18:10.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:18:10.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:18:10.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:10.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:10.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:18:10.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:18:10.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:18:10.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:18:10.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:18:10.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:18:10.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:18:10.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:18:10.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:18:10.153 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:18:10.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:10.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:18:10.622 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:18:10.665 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:18:10.666 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:18:10.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:10.667 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:18:10.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:10.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:10.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:10.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:10.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:10.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:10.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:10.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:10.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:10.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:10.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:10.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:10.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:10.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:10.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:10.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:10.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:18:11.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:11.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:11.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:11.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:11.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:11.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:11.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:11.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:11.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:11.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:18:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:18:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:18:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:18:11.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:11.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:11.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:11.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:11.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:11.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:11.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:11.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:11.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:11.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:11.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:11.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:11.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:11.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:11.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:18:11.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:11.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:11.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:18:11.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:18:11.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:11.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:18:11.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:18:11.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.547 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:18:11.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:18:11.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:18:11.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:18:11.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:18:11.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:18:11.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:18:11.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:18:11.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:18:11.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:11.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:11.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:11.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:11.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:18:11.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:18:11.720 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:18:11.720 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:11.721 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:16.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:18:16.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:18:16.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:16.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:16.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:16.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:16.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:16.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:18:16.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:16.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:18:16.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:18:16.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:18:16.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:18:16.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:18:16.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:18:16.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:18:16.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:18:16.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:16.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:16.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:18:16.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:18:16.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:18:16.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:18:16.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:18:16.730 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:18:16.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:18:16.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:18:16.732 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:18:16.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:16.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:18:17.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:18:17.665 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:18:18.127 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:18:18.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:18:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:18:19.517 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:18:19.979 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:18:20.441 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:18:20.904 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:18:21.367 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:18:21.830 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:18:22.293 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:18:22.755 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:18:23.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:18:23.680 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:18:24.144 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:18:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:18:25.068 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:18:25.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:18:25.992 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:18:26.455 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:18:26.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:18:27.380 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:18:27.845 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:18:28.309 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:18:28.771 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:18:29.234 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:18:29.697 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:18:30.160 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:18:30.623 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:18:31.102 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:18:31.565 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:18:32.028 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:18:32.492 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:18:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:18:33.420 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:18:33.884 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:18:34.347 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:18:34.810 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:18:35.274 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:18:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:18:36.199 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:18:36.661 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:18:37.123 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:18:37.586 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:18:38.049 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:18:38.511 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:18:38.975 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:18:39.438 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:18:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:18:40.364 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:18:40.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:40.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:40.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:18:40.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:18:40.749 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:18:40.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:40.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:40.749 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=5288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:18:45.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:18:45.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:18:45.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:45.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:45.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:45.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:45.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:18:45.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:18:45.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:45.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:18:45.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:18:45.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:18:45.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:18:45.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:18:45.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:18:45.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:18:45.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:18:45.764 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:45.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:18:45.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:18:45.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:18:45.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:18:45.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:18:45.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:18:45.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:18:45.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:18:45.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:18:45.771 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:18:45.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:18:45.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:18:45.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:18:46.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:18:46.702 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:18:47.165 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:18:47.628 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:18:48.091 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:18:48.554 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:18:49.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:18:49.481 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:18:49.944 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:18:50.407 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:18:50.871 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:18:51.478 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:18:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:18:52.405 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:18:52.869 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:18:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:18:53.795 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:18:54.258 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:18:54.722 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:18:55.185 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:18:55.648 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:18:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:18:56.578 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:18:57.044 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:18:57.577 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:18:58.191 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:18:58.654 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:18:59.117 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:18:59.581 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:19:00.047 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:19:00.512 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:19:00.976 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:19:01.440 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:19:01.903 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:19:02.365 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:19:02.828 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:19:03.290 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:19:03.753 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:19:04.217 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:19:04.680 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:19:05.144 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:19:05.609 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:19:06.074 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:19:06.539 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:19:07.002 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:19:07.466 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:19:07.929 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:19:08.392 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:19:08.855 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:19:09.318 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:19:09.783 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:19:10.245 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:19:10.709 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:19:11.171 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:19:11.634 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:19:12.097 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:19:12.559 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:19:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:19:13.488 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:19:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:19:14.414 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:19:14.877 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:19:15.340 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:19:15.802 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:19:16.264 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:19:16.727 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:19:17.189 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:19:17.652 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:19:18.114 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:19:18.578 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:19:19.042 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:19:19.506 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:19:19.968 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:19:20.430 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:19:20.893 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:19:21.356 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:19:21.822 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:19:22.331 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:19:22.793 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:19:22.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:23.255 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:19:23.718 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:19:23.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:24.183 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:19:24.680 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:19:24.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:25.142 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:19:25.647 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:19:25.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:26.113 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:19:26.579 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:19:26.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:27.046 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:19:27.514 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:19:27.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:27.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:19:27.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:19:27.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:19:27.878 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:19:27.878 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:19:27.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:19:27.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:27.878 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=9159 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:19:32.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:19:32.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:19:32.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:19:32.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:19:32.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:19:32.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:19:32.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:19:32.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:19:32.894 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:32.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:19:32.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:19:32.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:19:32.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:19:32.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:19:32.899 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:32.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:19:32.899 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:19:32.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:19:32.900 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:19:32.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:32.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:19:32.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:19:32.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:19:32.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:32.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:19:32.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:19:32.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:19:32.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:19:32.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:19:32.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:19:32.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:19:32.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:19:32.908 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:19:32.908 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:19:32.908 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:32.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:19:33.376 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:19:33.432 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:19:33.433 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:33.434 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:19:33.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:33.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:33.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:33.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:19:33.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:33.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:33.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:33.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:19:33.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:19:33.467 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:33.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:33.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:33.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:33.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:33.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:33.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:19:33.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:34.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:19:34.314 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:19:34.766 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:19:34.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:35.230 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:19:35.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:19:35.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:35.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:35.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:35.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:36.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:19:36.622 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:19:36.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:36.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:36.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:36.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:37.087 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:19:37.552 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:19:37.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:37.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:37.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:37.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:37.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:37.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:37.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:19:37.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:37.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:37.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:37.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:19:37.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:19:37.685 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:37.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:37.693 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:19:37.694 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:19:37.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:37.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:37.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:37.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:37.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:37.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:38.016 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:19:38.479 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:19:38.942 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:19:39.406 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:19:39.870 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:19:40.333 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:19:40.795 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:19:41.258 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:19:41.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:41.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:41.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:41.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:41.650 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:19:41.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:41.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:41.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:19:41.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:41.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:41.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:41.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:19:41.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:19:41.672 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:41.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:41.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:41.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:41.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:41.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:19:42.151 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:19:42.184 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:19:42.647 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:19:43.110 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:19:43.573 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:19:44.036 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:19:44.500 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:19:44.964 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:19:45.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:45.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:45.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:45.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:45.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:45.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:45.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:19:45.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:45.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:45.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:45.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:19:45.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:19:45.428 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:19:45.430 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:45.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:19:45.438 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:19:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:45.892 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:19:46.355 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:19:46.744 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:19:46.818 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:19:47.282 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:19:47.667 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:19:47.745 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:19:48.133 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:19:48.209 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:19:48.672 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:19:49.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:49.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:49.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:49.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:49.058 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:19:49.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:49.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:19:49.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:19:49.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:19:49.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:19:49.063 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:19:49.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:19:49.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:19:54.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:19:54.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:19:54.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:19:54.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:19:54.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:19:54.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:19:54.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:19:54.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:19:54.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:54.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:19:54.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:19:54.078 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:19:54.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:19:54.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:54.081 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:19:54.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:19:54.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:19:54.082 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:54.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:19:54.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:19:54.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:19:54.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:19:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:54.084 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:19:54.084 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:19:54.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:19:54.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:19:54.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:19:54.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:19:54.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:19:54.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:19:54.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:19:54.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:19:54.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:19:54.090 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:19:54.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:19:54.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:19:54.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:19:54.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:19:54.610 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:19:54.610 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:54.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:54.611 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:19:54.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:19:54.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:19:54.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:19:54.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:54.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:54.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:54.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:19:54.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:19:54.651 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:54.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:19:54.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:19:54.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:19:54.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:54.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:19:55.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:19:55.027 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:55.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:55.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:55.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:55.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:55.490 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:19:55.503 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:55.504 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:19:55.956 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:19:55.978 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:56.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:56.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:56.421 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:19:56.589 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:56.934 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:57.051 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:19:57.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:57.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:57.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:57.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:57.517 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:19:57.565 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:19:58.040 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:58.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:58.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:58.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:58.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:58.449 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:19:58.515 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:58.914 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:19:58.991 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:59.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:19:59.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:19:59.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:19:59.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:19:59.379 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:19:59.466 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:19:59.844 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:19:59.937 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:00.309 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:20:00.412 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:00.775 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:20:00.888 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:01.240 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:20:01.363 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:01.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:20:01.838 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:02.170 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:20:02.309 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:02.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:02.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:02.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:02.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:02.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:02.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:02.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:02.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:02.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:02.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:02.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:02.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:02.348 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:02.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:02.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:20:02.357 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:20:02.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:02.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:02.635 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:20:03.025 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:03.100 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:20:03.500 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:03.565 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:20:03.975 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:04.030 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:20:04.451 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:04.496 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:20:04.922 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:04.961 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:20:05.397 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:05.426 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:20:05.872 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:20:06.348 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:06.356 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:20:06.821 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:20:06.823 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:20:07.289 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:07.752 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:20:07.765 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:08.217 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:20:08.240 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:08.682 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:20:08.715 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:09.148 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:20:09.186 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:09.614 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:20:09.662 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:10.079 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:20:10.137 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:10.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:10.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:10.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:10.141 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:20:10.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:10.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:10.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:10.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:10.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:10.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:10.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:10.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:10.167 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:10.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:10.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:10.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:10.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:10.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:10.511 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:10.545 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:20:10.977 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:10.978 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:20:11.010 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:20:11.443 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:11.474 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:20:11.905 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:11.937 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:20:12.371 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:12.401 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:20:12.832 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:12.865 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:20:13.299 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:13.328 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:20:13.760 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:13.793 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:20:14.226 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:14.256 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:20:14.688 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:14.720 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:20:15.154 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:15.184 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:20:15.616 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:15.648 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:20:16.082 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:16.113 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:20:16.548 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:16.579 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:20:17.009 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:17.044 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:20:17.475 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:17.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:17.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:17.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:17.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:17.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:17.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:17.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:17.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:17.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:17.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:17.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:17.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:17.510 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:20:17.510 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:17.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:17.520 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:20:17.520 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:20:17.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:17.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:17.896 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:17.974 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:20:18.361 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:18.531 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:20:18.996 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:20:19.098 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:19.099 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:20:19.381 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:19.562 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:20:19.950 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:20.027 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:20:20.412 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:20.492 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:20:20.878 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:20.879 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:20:20.958 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:20:21.344 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:21.423 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:20:21.811 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:21.812 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:20:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:20:22.277 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:22.354 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:20:22.738 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:22.740 [DEBUG] fake_trx.py:269 (MS@172.18.105.22:6700) Recv SETTA cmd
2026-04-19 03:20:22.819 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:20:23.204 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:23.285 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:20:23.670 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:23.751 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:20:24.137 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:24.216 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:20:24.603 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:24.681 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:20:25.069 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:25.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:25.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:25.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:25.073 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:20:25.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:25.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:25.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:25.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:25.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:25.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:25.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:25.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:25.080 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:20:25.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:25.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:30.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:30.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:30.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:30.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:30.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:30.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:20:30.088 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:30.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:20:30.088 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:20:30.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:20:30.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:20:30.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:20:30.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:30.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:30.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:20:30.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:20:30.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:20:30.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:20:30.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:20:30.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:20:30.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:20:30.097 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:20:30.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:20:30.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:20:30.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:20:30.103 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:20:30.103 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:20:30.103 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:30.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:30.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:20:30.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:20:30.628 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:20:30.629 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:30.630 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:20:30.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:30.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:30.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:30.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:30.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:30.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:30.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:30.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:30.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:30.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:30.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:30.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:30.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:31.038 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:20:31.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:31.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:31.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:31.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:31.503 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:20:31.968 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:20:32.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:32.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:32.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:32.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:32.434 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:20:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:32.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:32.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:32.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:32.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:32.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:32.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:32.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:32.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:32.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:32.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:32.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:32.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:32.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:32.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:32.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:32.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:32.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:20:33.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:33.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:33.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:33.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:33.364 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:20:33.830 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:20:34.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:34.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:34.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:34.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:34.295 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:20:34.761 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:20:34.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:34.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:34.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:34.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:34.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:34.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:34.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:34.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:34.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:34.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:34.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:34.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:34.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:34.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:34.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:34.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:34.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:35.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:35.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:35.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:35.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:35.226 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:20:35.692 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:20:36.157 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:20:36.623 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:20:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:37.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:37.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:37.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:37.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:37.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:37.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:37.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:37.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:37.042 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:20:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:42.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:42.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:42.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:42.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:42.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:42.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:42.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:42.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:20:42.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:42.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:20:42.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:20:42.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:20:42.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:20:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:20:42.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:20:42.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:20:42.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:20:42.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:20:42.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:20:42.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:42.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:20:42.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:20:42.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:20:42.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:20:42.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:20:42.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:20:42.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:20:42.068 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:20:42.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:42.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:42.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:20:42.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:20:42.593 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:20:42.593 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:42.594 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:20:42.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:42.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:42.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:42.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:42.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:42.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:42.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:42.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:42.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:42.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:42.635 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:20:42.635 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:20:42.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:42.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:43.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:20:43.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:43.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:43.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:43.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:43.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:20:43.937 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:20:44.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:44.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:44.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:44.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:44.404 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:20:44.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:44.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:44.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:44.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:44.734 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:20:44.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:44.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:44.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:44.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:44.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:44.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:44.766 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:44.766 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:44.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:44.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:20:44.783 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:20:44.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:44.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:44.872 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:20:45.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:45.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:45.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:45.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:45.340 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:20:45.807 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:20:46.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:46.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:46.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:46.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:46.274 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:20:46.741 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:20:46.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:46.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:46.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:46.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:46.873 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:20:46.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:46.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:46.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:46.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:46.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:46.879 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:20:46.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:46.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:51.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:51.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:51.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:51.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:51.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:51.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:51.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:51.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:20:51.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:51.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:20:51.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:20:51.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:20:51.893 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:20:51.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:51.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:20:51.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:20:51.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:20:51.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:51.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:51.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:20:51.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:20:51.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:20:51.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:20:51.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:20:51.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:20:51.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:51.903 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:20:51.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:20:51.904 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:20:51.904 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:20:51.904 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:20:51.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:20:51.909 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:20:52.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:20:52.482 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:20:52.482 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:20:52.483 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:20:52.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:52.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:52.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:52.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:52.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:52.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:52.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:52.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:52.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:52.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:52.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:52.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:52.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:52.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:52.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:20:52.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:52.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:52.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:52.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:53.303 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:20:53.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:20:53.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:53.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:53.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:53.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:54.234 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:20:54.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:54.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:54.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:54.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:54.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:54.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:54.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:54.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:54.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:54.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:54.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:54.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:54.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:54.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:54.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:54.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:54.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:54.699 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:20:54.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:54.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:54.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:54.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:20:55.631 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:20:55.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:55.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:55.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:55.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:56.097 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:20:56.563 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:20:56.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:56.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:56.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:56.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:56.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:56.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:56.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:20:56.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:56.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:56.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:56.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:20:56.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:20:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:56.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:20:56.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:20:56.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:56.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:56.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:56.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:56.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:56.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:57.029 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:20:57.495 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:20:57.961 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:20:58.426 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:20:58.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:20:58.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:20:58.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:20:58.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:20:58.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:20:58.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:20:58.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:20:58.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:20:58.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:20:58.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:20:58.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:20:58.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:20:58.892 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:20:58.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:20:58.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:20:58.892 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1531 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:03.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:03.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:03.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:03.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:03.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:03.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:03.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:03.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:03.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:03.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:03.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:03.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:03.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:03.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:03.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:03.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:03.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:03.911 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:03.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:03.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:03.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:03.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:03.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:03.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:03.912 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:03.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.917 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:03.917 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:03.917 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:03.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:04.388 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:04.448 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:04.449 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:04.451 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:04.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:04.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:04.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:04.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:04.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:04.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:04.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:04.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:04.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:04.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:04.487 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:21:04.487 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:21:04.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:04.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:04.854 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:04.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:04.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:04.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:04.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:05.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:21:05.783 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:21:05.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:05.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:05.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:05.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:06.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:21:06.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:06.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:06.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:06.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:06.606 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:21:06.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:06.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:06.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:06.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:06.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:06.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:06.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:06.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:06.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:06.673 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:21:06.673 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:21:06.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:06.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:06.719 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:21:06.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:06.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:06.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:06.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:07.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:21:07.650 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:21:07.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:07.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:07.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:07.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:08.116 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:21:08.581 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:21:08.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:08.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:08.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:08.799 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:21:08.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:08.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:08.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:08.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:08.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:08.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:08.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:08.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:08.806 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:08.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:08.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:08.806 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1071 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:13.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:13.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:13.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:13.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:13.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:13.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:13.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:13.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:13.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:13.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:13.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:13.815 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:13.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:13.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:13.817 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:13.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:13.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:13.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:13.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:13.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:13.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:13.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:13.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:13.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:13.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:13.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:13.822 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:13.822 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:13.822 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:13.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:13.827 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:14.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:14.336 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:14.337 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:14.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:14.338 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:14.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:14.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:14.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:14.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:14.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:14.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:14.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:14.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:14.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:14.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:14.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:14.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:14.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:14.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:14.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:14.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:14.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:14.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:15.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:21:15.683 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:21:15.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:15.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:15.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:15.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:16.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:21:16.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:16.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:16.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:16.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:16.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:16.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:16.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:16.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:16.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:16.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:16.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:16.537 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:16.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:21.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:21.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:21.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:21.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:21.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:21.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:21.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:21.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:21.543 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:21.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:21.543 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:21.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:21.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:21.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:21.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:21.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:21.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:21.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:21.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:21.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:21.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:21.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:21.549 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:21.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:21.549 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:21.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:21.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:21.554 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:21.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:21.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:22.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:22.069 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:22.070 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:22.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:22.071 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:22.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:22.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:22.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:22.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:22.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:22.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:22.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:22.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:22.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:22.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:21:22.115 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:21:22.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:22.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:22.484 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:22.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:22.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:22.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:22.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:22.947 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:21:23.410 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:21:23.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:23.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:23.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:23.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:23.872 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:21:24.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:24.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:24.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:24.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:24.275 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:21:24.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:24.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:24.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:24.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:24.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:24.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:24.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:24.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:24.279 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:24.279 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:29.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:29.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:29.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:29.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:29.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:29.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:29.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:29.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:29.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:29.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:29.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:29.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:29.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:29.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:29.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:29.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:29.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:29.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:29.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:29.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:29.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:29.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:29.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:29.288 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:29.288 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:29.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:29.290 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:29.290 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:29.290 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:29.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:29.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:29.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:29.757 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:29.805 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:29.805 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:29.806 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:29.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:29.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:29.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:29.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:29.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:29.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:29.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:29.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:29.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:29.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:29.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:29.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:29.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:29.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:30.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:30.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:30.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:30.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:30.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:30.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:30.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:30.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:30.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:30.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:30.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:30.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:30.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:30.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:30.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:30.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:30.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:30.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:30.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:30.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:30.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:30.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:30.683 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:21:30.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:30.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:30.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:30.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:30.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:30.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:30.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:30.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:30.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:30.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:30.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:30.718 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:30.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:30.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:30.718 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:35.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:35.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:35.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:35.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:35.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:35.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:35.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:35.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:35.724 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:35.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:35.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:35.725 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:35.725 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:35.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:35.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:35.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:35.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:35.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:35.726 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:35.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:35.727 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:35.727 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:35.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:35.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:35.728 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:35.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:35.728 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:35.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:35.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:35.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:35.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:35.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:35.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:35.731 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:35.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:35.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:35.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:36.199 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:36.245 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:36.245 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:36.246 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:36.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:36.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:36.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:36.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:36.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:36.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:36.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:36.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:36.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:36.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:36.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:36.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:36.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:36.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:36.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:36.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:36.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:36.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:36.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:36.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:36.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:36.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:36.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:36.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:36.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:36.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:36.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:36.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:36.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:36.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:37.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:37.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:37.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:37.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:37.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:37.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:37.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:37.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:37.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:37.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:37.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:37.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:37.069 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:37.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:37.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:42.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:42.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:42.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:42.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:42.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:42.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:42.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:42.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:42.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:42.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:42.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:42.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:42.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:42.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:42.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:42.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:42.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:42.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:42.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:42.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:42.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:42.081 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:42.081 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:42.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:42.086 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:42.549 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:42.595 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:42.595 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:42.596 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:42.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:42.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:42.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:42.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:42.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:42.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:42.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:42.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:42.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:42.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:42.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:42.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:42.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:42.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:43.013 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:43.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:43.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:43.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:43.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:43.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:43.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:43.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:43.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:43.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:43.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:43.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:43.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:43.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:43.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:43.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:43.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:43.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:43.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:43.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:43.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:43.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:43.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:43.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:43.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:43.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:43.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:43.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:43.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:43.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:43.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:43.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:43.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:43.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:43.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:43.460 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:43.460 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:43.460 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:48.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:48.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:48.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:48.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:48.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:48.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:48.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:48.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:48.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:48.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:48.465 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:48.465 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:48.466 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:48.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:48.466 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:48.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:48.466 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:48.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:48.466 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:48.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:48.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:48.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:48.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:48.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:48.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:48.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:48.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:48.470 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:48.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:48.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:48.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:48.984 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:48.985 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:48.985 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:48.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:48.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:48.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:48.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:49.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:49.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:49.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:49.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:49.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:49.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:49.032 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:21:49.032 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:21:49.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:49.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:49.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:49.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:49.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:49.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:49.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:49.866 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:21:50.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:21:50.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:50.794 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:21:50.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:50.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:50.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:51.370 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:21:51.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:21:51.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:51.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:51.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:51.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:52.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:21:52.759 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:21:52.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:52.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:52.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:52.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:53.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:53.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:53.034 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:53.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:53.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:53.036 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:53.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:53.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:58.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:58.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:58.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:58.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:58.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:58.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:58.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:58.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:58.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:58.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:21:58.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:58.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:21:58.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:21:58.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:58.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:21:58.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:21:58.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:58.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:21:58.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:21:58.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:21:58.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:21:58.064 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:21:58.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:21:58.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:21:58.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:21:58.578 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:21:58.579 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:21:58.579 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:21:58.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:58.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:58.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:58.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:58.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:58.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:58.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:58.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:58.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:58.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:58.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:58.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:58.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:58.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:58.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:58.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:58.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:58.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:58.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:58.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:58.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:21:58.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:58.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:58.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:58.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:21:58.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:21:59.001 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:21:59.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:59.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:21:59.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:21:59.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:59.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:59.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:59.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:59.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:59.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:59.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:21:59.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:21:59.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:21:59.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:21:59.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:21:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:21:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:21:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:21:59.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:21:59.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:21:59.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:21:59.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:21:59.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:21:59.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:21:59.208 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:21:59.208 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:59.208 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:59.208 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:21:59.208 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:04.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:04.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:04.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:04.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:04.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:04.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:04.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:04.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:04.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:04.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:04.213 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:04.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:04.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:04.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:04.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:04.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:04.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:04.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:04.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:04.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:04.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:04.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:04.219 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:04.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:04.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:04.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:04.220 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:04.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:04.224 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:04.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:04.733 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:04.734 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:04.734 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:04.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:04.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:04.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:04.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:04.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:04.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:04.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:04.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:04.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:04.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:04.777 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:22:04.777 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:22:04.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:04.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:05.150 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:05.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:05.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:05.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:05.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:05.613 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:22:06.075 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:22:06.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:06.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:06.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:06.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:06.537 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:22:06.999 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:22:07.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:07.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:07.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:22:07.927 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:22:08.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:08.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:22:08.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:08.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:08.779 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:08.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:08.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:08.780 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:08.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:08.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:13.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:13.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:13.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:13.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:13.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:13.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:13.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:13.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:13.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:13.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:13.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:13.787 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:13.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:13.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:13.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:13.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:13.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:13.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:13.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:13.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:13.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:13.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:13.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:13.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:13.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:13.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:13.790 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:13.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:13.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:13.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:13.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:13.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:13.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:13.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:13.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:13.793 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:13.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:13.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:14.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:14.305 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:14.306 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:14.306 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:14.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:14.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:14.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:14.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:14.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:14.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:14.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:14.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:14.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:14.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:14.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:14.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:14.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:14.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:14.724 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:14.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:14.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:14.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:14.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:15.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:15.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:15.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:15.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:15.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:15.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:15.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:15.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:15.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:15.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:15.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:15.088 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:15.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:15.088 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:15.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:15.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:15.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:15.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:15.089 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:20.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:20.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:20.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:20.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:20.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:20.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:20.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:20.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:20.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:20.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:20.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:20.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:20.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:20.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:20.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:20.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:20.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:20.093 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:20.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:20.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:20.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:20.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:20.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:20.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:20.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:20.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:20.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:20.096 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:20.096 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:20.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:20.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:20.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:20.610 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:20.611 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:20.611 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:20.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:20.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:20.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:20.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:20.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:20.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:20.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:20.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:20.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:20.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:20.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:20.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:20.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:20.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:21.032 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:21.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:21.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:21.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:21.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:21.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:21.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:21.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:22:21.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:21.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:21.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:21.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:21.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:21.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:21.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:21.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:21.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:21.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:21.500 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:21.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:21.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:26.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:26.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:26.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:26.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:26.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:26.567 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:26.567 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:26.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:26.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:26.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:26.569 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:26.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:26.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:26.570 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:26.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:26.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:26.574 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:27.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:27.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:27.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:27.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:27.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:27.601 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:28.075 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:22:28.548 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:22:28.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:28.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:28.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:28.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:29.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:22:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:22:29.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:29.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:29.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:29.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:29.967 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:22:30.088 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:30.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:30.091 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:30.093 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:30.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:30.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:30.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:30.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:30.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:30.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:30.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:30.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:30.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:30.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:30.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:30.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:30.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:30.434 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:22:30.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:30.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:30.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:30.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:30.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:30.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:30.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:30.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:30.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:30.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:30.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:30.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:30.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:30.856 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:35.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:35.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:35.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:35.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:35.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:35.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:35.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:35.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:35.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:35.865 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:35.865 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:35.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:35.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:35.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:35.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:35.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:35.866 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:35.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:35.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:35.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:35.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:35.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:35.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:35.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:35.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:35.871 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:35.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:35.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:35.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:36.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:36.384 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:36.384 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:36.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:36.385 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:36.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:36.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:36.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:36.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:36.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:36.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:36.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:36.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:36.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:36.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:22:36.431 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:22:36.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:36.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:36.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:36.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:36.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:36.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:36.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:37.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:22:37.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:37.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:37.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:37.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:37.272 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:22:37.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:37.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:37.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:37.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:37.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:37.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:37.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:37.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:37.275 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:37.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:37.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:42.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:42.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:42.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:42.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:42.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:42.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:42.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:42.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:42.280 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:42.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:42.280 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:42.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:42.281 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:42.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:42.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:42.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:42.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:42.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:42.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:42.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:42.286 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:42.286 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:42.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:42.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:42.797 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:42.798 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:42.798 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:42.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:42.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:42.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:42.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:42.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:42.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:42.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:42.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:42.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:42.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:42.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:42.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:42.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:43.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:43.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:43.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:43.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:43.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:43.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:43.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:43.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:43.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:43.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:43.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:43.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:43.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:43.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:43.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:43.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:43.590 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:48.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:48.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:48.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:48.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:48.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:48.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:48.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:48.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:48.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:48.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:48.609 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:48.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:48.611 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:48.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:48.613 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:48.613 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:48.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:48.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:48.614 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:48.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:48.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:48.616 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:48.617 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:48.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:48.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:49.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:49.140 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:49.141 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:49.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:49.143 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:49.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:49.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:49.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:49.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:49.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:49.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:49.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:49.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:49.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:49.245 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:22:49.245 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:22:49.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:49.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:49.570 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:49.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:49.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:49.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:49.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:50.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:22:50.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:50.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:50.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:50.098 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:22:50.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:50.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:50.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:50.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:50.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:50.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:50.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:50.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:50.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:50.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:50.111 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:50.111 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:50.111 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:50.111 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:50.111 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:50.111 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:55.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:55.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:55.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:55.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:55.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:55.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:55.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:55.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:55.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:55.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:22:55.125 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:22:55.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:22:55.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:22:55.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:55.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:55.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:55.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:22:55.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:22:55.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:22:55.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:55.133 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:22:55.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:22:55.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:55.133 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:55.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:55.134 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:22:55.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:22:55.134 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:22:55.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:55.136 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:22:55.136 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:22:55.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:55.136 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:22:55.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:55.137 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:22:55.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:22:55.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:22:55.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:22:55.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:22:55.140 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:22:55.141 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:22:55.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:22:55.622 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:22:55.665 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:22:55.666 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:22:55.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:55.667 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:22:55.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:55.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:55.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:55.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:55.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:55.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:55.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:55.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:56.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:22:56.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:56.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:56.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:22:56.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:22:56.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:56.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:56.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:56.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:56.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:22:56.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:22:56.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:22:56.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:22:56.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:22:56.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:22:57.105 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:22:57.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:57.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:57.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:22:57.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:22:58.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:22:58.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:22:58.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:22:58.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:22:58.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:22:58.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:22:58.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:22:58.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:22:58.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:22:58.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:22:58.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:22:58.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:22:58.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:22:58.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:22:58.189 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.190 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=626 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.191 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=627 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=628 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.192 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=629 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=630 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=631 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.193 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=632 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=633 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.194 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=634 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=635 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=637 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=638 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=639 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=640 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=641 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.195 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=642 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=643 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=645 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=646 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:22:58.196 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=646 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:03.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:03.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:03.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:03.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:03.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:03.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:03.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:03.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:03.109 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:03.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:03.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:23:03.112 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:23:03.112 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:23:03.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:03.112 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:03.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:03.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:23:03.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:03.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:23:03.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:03.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:03.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:23:03.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:03.116 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:03.116 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:23:03.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:23:03.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:23:03.118 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:23:03.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:03.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:03.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:03.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:03.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:03.120 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:23:03.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:03.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:08.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:08.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:08.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:08.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:08.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:08.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:08.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:08.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:08.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:08.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:08.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:23:08.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:23:08.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:23:08.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:08.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:08.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:08.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:23:08.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:08.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:23:08.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:08.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:23:08.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:23:08.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:08.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:08.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:23:08.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:08.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:08.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:23:08.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:08.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:23:08.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:23:08.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:08.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:08.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:08.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:23:08.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:08.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:23:08.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:08.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:23:08.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:23:08.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:23:08.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:23:08.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:23:08.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:23:08.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:23:08.155 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:23:08.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:08.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:23:08.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:23:08.685 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:23:08.688 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:23:08.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:23:08.690 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:23:08.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:08.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:08.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:23:08.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:08.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:08.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:08.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:23:08.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:23:09.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:23:09.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:09.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:09.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:09.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:09.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:23:10.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:23:10.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:10.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:10.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:10.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:10.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:23:10.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:23:11.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:11.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:11.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:11.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:11.420 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:23:11.883 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:23:12.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:12.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:12.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:12.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:12.346 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:23:12.809 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:23:13.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:13.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:13.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:13.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:13.272 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:23:13.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:23:13.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:13.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:13.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:13.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:13.734 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:23:14.196 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:23:14.659 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:23:15.121 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:23:15.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:23:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:23:16.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:16.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:16.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:16.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:16.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:16.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:16.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:16.487 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:23:16.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (TRX3@172.18.105.20:5700/3) RX TRXD message (ver=1 fn=1832 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:16.487 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:23:21.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:21.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:21.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:21.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:21.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:21.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:21.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:21.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:21.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:21.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:21.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:21.494 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:21.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:23:21.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:21.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:23:21.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:23:21.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:21.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:21.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:21.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:23:21.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:21.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:23:21.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:21.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:21.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:23:21.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:23:21.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:23:21.499 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:23:21.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:23:21.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:23:22.010 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:23:22.010 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:23:22.010 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:23:22.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:23:22.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:22.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:23:22.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:22.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:22.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:22.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:23:22.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:23:22.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:23:22.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:22.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:22.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:22.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:22.892 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:23:23.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:23:23.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:23.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:23.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:23.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:23.817 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:23:24.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:23:24.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:24.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:24.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:24.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:24.742 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:23:25.205 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:23:25.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:25.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:25.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:25.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:25.667 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:23:26.129 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:23:26.591 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:23:26.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:26.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:26.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:26.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:27.054 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:23:27.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:23:27.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:27.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:27.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:27.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:27.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:23:27.978 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:23:28.440 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:23:28.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:23:29.365 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:23:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:30.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:30.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:30.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:30.031 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:23:30.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:30.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:35.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:35.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:35.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:35.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:35.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:35.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:35.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:35.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:35.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:35.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:35.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:35.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:35.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:23:35.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:35.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:35.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:23:35.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:35.039 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:23:35.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:23:35.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:35.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:35.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:35.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:23:35.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:35.040 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:23:35.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:35.041 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:23:35.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:23:35.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:23:35.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:23:35.041 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:23:35.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:23:35.042 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:23:35.042 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:23:35.042 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:35.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:35.046 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:23:35.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:23:35.553 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:23:35.553 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:23:35.553 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:23:35.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:23:35.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:35.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:35.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:23:35.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:35.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:35.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:35.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:23:35.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:23:35.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:23:36.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:36.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:36.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:36.434 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:23:36.897 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:23:37.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:37.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:37.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:37.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:23:37.823 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:23:38.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:38.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:38.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:38.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:38.285 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:23:38.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:23:39.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:39.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:39.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:39.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:39.211 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:23:39.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:23:40.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:40.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:40.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:40.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:40.136 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:23:40.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:23:40.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:40.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:40.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:40.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:40.598 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:23:41.060 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:23:41.523 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:23:41.985 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:23:42.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:23:42.910 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:23:43.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:43.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:43.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:43.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:43.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:43.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:43.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:43.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:43.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:43.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:43.351 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:23:43.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:43.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:48.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:48.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:48.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:48.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:48.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:48.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:48.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:48.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:48.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:48.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:23:48.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:48.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:23:48.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:23:48.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:48.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:23:48.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:23:48.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:48.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:23:48.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:23:48.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:48.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:23:48.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:23:48.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:23:48.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:23:48.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:23:48.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:48.363 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:23:48.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:23:48.364 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:23:48.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:23:48.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:23:48.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:23:48.876 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:23:48.876 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:23:48.877 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:23:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:23:48.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:48.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:48.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:23:48.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:48.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:48.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:48.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:23:48.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:23:49.295 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:23:49.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:49.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:49.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:49.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:49.757 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:23:50.220 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:23:50.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:50.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:50.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:23:51.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:23:51.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:51.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:51.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:51.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:23:52.070 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:23:52.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:52.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:52.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:52.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:52.532 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:23:52.995 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:23:53.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:53.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:53.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:53.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:53.458 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:23:53.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:23:53.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:23:53.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:23:53.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:53.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:23:53.920 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:23:54.382 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:23:54.844 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:23:55.307 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:23:55.769 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:23:56.232 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:23:56.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:23:56.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:23:56.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:23:56.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:23:56.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:23:56.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:23:56.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:23:56.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:23:56.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:23:56.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:23:56.674 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:23:56.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:23:56.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:01.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:01.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:01.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:01.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:01.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:01.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:01.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:01.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:01.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:01.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:01.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:24:01.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:24:01.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:24:01.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:01.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:01.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:01.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:24:01.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:01.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:24:01.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:01.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:24:01.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:24:01.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:01.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:01.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:01.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:24:01.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:01.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:24:01.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:01.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:01.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:24:01.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:24:01.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:24:01.688 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:24:01.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:01.693 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:24:02.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:24:02.202 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:24:02.203 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:24:02.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:24:02.203 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:24:02.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:24:02.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:24:02.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:24:02.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:24:02.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:24:02.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:24:02.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:24:02.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:24:02.619 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:24:02.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:02.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:02.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:03.082 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:24:03.544 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:24:03.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:03.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:03.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:03.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:04.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:24:04.469 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:24:04.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:04.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:04.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:04.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:04.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:24:05.396 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:24:05.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:05.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:05.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:05.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:05.858 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:24:06.321 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:24:06.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:06.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:06.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:06.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:06.784 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:24:07.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:24:07.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:24:07.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:24:07.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:24:07.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:24:07.246 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:24:07.708 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:24:08.171 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:24:08.633 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:24:09.096 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:24:09.558 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:24:09.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:24:09.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:24:10.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:10.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:10.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:10.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:10.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:10.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:10.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:10.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:10.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:10.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:10.009 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (TRX2@172.18.105.20:5700/2) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:10.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:24:15.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:15.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:15.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:15.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:15.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:15.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:15.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:15.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:15.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:15.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:15.012 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:15.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:15.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:24:15.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:15.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:15.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:24:15.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:15.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:24:15.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:24:15.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:15.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:15.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:15.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:24:15.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:15.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:24:15.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:15.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:24:15.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:24:15.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:24:15.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:24:15.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:24:15.023 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:24:15.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:15.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:15.028 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:24:15.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:24:15.543 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:24:15.544 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:24:15.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:24:15.545 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:24:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:24:16.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:16.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:16.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:16.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:16.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:24:16.886 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:24:17.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:17.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:17.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:17.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:17.351 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:24:17.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:24:18.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:18.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:18.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:18.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:18.281 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:24:18.746 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:24:19.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:19.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:19.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:19.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:19.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:24:19.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:24:20.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:20.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:20.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:20.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:24:20.605 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:24:21.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:24:21.536 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:24:22.001 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:24:22.467 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:24:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:24:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:24:23.864 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:24:24.329 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:24:24.793 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:24:25.259 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:24:25.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:25.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:25.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:25.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:25.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:25.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:25.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:25.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:25.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:25.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:25.552 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:24:30.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:30.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:30.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:30.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:30.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:30.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:30.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:30.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:30.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:30.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:30.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:30.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:30.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:24:30.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:30.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:24:30.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:24:30.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:30.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:30.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:30.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:24:30.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:30.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:24:30.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:30.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:24:30.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:24:30.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:30.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:30.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:30.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:24:30.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:30.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:24:30.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:30.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:24:30.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:24:30.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:24:30.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:24:30.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:24:30.578 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:24:30.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:30.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:30.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:30.580 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:24:35.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:35.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:35.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:35.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:35.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:35.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:35.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:35.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:35.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:35.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:35.591 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:24:35.592 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:24:35.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:24:35.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:35.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:35.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:35.593 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:24:35.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:35.593 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:24:35.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:35.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:35.595 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:24:35.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:35.597 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:35.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:24:35.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:35.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:24:35.601 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:24:35.601 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:24:35.601 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:35.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:35.606 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:24:36.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:24:36.116 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:24:36.117 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:24:36.117 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:24:36.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:24:36.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:24:36.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:24:36.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:24:36.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:36.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:36.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:36.999 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:24:37.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:24:37.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:37.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:37.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:37.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:37.926 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:24:38.389 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:24:38.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:38.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:38.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:38.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:38.853 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:24:39.316 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:24:39.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:39.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:39.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:39.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:39.780 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:24:40.243 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:24:40.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:40.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:40.706 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:24:41.171 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:24:41.634 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:24:42.096 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:24:42.560 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:24:43.024 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:24:43.488 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:24:43.951 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:24:44.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:24:44.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:24:44.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:44.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:44.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:44.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:44.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:44.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:44.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:44.164 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:24:49.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:49.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:49.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:49.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:49.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:49.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:49.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:49.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:49.169 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:49.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:49.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:49.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:49.171 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:24:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:49.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:49.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:24:49.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:49.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:24:49.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:24:49.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:49.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:49.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:49.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:24:49.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:49.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:24:49.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:24:49.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:24:49.178 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:24:49.178 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:24:49.178 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:49.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:49.179 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:49.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:24:54.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:24:54.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:54.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:54.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:54.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:54.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:24:54.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:54.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:54.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:24:54.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:24:54.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:24:54.186 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:24:54.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:54.186 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:54.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:24:54.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:24:54.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:24:54.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:24:54.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:54.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:24:54.188 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:24:54.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:54.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:54.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:24:54.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:24:54.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:24:54.188 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:24:54.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:54.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:24:54.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:24:54.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:24:54.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:24:54.191 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:24:54.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:24:54.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:24:54.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:24:54.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:24:54.704 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:24:54.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:24:54.705 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:24:54.705 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:24:54.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:24:54.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:24:54.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:24:54.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:24:54.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:24:54.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:24:54.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:24:54.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:24:55.122 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:24:55.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:55.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:55.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:55.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:55.585 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:24:56.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:24:56.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:56.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:56.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:56.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:56.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:24:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:24:57.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:57.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:57.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:57.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:57.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:24:57.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:24:58.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:58.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:58.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:58.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:58.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:24:58.820 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:24:59.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:24:59.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:24:59.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:24:59.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:24:59.283 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:24:59.745 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:25:00.207 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:25:00.670 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:25:01.132 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:25:01.596 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:25:02.060 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:25:02.522 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:25:02.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:25:02.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:25:02.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:02.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:02.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:02.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:02.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:02.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:02.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:02.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:02.751 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:25:02.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:02.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:02.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1888 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:07.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:07.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:07.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:07.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:07.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:07.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:07.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:07.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:07.756 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:07.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:07.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:25:07.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:25:07.757 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:25:07.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:07.757 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:07.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:07.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:25:07.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:07.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:25:07.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:07.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:25:07.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:25:07.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:07.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:07.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:07.759 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:25:07.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:07.759 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:25:07.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:07.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:07.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:25:07.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:25:07.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:25:07.762 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:25:07.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:25:07.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:07.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:07.763 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:25:07.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:12.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:12.766 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:12.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:12.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:12.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:12.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:12.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:12.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:12.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:12.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:12.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:12.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:12.772 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:25:12.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:12.773 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:12.773 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:25:12.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:12.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:12.774 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:25:12.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:25:12.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:25:12.776 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:25:12.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:12.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:25:13.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:25:13.290 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:25:13.290 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:25:13.291 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:25:13.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:25:13.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:25:13.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:25:13.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:25:13.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:25:13.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:25:13.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:25:13.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:25:13.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:25:13.707 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:25:13.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:13.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:13.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:13.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:14.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:25:14.633 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:25:14.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:14.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:14.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:14.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:15.098 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:25:15.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:25:15.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:15.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:15.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:15.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:16.025 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:25:16.488 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:25:16.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:16.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:16.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:16.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:16.950 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:25:17.417 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:25:17.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:17.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:17.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:17.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:18.229 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:25:18.697 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:25:19.164 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:25:19.631 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:25:20.098 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:25:20.564 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:25:21.031 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:25:21.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:25:21.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:25:21.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:21.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:21.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:21.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:21.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:21.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:21.336 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:21.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:26.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:26.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:26.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:26.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:26.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:26.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:26.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:26.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:26.342 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:26.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:26.342 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:25:26.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:25:26.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:25:26.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:26.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:26.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:26.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:25:26.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:26.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:25:26.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:26.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:26.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:25:26.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:26.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:26.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:25:26.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:25:26.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:25:26.349 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:25:26.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:26.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:26.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:26.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:26.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:26.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:26.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:26.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:26.350 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:25:31.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:31.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:31.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:31.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:31.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:31.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:31.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:31.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:31.359 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:31.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:31.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:31.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:31.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:25:31.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:31.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:31.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:25:31.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:31.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:25:31.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:25:31.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:31.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:31.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:31.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:25:31.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:31.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:25:31.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:25:31.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:25:31.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:25:31.367 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:25:31.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:31.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:31.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:25:31.836 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:25:31.878 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:25:31.878 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:25:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:25:31.879 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:25:31.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:25:31.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:25:31.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:25:31.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:25:31.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:25:31.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:25:31.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:25:31.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:25:32.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:25:32.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:32.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:32.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:32.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:32.760 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:25:33.223 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:25:33.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:33.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:33.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:33.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:33.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:25:34.148 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:25:34.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:34.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:34.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:34.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:34.612 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:25:35.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:25:35.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:35.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:35.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:35.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:35.536 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:25:35.999 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:25:36.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:36.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:36.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:36.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:36.461 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:25:36.924 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:25:37.388 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:25:37.850 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:25:38.313 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:25:38.775 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:25:39.238 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:25:39.701 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:25:39.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:25:39.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:25:39.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:39.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:39.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:39.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:39.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:39.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:39.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:39.927 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:25:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:39.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1887 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:25:44.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:44.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:44.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:44.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:44.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:44.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:44.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:44.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:44.932 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:44.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:44.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:25:44.933 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:25:44.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:25:44.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:44.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:44.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:44.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:25:44.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:44.934 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:25:44.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:44.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:25:44.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:25:44.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:44.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:44.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:44.935 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:25:44.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:44.935 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:25:44.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:44.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:44.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:25:44.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:25:44.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:25:44.938 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:25:44.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:44.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:44.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:44.939 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:25:49.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:25:49.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:25:49.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:49.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:49.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:49.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:49.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:25:49.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:49.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:49.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:25:49.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:49.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:25:49.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:25:49.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:49.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:25:49.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:25:49.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:49.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:49.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:25:49.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:25:49.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:25:49.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:25:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:49.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:25:49.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:25:49.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:25:49.965 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:25:49.965 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:25:49.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:25:49.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:25:49.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:25:50.433 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:25:50.480 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:25:50.481 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:25:50.482 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:25:50.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:25:50.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:25:50.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:25:50.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:25:50.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:25:50.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:25:50.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:25:50.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:25:50.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:25:50.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:25:50.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:50.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:50.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:50.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:51.358 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:25:51.824 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:25:51.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:51.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:51.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:51.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:52.290 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:25:52.756 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:25:52.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:52.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:52.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:52.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:53.219 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:25:53.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:25:53.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:53.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:53.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:53.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:54.147 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:25:54.610 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:25:54.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:25:54.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:25:54.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:25:54.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:25:55.074 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:25:55.538 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:25:56.001 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:25:56.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:25:56.927 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:25:57.390 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:25:57.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:25:58.315 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:25:58.779 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:25:59.242 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:25:59.706 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:26:00.170 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:26:00.635 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:26:01.099 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:26:01.563 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:26:02.030 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:26:02.495 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:26:02.958 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:26:03.422 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:26:03.893 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:26:04.359 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:26:04.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:26:04.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:26:04.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:04.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:04.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:04.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:04.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:04.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:04.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:04.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:04.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:04.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:04.529 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:26:09.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:09.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:09.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:09.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:09.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:09.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:09.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:09.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:09.544 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:09.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:09.544 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:26:09.547 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:26:09.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:26:09.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:09.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:09.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:09.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:26:09.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:09.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:26:09.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:09.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:26:09.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:26:09.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:09.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:09.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:09.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:26:09.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:09.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:26:09.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:09.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:09.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:26:09.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:26:09.555 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:26:09.555 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:26:09.555 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:09.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:09.557 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:26:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:14.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:14.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:14.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:14.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:14.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:14.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:14.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:14.580 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:14.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:14.580 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:26:14.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:26:14.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:26:14.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:14.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:14.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:14.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:26:14.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:14.583 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:26:14.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:14.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:26:14.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:26:14.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:14.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:14.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:14.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:26:14.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:14.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:26:14.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:14.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:26:14.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:26:14.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:14.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:14.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:14.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:26:14.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:14.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:26:14.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:14.599 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:26:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:26:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:26:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:26:14.599 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:26:14.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:26:14.600 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:26:14.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:14.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:26:15.071 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:26:15.126 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:26:15.127 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:26:15.127 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:26:15.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:26:15.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:26:15.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:26:15.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:26:15.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:26:15.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:26:15.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:26:15.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:26:15.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:26:15.537 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:26:15.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:15.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:15.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:15.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:16.003 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:26:16.470 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:26:16.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:16.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:16.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:16.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:16.935 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:26:17.400 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:26:17.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:17.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:17.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:17.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:17.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:26:18.338 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:26:18.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:18.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:18.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:18.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:18.805 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:26:19.272 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:26:19.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:19.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:19.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:19.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:19.740 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:26:20.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:26:20.670 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:26:21.138 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:26:21.606 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:26:22.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:26:22.544 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:26:23.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:26:23.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:26:23.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:26:23.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:23.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:23.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:23.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:23.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:23.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:23.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:23.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:23.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:23.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:23.177 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:26:23.177 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:23.177 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:23.177 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:23.177 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:23.177 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:23.178 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:23.178 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1874 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:26:28.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:28.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:28.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:28.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:28.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:28.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:28.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:28.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:28.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:28.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:28.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:26:28.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:26:28.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:26:28.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:28.181 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:28.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:28.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:26:28.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:28.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:26:28.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:28.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:28.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:26:28.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:28.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:26:28.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:26:28.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:28.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:28.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:28.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:26:28.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:28.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:26:28.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:26:28.186 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:26:28.186 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:26:28.186 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:28.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:28.187 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:26:28.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:33.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:33.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:33.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:33.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:33.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:33.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:33.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:33.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:33.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:33.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:33.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:26:33.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:26:33.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:26:33.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:33.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:33.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:33.202 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:26:33.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:33.202 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:26:33.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:33.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:33.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:26:33.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:33.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:33.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:26:33.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:33.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:26:33.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:26:33.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:26:33.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:26:33.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:26:33.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:26:33.210 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:33.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:26:33.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:26:33.728 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:26:33.728 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:26:33.728 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:26:33.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:26:33.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:26:33.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:26:34.147 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:26:34.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:34.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:34.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:34.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:34.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:26:35.080 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:26:35.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:35.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:35.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:35.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:35.548 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:26:36.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:26:36.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:36.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:36.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:36.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:36.474 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:26:36.938 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:26:37.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:37.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:37.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:37.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:37.403 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:26:37.866 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:26:38.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:38.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:38.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:38.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:38.333 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:26:38.797 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:26:39.262 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:26:39.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:26:40.254 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:26:40.720 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:26:41.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:26:41.647 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:26:42.111 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:26:42.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:26:43.043 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:26:43.508 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:26:43.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:26:43.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:26:43.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:43.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:43.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:43.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:43.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:43.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:43.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:43.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:43.773 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:26:43.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:43.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:48.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:48.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:48.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:48.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:48.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:48.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:48.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:48.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:48.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:48.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:48.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:48.780 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:48.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:26:48.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:48.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:48.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:26:48.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:48.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:26:48.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:26:48.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:48.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:48.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:48.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:26:48.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:48.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:26:48.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:26:48.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:26:48.785 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:48.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:48.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:48.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:48.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:48.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:48.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:48.786 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:26:53.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:26:53.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:26:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:53.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:53.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:26:53.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:53.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:53.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:26:53.804 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:26:53.807 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:26:53.807 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:26:53.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:53.807 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:53.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:26:53.807 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:26:53.807 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:26:53.807 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:26:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:53.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:26:53.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:26:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:53.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:26:53.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:26:53.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:26:53.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:26:53.815 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:26:53.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:26:53.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:26:53.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:26:54.285 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:26:54.345 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:26:54.347 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:26:54.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:26:54.349 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:26:54.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:26:54.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:26:54.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:26:54.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:26:54.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:26:54.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:26:54.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:26:54.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:26:54.749 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:26:54.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:54.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:54.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:54.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:55.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:26:55.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:26:55.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:55.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:55.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:55.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:56.148 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:26:56.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:26:56.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:56.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:56.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:56.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:57.081 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:26:57.545 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:26:57.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:57.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:57.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:57.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:58.045 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:26:58.508 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:26:58.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:26:58.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:26:58.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:26:58.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:26:58.975 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:26:59.528 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:26:59.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:27:00.463 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:27:00.927 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:27:01.394 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:27:01.858 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:27:02.324 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:27:02.789 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:27:03.253 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:27:03.716 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:27:04.179 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:27:04.646 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:27:05.113 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:27:05.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:27:05.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:27:05.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:05.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:05.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:05.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:05.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:05.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:05.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:05.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:05.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:05.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:05.377 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:27:05.377 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2508 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:27:05.377 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2508 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:27:05.377 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2508 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:27:10.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:10.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:10.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:10.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:10.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:10.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:10.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:10.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:10.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:10.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:10.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:27:10.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:27:10.398 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:27:10.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:10.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:10.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:10.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:27:10.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:10.399 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:27:10.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:10.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:10.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:27:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:10.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:27:10.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:27:10.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:10.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:10.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:10.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:27:10.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:10.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:27:10.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:27:10.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:27:10.404 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:27:10.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:10.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:10.405 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:27:10.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:15.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:15.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:15.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:15.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:15.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:15.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:15.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:15.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:15.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:15.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:15.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:15.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:15.416 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:27:15.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:15.418 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:15.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:27:15.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:15.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:15.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:27:15.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:27:15.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:27:15.425 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:15.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:15.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:27:15.892 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:27:15.939 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:27:15.939 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:27:15.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:27:15.940 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:27:15.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:27:15.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:27:15.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:27:15.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:27:15.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:27:15.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:27:15.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:27:15.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:27:16.354 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:27:16.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:16.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:16.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:16.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:16.817 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:27:17.279 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:27:17.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:17.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:17.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:17.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:17.742 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:27:18.204 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:27:18.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:18.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:18.666 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:27:19.128 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:27:19.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:19.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:27:20.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:27:20.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:20.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:20.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:20.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:20.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:27:20.980 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:27:21.444 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:27:21.907 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:27:22.370 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:27:22.832 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:27:23.298 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:27:23.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:27:24.225 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:27:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:27:25.150 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:27:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:27:26.078 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:27:26.542 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:27:27.005 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:27:27.467 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:27:27.931 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:27:28.393 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:27:28.856 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:27:29.320 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:27:29.783 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:27:30.245 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:27:30.710 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:27:31.172 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:27:31.635 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:27:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:27:32.560 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:27:33.023 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:27:33.486 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:27:33.948 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:27:34.411 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:27:34.873 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:27:35.336 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:27:35.798 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:27:35.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:27:35.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:27:35.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:35.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:35.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:35.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:35.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:35.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:35.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:35.985 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:27:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:40.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:40.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:40.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:40.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:40.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:40.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:40.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:40.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:40.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:40.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:40.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:40.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:40.993 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:27:40.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:40.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:40.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:27:40.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:40.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:27:40.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:27:40.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:40.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:40.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:40.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:27:40.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:40.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:27:40.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:27:40.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:27:40.998 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:27:40.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:40.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:41.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:41.000 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:27:41.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:46.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:46.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:46.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:46.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:46.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:46.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:46.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:46.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:46.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:46.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:27:46.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:46.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:27:46.008 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:27:46.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:46.009 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:27:46.009 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:27:46.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:46.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:27:46.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:27:46.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:27:46.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:27:46.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:27:46.013 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:27:46.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:27:46.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:27:46.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:27:46.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:27:46.529 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:27:46.530 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:27:46.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:27:46.530 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:27:46.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:27:47.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:47.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:47.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:47.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:47.409 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:27:47.871 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:27:48.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:48.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:48.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:48.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:48.334 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:27:48.797 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:27:49.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:49.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:49.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:49.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:49.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:27:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:27:50.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:50.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:50.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:50.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:50.187 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:27:50.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:27:51.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:51.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:51.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:51.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:51.112 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:27:51.574 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:27:52.037 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:27:52.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:27:52.963 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:27:53.426 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:27:53.888 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:27:54.350 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:27:54.815 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:27:55.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:27:55.740 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:27:56.203 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:27:56.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:27:56.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:27:56.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:27:56.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:27:56.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:27:56.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:27:56.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:27:56.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:27:56.534 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:27:56.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:27:56.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:01.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:01.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:01.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:01.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:01.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:01.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:01.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:01.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:01.543 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:01.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:01.544 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:28:01.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:28:01.545 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:28:01.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:01.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:01.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:01.546 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:28:01.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:01.546 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:28:01.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:01.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:28:01.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:28:01.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:01.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:01.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:01.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:28:01.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:01.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:28:01.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:01.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:01.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:28:01.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:01.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:28:01.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:28:01.554 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:28:01.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:01.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:01.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:01.555 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:28:06.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:06.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:06.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:06.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:06.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:06.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:06.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:06.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:06.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:06.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:06.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:06.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:06.567 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:28:06.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:06.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:06.569 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:28:06.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:06.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:28:06.570 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:28:06.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:06.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:06.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:28:06.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:06.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:06.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:28:06.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:28:06.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:28:06.575 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:28:06.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:06.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:06.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:28:07.042 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:28:07.089 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:28:07.089 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:28:07.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:28:07.089 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:28:07.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:28:07.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:07.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:07.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:07.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:07.967 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:28:08.429 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:28:08.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:08.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:08.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:08.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:08.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:28:09.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:28:09.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:09.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:09.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:09.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:09.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:28:10.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:28:10.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:10.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:10.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:10.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:10.840 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:28:11.302 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:28:11.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:11.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:11.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:11.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:11.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:28:12.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:28:12.690 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:28:13.153 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:28:13.617 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:28:14.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:28:14.544 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:28:15.006 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:28:15.469 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:28:15.932 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:28:16.394 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:28:16.859 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:28:17.322 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:28:17.785 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:28:18.248 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:28:18.711 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:28:19.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:19.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:19.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:19.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:19.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:19.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:19.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:19.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:19.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:19.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:19.094 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:28:24.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:24.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:24.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:24.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:24.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:24.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:24.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:24.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:24.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:24.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:24.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:24.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:24.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:28:24.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:24.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:28:24.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:28:24.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:24.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:24.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:28:24.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:24.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:24.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:28:24.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:24.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:24.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:28:24.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:24.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:28:24.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:28:24.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:28:24.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:28:24.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:28:24.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:28:24.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:28:24.106 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:28:24.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:24.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:24.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:24.107 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:28:29.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:29.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:29.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:29.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:29.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:29.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:29.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:29.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:29.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:29.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:29.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:28:29.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:28:29.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:28:29.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:29.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:29.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:29.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:29.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:29.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:29.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:28:29.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:29.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:28:29.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:28:29.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:29.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:29.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:29.117 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:28:29.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:29.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:28:29.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:28:29.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:28:29.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:28:29.120 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:28:29.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:29.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:29.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:29.124 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:28:29.590 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:28:29.635 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:28:29.635 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:28:29.635 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:28:29.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:28:29.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:28:29.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:28:29.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:28:29.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:28:29.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:28:29.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:28:29.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:28:29.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:28:29.679 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:28:29.679 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:28:29.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:28:29.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:28:30.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:28:30.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:30.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:30.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:30.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:30.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:28:30.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:28:31.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:31.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:31.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:31.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:31.455 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:28:31.922 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:28:32.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:32.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:32.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:32.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:32.389 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:28:32.855 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:28:33.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:33.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:33.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:33.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:33.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:28:33.780 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:28:34.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:34.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:34.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:34.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:34.244 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:28:34.708 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:28:35.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:28:35.634 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:28:36.097 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:28:36.561 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:28:37.024 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:28:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:28:37.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:28:37.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:28:37.680 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:28:37.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:37.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:37.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:37.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:37.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:37.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:37.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:37.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:37.683 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:28:37.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:37.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:42.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:42.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:42.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:42.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:42.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:42.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:42.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:42.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:42.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:42.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:42.688 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:42.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:42.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:28:42.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:42.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:28:42.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:28:42.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:42.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:42.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:42.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:28:42.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:42.691 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:28:42.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:42.692 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:28:42.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:28:42.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:42.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:42.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:42.693 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:28:42.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:42.693 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:28:42.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:28:42.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:28:42.696 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:28:42.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:28:42.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:42.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:42.698 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:28:42.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:47.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:47.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:47.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:47.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:47.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:47.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:47.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:47.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:47.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:47.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:28:47.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:47.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:28:47.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:28:47.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:47.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:28:47.711 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:28:47.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:47.714 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:28:47.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:28:47.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:28:47.718 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:28:47.719 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:28:47.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:28:47.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:28:47.723 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:28:48.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:28:48.242 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:28:48.243 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:28:48.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:28:48.244 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:28:48.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:28:48.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:28:48.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:28:48.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:28:48.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:28:48.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:28:48.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:28:48.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:28:48.274 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:28:48.275 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:28:48.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:28:48.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:28:48.649 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:28:48.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:48.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:48.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:48.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:49.113 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:28:49.576 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:28:49.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:49.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:49.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:49.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:50.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:28:50.504 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:28:50.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:50.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:50.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:50.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:50.968 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:28:51.431 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:28:51.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:51.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:51.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:51.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:51.893 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:28:52.356 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:28:52.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:52.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:52.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:52.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:52.819 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:28:53.282 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:28:53.745 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:28:54.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:28:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:28:55.135 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:28:55.598 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:28:56.061 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:28:56.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:28:56.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:28:56.277 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:28:56.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:28:56.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:28:56.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:28:56.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:28:56.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:28:56.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:28:56.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:28:56.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:28:56.279 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:28:56.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:28:56.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:01.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:01.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:01.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:01.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:01.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:01.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:01.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:01.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:01.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:01.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:01.289 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:01.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:01.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:29:01.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:01.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:01.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:29:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:01.295 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:01.295 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:29:01.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:01.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:29:01.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:29:01.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:29:01.298 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:29:01.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:01.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:01.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:01.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:01.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:01.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:01.300 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:29:01.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:06.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:06.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:06.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:06.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:06.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:06.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:06.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:06.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:06.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:06.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:06.307 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:06.308 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:06.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:29:06.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:06.309 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:29:06.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:29:06.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:06.310 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:06.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:29:06.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:06.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:06.310 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:29:06.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:06.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:06.312 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:29:06.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:29:06.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:29:06.314 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:29:06.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:06.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:29:06.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:29:06.830 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:29:06.830 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:29:06.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:29:06.831 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:29:06.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:29:06.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:29:06.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:29:06.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:06.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:29:06.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:29:06.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:29:06.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:29:06.871 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:29:06.871 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:29:06.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:06.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:07.245 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:29:07.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:07.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:07.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:07.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:07.708 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:29:08.172 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:29:08.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:08.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:08.634 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:29:09.097 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:29:09.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:09.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:09.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:09.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:09.560 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:29:10.023 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:29:10.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:10.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:10.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:10.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:10.485 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:29:10.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:29:11.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:11.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:11.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:11.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:11.411 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:29:11.873 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:29:12.336 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:29:12.799 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:29:13.261 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:29:13.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:29:14.186 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:29:14.649 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:29:14.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:29:14.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:29:14.873 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:29:14.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:14.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:14.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:14.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:14.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:14.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:14.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:14.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:14.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:14.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:14.875 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:29:19.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:19.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:19.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:19.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:19.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:19.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:19.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:19.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:19.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:19.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:19.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:29:19.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:19.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:19.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:29:19.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:19.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:19.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:29:19.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:29:19.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:29:19.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:29:19.890 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:29:19.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:19.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:19.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:19.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:19.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:19.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:19.891 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:29:19.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:19.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:24.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:24.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:24.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:24.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:24.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:24.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:24.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:24.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:24.899 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:24.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:24.900 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:24.901 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:24.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:29:24.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:24.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:24.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:29:24.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:24.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:24.906 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:29:24.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.909 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:29:24.909 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:29:24.909 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:29:24.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:24.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:24.914 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:29:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:29:25.428 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:29:25.429 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:29:25.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:29:25.430 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:29:25.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:29:25.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:29:25.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:29:25.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:25.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:29:25.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:29:25.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:29:25.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:29:25.467 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:29:25.467 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:29:25.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:25.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:25.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:29:25.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:25.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:25.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:25.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:26.311 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:29:26.777 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:29:26.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:26.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:26.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:26.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:27.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:29:27.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:29:27.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:27.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:27.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:27.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:28.170 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:29:28.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:29:28.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:28.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:28.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:28.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:29.094 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:29:29.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:29:29.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:29.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:29.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:29.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:30.019 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:29:30.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:29:31.045 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:29:31.509 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:29:31.972 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:29:32.435 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:29:32.898 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:29:33.362 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:29:33.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:29:33.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:29:33.469 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:29:33.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:33.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:33.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:33.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:33.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:33.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:33.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:33.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:33.471 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:29:33.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:33.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:33.471 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:38.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:38.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:38.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:38.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:38.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:38.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:38.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:38.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:38.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:38.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:38.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:29:38.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:29:38.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:29:38.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:38.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:38.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:38.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:29:38.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:38.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:29:38.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:38.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:38.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:29:38.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:38.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:38.481 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:29:38.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.483 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:29:38.483 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:29:38.483 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:29:38.483 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:38.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:38.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:38.485 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:29:43.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:43.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:43.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:43.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:43.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:43.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:43.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:43.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:43.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:43.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:29:43.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:29:43.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:29:43.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:29:43.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:43.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:43.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:43.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:29:43.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:29:43.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:29:43.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:43.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:29:43.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:29:43.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:43.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:29:43.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:29:43.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:29:43.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:29:43.499 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:29:43.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:29:43.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:29:43.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:29:43.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:29:44.016 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:29:44.016 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:29:44.016 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:29:44.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:29:44.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:29:44.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:29:44.055 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:29:44.055 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:29:44.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:44.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:29:44.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:29:44.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:44.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:44.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:44.893 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:29:45.356 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:29:45.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:45.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:45.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:45.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:45.818 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:29:46.282 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:29:46.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:46.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:46.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:46.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:46.745 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:29:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:29:47.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:47.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:47.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:47.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:47.671 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:29:48.134 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:29:48.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:48.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:48.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:48.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:48.596 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:29:49.060 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:29:49.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:29:50.080 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:29:50.544 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:29:51.007 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:29:51.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:29:51.935 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:29:52.398 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:29:52.861 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:29:53.327 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:29:53.792 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:29:54.260 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:29:54.728 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:29:55.199 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:29:55.669 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:29:56.136 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:29:56.603 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:29:57.070 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:29:57.536 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:29:58.006 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:29:58.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:29:58.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:29:58.058 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:29:58.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:29:58.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:29:58.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:29:58.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:29:58.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:29:58.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:29:58.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:29:58.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:29:58.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:29:58.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:29:58.066 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:29:58.067 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3177 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:04.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:04.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:04.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:04.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:04.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:04.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:04.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:04.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:04.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:04.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:04.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:30:04.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:04.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:04.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:04.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:04.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:04.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:04.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:04.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:30:04.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:04.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:04.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:04.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:04.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:04.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:04.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:04.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:04.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:30:04.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:04.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:04.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:04.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:04.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:04.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:04.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:04.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:04.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:30:04.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:30:04.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:30:04.354 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:04.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:04.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:04.355 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:30:04.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:09.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:09.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:09.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:09.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:09.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:09.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:09.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:09.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:09.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:09.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:09.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:30:09.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:09.387 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:09.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:09.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:09.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:09.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:09.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:09.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:30:09.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:09.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:09.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:09.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:09.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:09.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:09.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:09.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:09.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:30:09.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:09.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:09.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:09.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:09.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:09.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:09.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:09.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:09.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:30:09.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:09.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:30:09.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:30:09.397 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:09.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:09.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:09.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:30:09.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:30:09.919 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:30:09.920 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:30:09.921 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:30:09.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:09.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:09.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:30:09.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:30:09.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:09.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:09.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:09.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:30:09.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:30:09.959 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:30:09.959 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:30:09.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:09.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:10.334 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:30:10.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:10.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:10.797 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:30:11.260 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:30:11.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:11.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:11.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:11.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:11.724 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:30:12.187 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:30:12.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:12.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:12.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:12.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:12.650 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:30:13.114 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:30:13.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:13.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:13.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:13.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:13.578 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:30:14.044 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:30:14.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:14.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:14.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:14.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:14.509 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:30:14.975 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:30:15.438 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:30:15.907 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:30:16.371 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:30:16.835 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:30:17.301 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:30:17.765 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:30:17.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:17.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:30:17.960 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:30:17.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:17.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:17.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:17.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:17.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:17.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:17.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:17.962 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:30:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:17.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:22.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:22.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:22.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:22.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:22.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:22.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:22.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:22.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:22.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:22.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:22.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:30:22.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:22.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:22.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:22.995 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:22.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:22.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:22.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:22.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:30:22.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:23.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:23.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:23.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:23.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:23.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:23.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:23.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:23.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:30:23.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:23.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:23.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:23.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:23.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:23.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:23.006 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:23.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:23.006 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:30:23.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:23.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:30:23.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:30:23.013 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:23.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:23.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:23.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:23.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:23.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:23.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:23.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:23.016 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:30:23.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:23.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:28.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:28.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:28.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:28.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:28.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:28.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:28.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:28.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:28.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:28.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:30:28.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:28.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:28.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:28.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:28.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:28.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:28.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:28.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:30:28.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:28.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:28.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:28.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:28.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:28.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:28.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:28.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:28.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:30:28.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:28.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:28.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:28.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:28.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:28.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:28.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:28.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:28.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:30:28.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:28.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:30:28.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:30:28.051 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:28.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:28.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:28.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:28.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:28.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:30:28.521 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:30:28.571 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:30:28.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:28.572 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:30:28.572 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:30:28.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:28.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:30:28.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:30:28.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:28.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:28.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:28.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:30:28.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:30:28.609 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:30:28.609 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:30:28.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:28.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:28.984 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:30:29.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:29.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:29.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:29.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:29.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:30:29.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:30:30.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:30.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:30.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:30.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:30.379 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:30:30.844 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:30:31.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:31.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:31.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:31.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:31.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:30:31.778 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:30:32.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:32.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:30:32.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:30:33.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:33.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:33.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:33.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:33.174 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:30:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:30:34.114 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:30:34.583 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:30:35.047 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:30:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:30:35.979 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:30:36.445 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:30:36.914 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:30:37.385 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:30:37.849 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:30:38.316 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:30:38.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:38.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:30:38.616 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:30:38.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:38.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:38.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:38.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:38.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:38.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:38.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:38.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:38.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:38.628 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:30:38.628 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:38.628 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:38.628 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:38.628 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:38.629 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:38.629 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:38.629 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:30:43.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:43.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:43.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:43.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:43.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:43.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:43.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:43.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:43.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:43.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:43.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:43.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:43.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:30:43.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:43.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:43.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:30:43.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:43.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:43.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:43.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:43.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:43.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:43.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:43.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:43.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:30:43.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:43.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:43.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:43.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:43.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:43.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:43.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:30:43.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:30:43.633 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:43.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:43.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:43.634 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:30:43.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:48.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:48.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:30:48.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:48.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:48.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:48.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:48.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:48.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:48.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:48.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:48.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:30:48.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:48.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:48.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:48.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:48.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:48.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:48.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:48.641 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:30:48.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:48.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:48.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:48.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:48.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:48.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:48.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:48.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:48.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:30:48.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:48.644 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:48.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:30:48.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:30:48.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:30:48.646 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:48.646 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:48.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:48.651 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:30:49.113 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:30:49.159 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:30:49.160 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:30:49.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:49.160 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:30:49.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:49.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:30:49.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:30:49.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:49.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:49.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:49.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:30:49.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:30:49.201 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:30:49.201 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 03:30:49.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:49.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:49.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:30:49.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:49.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:49.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:49.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:50.040 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:30:50.503 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:30:50.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:50.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:50.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:50.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:50.966 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:30:51.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:30:51.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:51.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:51.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:51.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:51.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:30:52.359 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:30:52.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:52.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:52.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:52.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:52.825 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:30:53.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:30:53.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:53.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:53.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:53.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:53.756 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:30:54.220 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:30:54.685 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:30:55.151 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:30:55.615 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:30:56.078 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:30:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:30:57.004 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:30:57.466 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:30:57.929 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:30:58.393 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:30:58.855 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:30:59.318 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:30:59.784 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:31:00.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:00.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:31:00.203 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:31:00.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:00.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:00.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:00.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:00.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:00.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:00.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:00.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:00.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:00.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:00.205 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:05.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:05.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:05.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:05.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:05.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:05.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:05.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:05.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:05.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:05.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:05.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:05.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:05.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:05.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:05.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:05.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:05.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:05.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:05.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:05.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:05.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:05.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:05.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:05.214 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:05.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:05.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:05.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:05.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:05.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:05.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:05.215 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:05.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:31:05.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:31:05.217 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:05.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:05.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:05.218 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:05.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:10.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:10.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:10.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:10.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:10.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:10.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:10.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:10.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:10.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:10.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:10.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:10.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:10.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:10.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:10.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:10.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:10.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:10.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:10.227 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:10.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:10.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:10.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:10.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:10.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:10.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:10.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:10.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:31:10.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:31:10.231 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:10.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:10.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:10.746 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:10.747 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:10.747 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.160 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:31:11.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:11.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:11.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:11.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:11.623 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:31:12.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:31:12.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:12.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:12.548 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:31:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:31:13.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:13.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:13.474 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:31:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:31:14.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:14.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:14.400 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:31:14.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:31:15.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:15.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:15.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:15.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:15.325 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:31:15.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:31:16.249 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:31:16.712 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:31:17.174 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:31:17.636 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:31:18.099 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:31:18.561 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:31:19.023 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:31:19.486 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:31:19.948 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:31:20.410 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:31:20.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:20.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:20.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:20.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:20.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:20.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:20.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:20.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:20.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:20.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:20.751 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:20.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2320 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:20.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2320 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:20.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2320 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:20.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2320 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:20.751 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2320 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:25.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:25.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:25.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:25.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:25.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:25.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:25.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:25.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:25.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:25.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:25.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:25.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:25.759 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:25.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:25.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:25.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:25.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:25.760 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:25.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:25.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:25.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:25.761 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:25.762 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:25.762 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:25.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:25.762 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:25.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:25.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:25.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:25.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:25.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:31:25.766 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:31:25.766 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:25.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:25.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:25.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:25.767 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:25.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:30.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:30.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:30.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:30.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:30.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:30.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:30.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:30.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:30.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:30.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:30.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:30.775 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:30.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:30.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:30.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:30.777 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:30.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:30.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:30.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:30.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:30.780 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:30.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:30.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:30.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:30.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:30.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:31:30.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:31:30.783 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:30.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:30.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:30.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:30.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:31.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:31.297 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:31.298 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:31.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:31.299 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:31.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:31:31.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:31.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:31.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:31.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:32.174 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:31:32.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:31:32.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:32.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:32.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:32.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:33.099 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:31:33.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:31:33.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:33.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:33.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:33.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:34.024 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:31:34.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:31:34.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:34.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:34.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:34.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:34.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:31:35.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:31:35.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:35.873 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:31:36.335 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:31:36.798 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:31:37.260 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:31:37.722 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:31:38.185 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:31:38.647 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:31:39.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:31:39.571 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:31:40.034 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:31:40.497 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:31:40.959 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:31:41.421 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:31:41.884 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:31:42.346 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:31:42.809 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:31:43.272 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:31:43.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:43.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:43.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:43.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:43.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:43.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:43.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:43.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:43.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:43.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:43.304 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:48.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:48.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:48.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:48.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:48.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:48.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:48.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:48.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:48.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:48.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:48.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:48.312 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:48.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:48.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:48.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:48.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:48.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:48.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:48.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:48.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:48.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:48.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:48.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:48.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:48.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:48.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:48.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:48.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:48.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:48.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:48.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:48.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:31:48.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:31:48.318 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:48.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:48.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:48.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:48.837 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:48.838 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:48.838 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:48.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:48.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:31:48.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:31:49.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:31:49.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:49.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:49.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:49.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:49.711 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:31:50.174 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:31:50.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:50.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:50.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:50.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:50.636 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:31:51.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:31:51.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:51.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:51.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:51.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:31:52.025 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:31:52.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:52.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:52.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:52.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:52.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:31:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:31:53.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:53.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:53.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:53.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:53.414 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:31:53.877 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:31:54.340 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:31:54.803 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:31:55.266 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:31:55.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:31:56.192 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:31:56.658 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:31:57.121 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:31:57.586 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:31:58.050 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:31:58.541 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:31:59.006 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:31:59.471 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:31:59.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:59.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:31:59.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:59.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:59.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:59.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:59.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:59.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:59.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:59.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:59.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:59.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:31:59.880 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:59.880 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:59.881 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:59.881 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:59.881 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:59.881 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:59.881 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:59.881 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2539 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:04.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:04.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:04.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:04.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:04.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:04.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:04.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:04.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:04.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:04.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:04.889 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:32:04.891 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:32:04.891 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:32:04.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:04.891 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:04.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:04.891 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:32:04.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:04.891 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:32:04.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:04.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:32:04.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:32:04.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:04.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:04.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:04.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:32:04.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:04.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:32:04.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:04.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:32:04.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:32:04.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:04.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:04.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:04.898 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:32:04.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:04.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:32:04.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:32:04.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:32:04.902 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:04.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:32:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:32:05.425 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:32:05.426 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:32:05.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:05.427 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:32:05.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:05.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:05.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:05.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:05.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:05.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:05.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:05.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:05.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:32:05.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:05.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:05.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:05.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:06.304 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:32:06.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:32:06.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:06.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:06.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:06.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:07.234 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:32:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:32:07.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:07.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:07.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:07.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:08.161 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:32:08.626 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:32:08.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:08.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:08.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:08.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:09.089 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:32:09.553 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:32:09.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:09.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:09.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:09.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:10.017 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:32:10.480 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:32:10.944 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:32:11.407 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:32:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:32:12.333 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:32:12.797 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:32:13.259 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:32:13.722 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:32:14.185 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:32:14.647 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:32:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:32:15.572 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:32:16.035 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:32:16.498 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:32:16.960 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:32:17.423 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:32:17.886 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:32:18.349 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:32:18.811 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:32:19.274 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:32:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:32:20.200 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:32:20.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:20.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:20.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:20.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:20.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:20.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:20.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:20.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:20.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:20.465 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:32:25.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:25.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:25.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:25.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:25.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:25.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:25.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:25.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:25.471 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:25.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:25.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:32:25.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:32:25.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:32:25.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:25.472 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:25.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:25.472 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:32:25.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:25.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:32:25.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:25.475 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:25.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:32:25.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:25.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:25.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:32:25.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:32:25.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:32:25.481 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:32:25.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:32:25.996 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:32:25.997 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:32:25.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:25.998 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:32:26.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:26.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:26.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:26.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:26.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:26.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:26.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:26.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:26.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:26.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:26.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:26.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:26.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:26.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:26.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:26.041 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:32:26.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:26.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:31.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:31.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:31.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:31.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:31.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:31.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:31.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:31.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:31.046 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:31.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:31.046 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:31.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:31.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:32:31.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:31.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:32:31.048 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:32:31.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:31.048 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:31.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:31.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:32:31.049 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:31.049 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:32:31.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:31.050 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:31.050 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:32:31.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:32:31.053 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:32:31.053 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:32:31.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:31.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:31.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:32:31.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:32:31.564 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:32:31.565 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:32:31.565 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:32:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:31.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:31.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:31.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:31.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:31.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:31.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:31.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:31.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:31.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:31.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:31.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:31.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:31.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:31.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:31.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:31.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:31.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:31.751 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:32:31.751 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:32:31.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:31.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.914 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:32:31.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:31.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:31.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:31.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:31.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:31.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:31.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:31.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:31.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:31.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:31.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:31.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:31.982 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:32:32.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:32.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:32.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:32.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:32.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:32.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:32.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:32.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:32.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:32.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:32.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:32.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:32.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:32.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:32.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:32.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:32.162 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:32:32.162 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:32:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.445 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:32:32.907 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:32:33.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:33.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:33.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:33.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:33.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:33.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:33.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:33.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:33.220 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:32:33.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:33.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:33.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:33.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:33.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:33.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:33.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:33.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:33.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:33.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:33.224 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:32:38.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:38.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:38.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:38.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:38.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:38.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:38.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:38.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:38.230 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:38.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:32:38.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:38.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:32:38.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:32:38.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:38.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:32:38.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:32:38.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:38.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:32:38.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:32:38.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:38.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:32:38.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:32:38.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:32:38.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:32:38.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:32:38.240 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:32:38.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:32:38.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:32:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:38.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:32:38.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:32:38.752 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:32:38.752 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:32:38.753 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:32:38.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:38.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:38.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:38.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:38.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:38.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:38.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:38.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:38.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:38.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:38.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:38.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:38.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:38.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:38.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:38.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:38.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:39.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:32:39.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:39.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:39.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:39.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:39.631 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:32:40.094 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:32:40.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:40.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:40.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:40.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:40.556 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:32:41.019 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:32:41.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:41.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:41.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:41.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:41.482 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:32:41.944 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:32:42.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:42.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:42.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:42.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:42.407 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:32:42.869 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:32:43.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:43.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:43.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:43.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:43.332 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:32:43.794 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:32:43.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:43.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:43.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:43.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:43.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:43.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:43.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:43.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:43.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:43.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:43.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:43.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:43.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:43.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:43.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:43.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:43.835 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:32:43.836 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:32:43.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:43.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:44.256 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:32:44.718 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:32:45.181 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:32:45.643 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:32:46.105 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:32:46.568 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:32:47.030 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:32:47.493 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:32:47.956 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:32:48.419 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:32:48.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:48.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:48.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:48.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:48.838 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:32:48.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:48.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:48.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:48.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:48.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:48.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:48.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:48.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:48.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:48.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:48.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:48.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:48.881 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:32:48.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:48.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:48.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:48.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:49.343 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:32:49.805 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:32:50.268 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:32:50.730 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:32:51.192 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:32:51.655 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:32:52.117 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:32:52.580 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:32:53.042 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:32:53.504 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:32:53.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:53.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:53.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:53.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:53.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:53.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:53.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:53.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:53.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:32:53.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:32:53.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:32:53.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:32:53.920 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:32:53.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.968 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:32:54.430 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:32:54.892 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:32:55.354 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:32:55.817 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:32:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:32:56.741 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:32:57.204 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:32:57.666 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:32:58.129 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:32:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:32:58.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:58.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:58.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:58.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:32:58.923 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:32:58.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:32:58.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:32:58.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:32:58.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:32:58.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:32:58.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:32:58.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:32:58.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:32:58.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:32:58.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:32:58.927 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:32:58.927 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:03.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:03.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:33:03.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:03.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:03.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:03.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:03.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:03.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:03.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:03.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:03.933 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:03.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:03.934 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:33:03.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:03.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:03.935 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:33:03.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:03.937 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:03.937 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:33:03.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:33:03.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:33:03.939 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:33:03.939 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:03.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:33:04.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:33:04.451 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:33:04.451 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:33:04.452 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:33:04.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:04.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:04.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:04.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:04.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:04.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:04.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:04.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:04.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:04.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:04.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:04.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:04.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:04.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:04.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:04.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:04.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:04.870 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:33:04.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:04.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:05.332 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:33:05.795 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:33:05.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:05.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:05.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:05.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:06.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:33:06.721 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:06.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:07.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:33:07.646 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:33:07.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:07.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:07.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:07.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:08.109 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:33:08.574 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:33:08.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:08.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:08.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:08.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:09.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:33:09.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:09.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:09.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:09.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:09.500 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:33:09.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:09.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:09.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:09.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:09.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:09.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:09.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:09.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:09.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:09.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:09.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:09.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:09.541 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:33:09.541 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:33:09.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:09.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:09.963 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:33:10.428 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:33:10.895 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:33:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:33:11.820 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:33:12.283 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:33:12.747 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:33:13.210 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:33:13.673 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:33:14.138 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:33:14.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:14.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:14.545 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:33:14.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:14.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:14.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:14.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:14.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:14.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:14.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:14.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:14.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:14.602 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:33:14.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:14.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:14.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.067 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:33:15.531 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:33:15.995 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:33:16.458 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:33:16.921 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:33:17.384 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:33:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:33:18.310 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:33:18.772 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:33:19.236 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:33:19.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:19.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:19.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:19.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:19.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:19.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:19.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:19.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:19.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:19.648 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:33:19.648 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:33:19.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.699 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:33:20.162 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:33:20.625 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:33:21.089 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:33:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:33:22.015 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:33:22.478 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:33:22.940 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:33:23.405 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:33:23.871 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:33:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:33:24.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:24.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:24.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:24.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:24.651 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:33:24.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:24.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:24.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:24.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:24.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:24.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:24.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:24.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:33:24.661 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:33:24.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:24.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:24.661 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=4560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:29.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:29.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:33:29.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:29.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:29.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:29.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:29.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:29.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:29.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:29.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:29.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:33:29.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:33:29.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:33:29.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:29.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:29.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:29.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:33:29.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:29.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:33:29.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:29.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:29.681 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:33:29.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:29.683 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:29.683 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:33:29.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:29.685 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:33:29.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:33:29.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:33:29.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:33:29.685 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:33:29.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:33:29.686 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:33:29.686 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:33:29.686 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:29.691 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:33:30.154 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:33:30.201 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:33:30.201 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:33:30.202 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:33:30.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:30.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:30.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:30.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:30.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:30.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:30.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:30.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:30.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:30.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:30.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:30.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:30.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:30.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:30.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:33:30.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:30.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:30.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:30.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:31.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:33:31.547 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:33:31.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:31.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:31.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:31.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:32.011 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:33:32.473 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:33:32.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:32.937 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:33:33.401 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:33:33.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:33.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:33.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:33.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:33.869 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:33:34.332 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:33:34.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:34.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:34.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:34.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:34.796 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:33:35.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:35.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:35.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:35.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:35.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:35.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:35.259 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:33:35.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:35.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:35.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:35.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:35.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:35.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:35.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:35.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:35.301 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:33:35.301 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:33:35.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.723 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:33:36.186 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:33:36.650 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:33:37.115 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:33:37.578 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:33:38.045 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:33:38.509 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:33:38.974 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:33:39.437 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:33:39.902 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:33:40.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:40.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:40.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:40.304 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:33:40.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:40.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:40.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:40.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:40.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:40.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:40.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:40.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:40.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:40.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:40.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:40.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:40.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:40.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.366 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:33:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:33:41.298 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:33:41.763 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:33:42.228 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:33:42.697 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:33:43.161 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:33:43.623 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:33:44.087 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:33:44.552 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:33:45.020 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:33:45.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:45.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:45.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:45.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:45.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:45.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:45.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:45.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:45.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:45.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:45.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:45.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:45.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:45.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:45.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:45.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:45.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:33:45.434 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:33:45.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:45.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:45.485 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:33:45.952 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:33:46.415 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:33:46.886 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:33:47.355 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:33:47.822 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:33:48.292 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:33:48.756 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:33:49.223 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:33:49.688 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:33:50.153 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:33:50.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:50.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:50.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:50.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:50.438 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:33:50.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:50.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:50.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:50.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:50.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:50.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:50.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:50.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:33:50.443 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:33:50.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:50.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:55.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:55.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:33:55.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:55.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:55.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:55.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:55.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:55.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:55.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:55.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:55.463 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:55.465 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:55.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:33:55.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:55.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:55.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:33:55.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:55.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:33:55.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:33:55.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:55.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:55.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:55.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:33:55.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:55.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:33:55.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:33:55.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:33:55.470 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:33:55.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:55.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:55.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:33:55.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:33:55.985 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:33:55.986 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:33:55.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:55.987 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:33:55.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:55.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:55.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:56.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:56.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:33:56.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:33:56.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:56.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:56.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:56.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:56.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:33:56.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:33:56.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:56.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:56.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:56.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:56.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:33:56.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:56.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:56.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:56.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:56.867 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:33:57.330 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:33:57.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:57.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:57.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:57.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:57.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:33:58.256 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:33:58.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:58.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:58.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:58.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:58.719 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:33:59.182 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:33:59.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:59.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:59.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:59.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:59.645 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:34:00.108 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:34:00.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:00.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:00.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:00.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:00.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:34:01.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:01.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:01.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:01.035 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:34:01.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:01.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:01.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:01.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:01.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:01.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:01.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:01.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:01.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:01.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:01.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:01.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:34:01.078 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:34:01.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.498 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:34:01.960 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:34:02.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:34:02.886 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:34:03.348 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:34:03.811 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:34:04.274 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:34:04.737 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:34:05.200 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:34:05.663 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:34:06.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:06.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:06.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:06.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:06.080 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:34:06.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:06.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:06.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:06.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:06.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:06.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:06.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:06.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:06.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:06.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:06.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:06.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:06.126 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:34:06.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:06.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:06.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:06.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:06.589 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:34:07.052 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:34:07.514 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:34:07.977 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:34:08.440 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:34:08.902 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:34:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:34:09.827 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:34:10.291 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:34:10.754 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:34:11.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:11.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:11.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:11.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:11.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:11.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:11.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:11.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:11.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:11.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:11.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:11.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:11.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:11.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:11.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:11.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:11.167 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:34:11.167 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:34:11.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:11.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:11.218 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:34:11.680 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:34:12.143 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:34:12.617 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:34:13.080 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:34:13.543 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:34:14.006 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:34:14.469 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:34:14.932 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:34:15.395 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:34:15.858 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:34:16.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:16.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:16.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:16.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:16.169 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:34:16.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:16.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:16.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:16.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:16.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:16.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:16.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:34:16.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:34:16.174 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:34:16.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:16.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:21.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:34:21.176 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:34:21.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:21.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:21.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:21.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:21.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:21.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:34:21.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:21.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:34:21.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:34:21.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:34:21.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:34:21.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:34:21.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:34:21.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:34:21.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:34:21.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:34:21.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:34:21.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:34:21.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:34:21.187 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:34:21.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:21.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:21.191 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:34:21.654 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:34:21.701 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:34:21.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:21.702 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:34:21.703 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:34:21.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:21.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:21.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:21.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:21.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:21.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:21.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:21.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:21.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:21.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:21.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:21.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:21.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:21.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:21.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:21.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:21.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:21.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:21.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:21.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:21.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:21.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:21.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:21.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:21.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:21.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:21.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:21.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:21.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:21.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:21.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:21.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:22.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:34:22.025 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:34:22.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.117 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:34:22.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:22.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:22.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:22.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:22.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:22.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:22.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:22.400 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:34:22.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:22.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:22.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:22.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:22.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:22.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:22.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:22.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:22.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:22.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:22.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:22.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:22.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.580 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:34:23.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:34:23.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:23.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:23.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:23.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:23.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:23.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:23.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:23.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:23.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:23.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:23.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:23.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:23.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:23.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:23.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:23.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:23.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:23.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:23.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:23.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:23.220 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:34:23.220 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:34:23.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:23.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:23.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:34:23.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:23.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:23.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:23.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:23.817 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:34:23.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:23.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:23.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:23.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:23.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:23.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:23.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:34:23.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:34:23.821 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:34:23.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:23.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:28.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:34:28.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:34:28.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:28.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:28.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:28.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:28.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:28.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:34:28.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:28.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:34:28.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:34:28.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:34:28.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:34:28.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:34:28.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:28.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:28.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:34:28.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:34:28.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:34:28.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:34:28.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:34:28.829 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:34:28.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:34:28.830 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:34:28.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:34:28.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:28.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:34:28.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:34:28.834 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:34:28.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:28.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:28.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:34:29.301 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:34:29.346 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:34:29.346 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:34:29.346 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:34:29.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:29.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:29.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:29.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:29.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:29.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:29.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:29.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:29.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:29.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:29.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:29.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:29.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:29.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:29.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:29.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:29.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:29.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:34:29.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:29.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:29.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:29.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:30.226 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:34:30.689 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:34:30.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:30.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:30.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:30.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:31.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:34:31.613 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:34:31.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:31.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:31.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:31.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:32.076 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:34:32.539 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:34:32.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:32.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:32.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:32.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:33.001 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:34:33.464 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:34:33.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:33.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:33.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:33.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:33.927 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:34:34.391 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:34:34.854 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:34:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:34:35.780 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:34:36.242 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:34:36.705 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:34:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:34:37.631 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:34:38.094 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:34:38.557 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:34:39.020 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:34:39.482 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:34:39.948 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:34:40.412 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:34:40.875 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:34:41.337 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:34:41.800 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:34:42.263 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:34:42.725 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:34:43.189 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:34:43.653 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:34:44.115 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:34:44.578 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:34:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:34:45.525 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:34:45.988 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:34:46.451 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:34:46.913 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:34:47.376 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:34:47.838 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:34:48.301 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:34:48.764 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:34:49.227 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:34:49.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:49.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:49.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:49.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:49.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:49.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:49.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:49.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:49.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:34:49.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:34:49.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:49.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:49.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:49.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:49.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:34:49.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:34:49.458 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:34:49.458 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:34:49.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:49.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:49.690 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:34:50.152 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:34:50.615 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:34:51.078 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:34:51.540 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:34:52.003 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:34:52.466 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:34:52.930 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:34:53.392 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:34:53.855 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:34:54.318 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:34:54.780 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:34:55.243 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:34:55.705 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:34:56.168 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:34:56.631 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:34:57.093 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:34:57.556 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:34:58.019 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:34:58.481 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:34:58.944 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:34:59.406 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:34:59.869 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:35:00.332 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:35:00.794 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:35:01.257 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:35:01.720 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:35:02.183 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:35:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:35:03.118 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:35:03.582 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:35:04.046 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:35:04.510 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:35:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:35:05.439 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:35:05.903 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:35:06.366 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:35:06.829 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:35:07.293 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:35:07.756 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:35:08.220 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:35:08.684 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:35:09.147 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:35:09.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:09.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:09.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:09.465 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:35:09.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:09.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:09.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:35:09.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:09.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:09.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:35:09.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:09.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:09.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:09.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:35:09.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:35:09.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:09.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:09.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.610 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:35:10.074 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:35:10.536 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:35:10.999 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:35:11.462 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:35:11.925 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:35:12.388 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:35:12.851 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:35:13.314 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:35:13.777 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:35:14.240 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:35:14.703 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:35:15.166 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:35:15.630 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:35:16.093 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:35:16.556 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:35:17.019 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:35:17.482 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:35:17.945 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:35:18.409 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:35:18.874 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:35:19.338 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:35:19.803 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:35:20.267 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:35:20.731 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:35:21.194 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:35:21.658 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:35:22.122 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:35:22.586 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:35:23.050 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:35:23.513 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:35:23.977 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:35:24.440 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:35:24.902 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:35:25.365 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:35:25.828 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:35:26.290 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:35:26.753 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:35:27.216 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:35:27.678 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:35:28.141 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:35:28.603 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:35:29.066 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:35:29.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:29.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:29.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:29.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:35:29.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:29.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:29.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:35:29.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:29.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:29.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:29.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:35:29.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:29.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:29.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:29.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:35:29.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:35:29.570 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:35:29.570 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:35:29.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:29.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:29.991 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 03:35:30.454 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 03:35:30.917 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 03:35:31.379 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 03:35:31.842 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 03:35:32.304 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 03:35:32.766 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 03:35:33.229 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 03:35:33.692 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 03:35:34.154 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 03:35:34.618 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 03:35:35.081 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 03:35:35.545 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 03:35:36.008 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 03:35:36.473 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 03:35:36.937 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 03:35:37.400 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 03:35:37.863 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 03:35:38.325 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 03:35:38.788 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 03:35:39.250 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 03:35:39.713 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 03:35:40.178 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 03:35:40.643 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 03:35:41.108 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 03:35:41.572 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 03:35:42.036 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 03:35:42.499 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 03:35:42.963 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 03:35:43.426 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 03:35:43.889 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 03:35:44.352 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 03:35:44.815 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 03:35:45.278 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 03:35:45.741 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 03:35:46.204 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 03:35:46.667 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 03:35:47.130 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 03:35:47.593 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 03:35:48.056 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 03:35:48.519 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 03:35:48.984 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 03:35:49.449 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 03:35:49.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:49.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:49.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:49.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:35:49.577 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:35:49.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:49.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:49.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:49.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:49.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:49.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:49.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:49.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:35:49.586 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:35:49.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:49.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:49.587 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=17780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:54.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:54.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:35:54.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:54.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:54.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:54.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:54.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:54.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:54.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:54.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:54.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:35:54.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:35:54.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:35:54.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:54.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:54.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:54.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:35:54.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:54.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:35:54.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:54.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:54.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:35:54.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:54.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:35:54.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:35:54.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:54.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:54.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:54.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:35:54.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:54.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:35:54.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:54.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:35:54.612 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:35:54.612 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:35:54.612 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:54.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:54.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:35:54.614 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:35:59.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:59.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:35:59.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:59.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:59.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:59.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:59.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:59.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:59.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:59.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:59.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:35:59.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:35:59.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:35:59.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:59.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:59.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:59.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:35:59.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:59.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:35:59.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:59.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:59.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:35:59.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:59.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:35:59.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:35:59.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:59.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:59.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:59.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:35:59.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:59.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:35:59.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:35:59.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:35:59.627 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:35:59.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:59.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:59.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:36:00.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:36:00.144 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:36:00.145 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:36:00.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.146 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:36:00.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:00.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:00.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:00.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:00.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:00.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:00.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:00.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.557 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:36:00.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:00.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:00.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:00.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:00.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:00.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:00.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:00.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:00.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:00.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:00.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:00.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:00.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:00.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:00.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:00.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:00.881 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:00.881 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:36:00.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:00.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:36:01.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:01.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.149 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:01.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:01.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:01.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:01.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:01.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:01.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:01.199 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:01.199 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:36:01.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:01.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.474 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:01.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:01.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:01.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:36:01.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:01.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:01.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:01.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:01.523 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:01.523 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:36:01.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:01.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:01.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:01.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:01.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.824 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:01.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:01.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:01.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:01.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:01.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:01.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:01.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:01.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:01.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:01.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:01.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:01.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:01.946 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:36:02.408 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:36:02.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:02.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:02.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:02.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:02.871 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:36:03.333 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:36:03.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:03.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:03.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:03.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:03.796 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:36:04.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:04.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:04.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:04.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:04.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:04.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:04.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:04.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:04.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:04.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:04.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:04.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:04.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:04.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:04.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:04.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:04.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:04.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:04.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:04.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:04.721 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:36:05.184 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:36:05.648 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:36:06.112 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:36:06.576 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:36:06.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:06.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:06.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:06.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:06.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:06.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:06.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:06.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:06.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:06.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:06.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:06.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:06.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:06.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:06.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:06.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:06.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:07.042 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:36:07.507 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:36:07.969 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:36:08.433 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:36:08.899 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:36:09.364 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:36:09.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:09.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:09.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:09.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:09.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:09.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:09.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:09.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:09.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:09.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:09.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:09.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:09.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:09.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:09.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:09.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:09.543 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:09.543 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:36:09.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:09.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:09.828 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:36:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:36:10.759 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:36:11.226 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:36:11.691 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:36:12.156 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:36:12.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:12.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:12.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:12.236 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:12.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:12.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:12.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:12.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:12.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:12.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:12.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:12.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:12.244 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:12.244 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:36:12.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.621 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:36:13.083 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:36:13.546 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:36:14.009 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:36:14.472 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:36:14.935 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:36:15.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:15.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:15.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:15.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:15.015 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:15.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:15.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:15.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:15.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:15.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:15.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:15.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:15.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:15.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:15.069 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:15.069 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:36:15.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:15.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:15.400 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:36:15.866 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:36:16.328 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:36:16.790 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:36:17.253 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:36:17.716 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:36:17.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:17.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:17.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:17.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:17.792 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:17.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:17.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:17.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:17.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:17.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:17.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:17.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:36:17.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:36:17.797 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:36:17.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:17.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:22.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:36:22.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:36:22.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:22.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:22.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:22.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:22.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:22.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:36:22.815 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:22.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:36:22.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:36:22.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:36:22.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:36:22.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:36:22.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:36:22.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:36:22.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:22.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:36:22.820 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:36:22.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:36:22.820 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:22.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:22.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:36:22.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:36:22.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:36:22.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:22.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:36:22.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:36:22.823 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:36:22.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:22.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:22.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:36:23.292 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:36:23.337 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:36:23.337 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:36:23.337 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:36:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:23.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:23.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:23.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:23.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:23.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:23.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:23.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:23.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:23.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:23.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:23.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:23.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:23.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:23.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:23.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:23.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:23.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:36:23.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:23.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:23.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:23.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:24.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:36:24.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:36:24.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:24.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:24.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:24.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:25.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:36:25.619 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:36:25.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:25.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:25.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:26.087 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:36:26.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:26.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:26.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:26.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:26.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:26.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:26.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:26.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:26.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:26.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:26.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:26.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:26.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:26.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:26.554 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:36:26.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:26.556 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:36:26.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:26.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:27.022 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:36:27.491 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:36:27.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:27.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:27.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:27.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:27.960 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:36:28.431 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:36:28.901 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:36:29.372 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:36:29.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:29.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:29.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:29.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:29.755 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:29.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:29.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:29.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:29.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:29.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:29.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:29.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:29.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:29.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:29.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:29.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:29.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:29.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:29.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:29.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:29.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:29.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:36:30.309 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:36:30.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:36:31.240 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:36:31.710 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:36:32.183 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:36:32.655 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:36:33.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:33.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:33.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:33.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:33.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:33.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:33.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:33.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:33.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:33.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:33.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:33.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:33.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:33.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:33.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:33.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:33.123 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:33.124 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:36:33.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:33.124 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:36:33.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:33.596 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:36:34.067 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:36:34.531 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:36:34.998 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:36:35.469 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:36:35.938 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:36:36.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:36.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:36.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:36.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:36.284 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:36.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:36.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:36.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:36.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:36.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:36.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:36.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:36:36.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:36:36.301 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:36:36.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:36.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:36.301 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:36.301 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:36.301 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:36.301 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:36.302 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:36.302 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:36.302 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2936 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:41.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:36:41.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:36:41.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:41.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:41.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:41.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:41.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:41.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:36:41.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:41.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:36:41.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:36:41.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:36:41.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:36:41.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:36:41.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:41.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:41.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:36:41.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:36:41.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:36:41.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:41.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:36:41.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:36:41.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:36:41.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:41.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:41.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:36:41.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:36:41.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:36:41.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:41.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:36:41.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:36:41.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:36:41.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:41.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:41.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:36:41.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:36:41.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:36:41.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:41.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:36:41.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:36:41.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:36:41.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:36:41.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:36:41.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:36:41.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:36:41.336 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:36:41.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:41.341 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:36:41.811 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:36:41.871 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:36:41.872 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:36:41.873 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:36:41.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:41.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:41.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:41.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:41.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:41.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:41.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:41.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:41.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:41.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:41.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:41.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:41.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:41.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:41.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:41.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:41.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:42.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:42.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:42.281 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:36:42.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:42.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:42.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:42.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:42.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:42.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:42.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:42.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:42.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:42.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:42.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:42.323 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:42.323 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:36:42.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:42.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:42.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:42.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:42.745 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:36:42.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:42.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:42.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:42.803 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:42.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:42.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:42.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:42.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:42.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:42.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:42.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:42.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:42.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:42.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:42.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:42.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:42.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:42.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:42.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:43.210 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:36:43.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:43.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:43.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:43.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:43.681 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:36:44.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:36:44.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:44.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:44.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:44.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:44.610 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:36:45.076 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:36:45.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:45.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:45.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:45.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:45.542 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:36:45.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:45.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:45.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:45.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:45.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:45.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:45.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:45.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:45.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:45.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:45.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:45.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:45.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:45.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:45.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:45.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:45.778 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:45.778 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:36:45.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:45.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:46.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:36:46.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:46.482 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:36:46.954 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:36:47.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:36:47.897 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:36:48.369 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:36:48.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:48.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:48.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:48.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:48.691 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:48.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:48.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:48.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:48.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:48.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:48.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:48.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:48.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:48.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:36:48.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:36:48.706 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:48.706 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:36:53.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:36:53.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:36:53.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:53.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:53.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:53.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:53.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:36:53.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:36:53.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:53.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:36:53.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:36:53.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:36:53.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:36:53.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:36:53.736 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:53.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:36:53.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:36:53.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:36:53.737 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:36:53.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:36:53.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:36:53.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:36:53.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:36:53.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:36:53.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:36:53.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:53.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:36:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:36:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:36:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:36:53.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:36:53.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:36:53.751 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:36:53.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:36:53.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:53.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:36:54.229 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:36:54.288 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:36:54.290 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:36:54.291 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:36:54.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:54.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:54.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:54.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:54.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:54.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:54.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:54.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:54.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:54.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:54.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:54.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:54.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:54.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:54.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:54.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:54.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:54.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:36:54.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:54.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:54.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:54.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:55.167 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:36:55.640 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:36:55.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:55.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:55.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:55.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:55.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:55.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:55.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:55.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:55.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:55.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:55.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:55.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:55.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:55.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:55.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:55.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:55.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:36:55.729 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:36:55.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:55.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:55.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:55.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:55.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:55.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:56.107 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:36:56.574 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:36:56.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:56.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:56.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:56.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:57.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:36:57.509 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:36:57.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:57.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:57.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:57.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:57.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:57.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:57.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:57.833 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:36:57.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:57.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:57.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:57.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:57.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:36:57.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:36:57.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:57.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:57.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:57.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:57.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:36:57.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:36:57.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:57.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:57.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:57.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:57.981 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:36:58.453 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:36:58.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:36:58.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:36:58.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:36:58.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:36:58.922 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:36:59.387 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:36:59.852 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:37:00.319 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:37:00.785 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:37:01.250 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:37:01.715 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:37:02.188 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:37:02.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:02.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:02.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:02.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:37:02.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:02.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:02.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:02.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:02.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:02.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:02.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:02.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:02.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:02.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:02.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:37:02.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:37:02.698 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:37:02.698 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:37:02.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:02.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:03.122 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:37:03.595 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:37:04.066 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:37:04.536 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:37:05.008 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:37:05.481 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:37:05.954 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:37:06.427 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:37:06.899 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:37:07.371 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:37:07.843 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:37:08.311 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:37:08.780 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:37:09.244 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:37:09.711 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:37:10.176 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:37:10.641 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:37:11.108 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:37:11.573 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:37:12.037 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:37:12.502 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:37:12.968 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:37:13.436 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:37:13.903 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:37:14.376 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:37:14.842 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:37:15.307 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:37:15.778 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:37:16.250 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:37:16.720 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:37:17.191 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:37:17.659 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:37:18.133 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:37:18.605 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:37:19.077 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:37:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:37:20.019 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:37:20.493 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:37:20.965 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:37:21.432 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:37:21.905 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:37:22.378 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:37:22.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:22.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:22.677 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:37:22.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:22.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:22.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:22.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:22.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:22.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:22.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:22.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:22.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:22.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:37:22.682 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:37:22.683 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.683 [WARNING] transceiver.py:257 (TRX3@172.18.105.20:5700/3) RX TRXD message (ver=1 fn=6290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.683 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.683 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.683 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.683 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:22.684 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:37:27.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:27.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:37:27.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:27.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:27.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:27.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:27.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:27.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:27.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:27.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:27.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:37:27.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:37:27.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:37:27.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:27.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:27.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:27.700 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:37:27.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:27.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:37:27.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:27.703 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:37:27.703 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:37:27.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:27.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:27.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:27.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:37:27.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:27.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:37:27.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:27.708 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:37:27.708 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:37:27.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:27.709 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:27.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:27.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:37:27.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:27.709 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:37:27.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:27.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:37:27.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:37:27.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:37:27.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:37:27.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.716 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:37:27.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:37:27.717 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:37:27.717 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:37:27.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:27.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:27.722 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:37:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:37:28.247 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:37:28.249 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:37:28.251 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:37:28.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:28.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:28.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:28.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:28.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:28.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:28.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:28.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:28.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:37:28.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:37:28.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:28.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:28.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.666 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:37:28.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:28.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:28.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:28.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:28.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:28.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:28.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:28.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:28.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:28.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:28.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:37:28.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:37:28.990 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:37:28.990 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:37:28.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:37:29.602 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:37:29.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:29.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:29.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:29.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:29.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:29.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:29.906 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:37:29.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:29.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:29.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:29.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:29.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:29.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:29.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:29.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:29.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:29.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:37:29.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:37:29.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:29.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:29.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:30.072 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:37:30.544 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:37:30.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:30.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:30.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:30.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:31.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:37:31.490 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:37:31.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:31.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:31.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:31.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:31.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:31.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:31.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:31.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:31.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:31.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:31.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:31.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:31.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:31.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:31.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:31.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:37:31.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:37:31.958 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:37:31.958 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:37:31.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.961 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:37:32.433 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:37:32.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:32.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:32.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:32.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:32.905 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:37:33.375 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:37:33.847 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:37:34.320 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:37:34.793 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:37:35.262 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:37:35.736 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:37:36.207 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:37:36.680 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:37:37.152 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:37:37.625 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:37:38.096 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:37:38.568 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:37:39.041 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:37:39.511 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:37:39.975 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:37:40.440 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:37:40.907 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:37:41.379 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:37:41.852 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:37:42.325 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:37:42.797 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:37:43.270 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:37:43.742 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:37:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:37:44.685 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:37:45.155 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:37:45.627 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:37:46.100 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:37:46.572 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:37:47.039 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:37:47.506 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:37:47.977 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:37:48.448 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:37:48.921 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:37:49.393 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:37:49.865 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:37:50.337 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:37:50.810 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:37:51.282 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:37:51.755 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:37:51.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:51.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:51.903 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:37:51.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:51.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:51.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:51.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:51.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:51.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:51.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:51.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:37:51.908 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:37:51.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:51.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:56.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:56.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:37:56.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:56.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:56.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:56.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:56.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:56.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:56.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:56.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:56.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:37:56.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:37:56.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:37:56.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:56.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:56.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:56.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:37:56.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:56.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:37:56.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:56.937 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:37:56.937 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:37:56.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:56.937 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:56.938 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:37:56.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:56.938 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:37:56.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:56.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:37:56.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:37:56.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:56.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:56.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:56.941 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:37:56.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:56.941 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:37:56.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:37:56.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:37:56.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:37:56.944 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:37:56.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:56.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:56.948 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:37:57.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:37:57.476 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:37:57.477 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:37:57.478 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:37:57.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:57.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:57.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:57.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:57.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:57.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:57.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:37:57.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:57.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:57.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:57.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:57.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:37:57.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:37:57.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:57.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:57.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:57.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:57.891 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:37:57.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:57.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:57.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:57.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:58.364 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:37:58.836 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:37:58.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:58.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:58.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:58.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:59.303 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:37:59.773 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:37:59.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:59.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:59.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:59.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:59.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:59.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:59.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:59.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:59.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:59.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:37:59.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:00.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:00.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:00.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:00.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:00.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:00.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:00.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:00.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:00.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:00.050 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:38:00.050 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:38:00.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:00.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:00.241 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:38:00.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:38:00.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:00.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:00.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:00.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:01.176 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:38:01.643 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:38:01.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:01.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:01.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:01.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:02.109 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:38:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:38:02.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:02.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:02.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:02.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:02.756 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:38:02.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:02.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:02.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:02.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:02.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:02.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:02.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:02.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:02.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:02.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:02.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:02.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:02.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:02.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:03.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:38:03.515 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:38:03.986 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:38:04.458 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:38:04.928 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:38:05.399 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:38:05.870 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:38:06.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:06.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:06.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:06.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:06.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:06.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:06.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:06.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:06.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:06.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:06.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:06.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:06.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:06.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:06.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:06.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:06.341 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:38:06.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:38:06.341 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:38:06.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:06.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:06.809 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:38:07.283 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:38:07.754 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:38:08.226 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:38:08.697 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:38:09.170 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:38:09.642 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:38:10.113 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:38:10.586 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:38:11.057 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:38:11.524 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:38:11.992 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:38:12.465 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:38:12.932 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:38:13.404 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:38:13.878 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:38:14.350 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:38:14.821 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:38:15.292 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:38:15.764 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:38:16.238 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:38:16.704 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:38:17.170 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:38:17.635 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:38:18.101 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:38:18.569 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:38:19.041 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:38:19.512 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:38:19.985 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:38:20.457 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:38:20.930 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:38:21.403 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:38:21.873 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:38:22.342 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:38:22.816 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:38:23.288 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:38:23.759 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:38:24.226 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:38:24.691 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:38:25.155 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:38:25.620 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:38:26.089 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:38:26.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:26.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:26.289 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:38:26.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:26.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:26.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:26.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:26.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:26.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:26.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:38:26.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:38:26.293 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:38:26.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:26.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:26.293 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=6371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:31.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:38:31.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:38:31.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:31.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:31.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:31.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:31.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:31.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:38:31.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:31.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:38:31.320 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:38:31.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:38:31.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:38:31.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:38:31.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:31.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:31.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:38:31.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:38:31.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:38:31.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:38:31.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:38:31.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:38:31.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:31.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:38:31.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:38:31.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:38:31.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:31.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:31.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:38:31.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:38:31.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:38:31.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.334 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:38:31.334 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:38:31.335 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:38:31.335 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:31.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:31.339 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:38:31.802 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:38:31.864 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:38:31.865 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:38:31.866 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:38:31.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:31.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:31.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:31.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:31.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:31.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:31.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:31.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:31.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:31.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:31.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:31.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:31.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:31.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:31.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:31.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:31.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:32.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:32.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:32.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:32.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:32.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:32.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:32.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:32.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:32.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:32.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:32.223 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:38:32.224 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:38:32.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.271 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:38:32.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:32.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:32.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:32.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:32.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:32.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:32.560 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:38:32.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:32.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:32.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:32.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:32.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:32.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:32.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:32.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:32.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:32.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:32.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:32.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:38:33.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:33.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:33.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:33.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:33.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:33.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:33.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:33.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:33.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:33.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:33.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:33.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:33.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:33.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:33.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:33.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:33.207 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:38:33.207 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:38:33.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:33.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:33.210 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:38:33.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:33.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:33.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:38:33.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:33.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:33.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:33.770 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:38:33.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:33.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:33.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:33.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:33.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:33.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:33.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:38:33.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:38:33.785 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:38:33.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:33.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:33.786 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:38:38.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:38:38.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:38:38.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:38.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:38.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:38.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:38.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:38.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:38:38.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:38.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:38:38.802 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:38:38.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:38:38.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:38:38.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:38:38.805 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:38.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:38.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:38:38.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:38:38.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:38:38.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:38.808 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:38:38.808 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:38:38.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:38:38.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:38.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:38.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:38:38.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:38:38.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:38:38.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:38:38.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:38:38.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:38:38.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:38.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:38:38.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:38:38.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:38:38.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:38:38.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:38:38.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:38:38.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:38:38.816 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:38:38.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:38.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:38.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:38.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:38:39.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:38:39.349 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:38:39.351 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:38:39.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:39.353 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:38:39.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:39.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:39.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:39.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:39.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:38:39.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:38:39.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:39.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:39.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:39.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:38:39.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:38:39.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:39.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:39.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:38:39.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:39.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:39.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:39.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:40.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:38:40.702 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:38:40.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:40.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:40.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:40.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:41.171 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:38:41.638 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:38:41.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:41.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:41.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:41.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:42.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:38:42.575 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:38:42.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:42.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:42.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:42.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:43.046 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:38:43.511 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:38:43.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:43.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:43.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:43.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:43.978 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:38:44.445 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:38:44.910 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:38:45.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:38:45.843 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:38:46.314 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:38:46.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:38:47.251 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:38:47.721 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:38:48.192 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:38:48.666 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:38:49.138 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:38:49.609 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:38:50.081 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:38:50.548 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:38:51.014 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:38:51.485 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:38:51.956 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:38:52.427 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:38:52.900 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:38:53.371 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:38:53.844 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:38:54.316 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:38:54.787 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:38:55.258 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:38:55.731 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:38:56.204 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:38:56.672 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:38:57.143 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:38:57.616 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:38:58.088 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:38:58.560 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:38:59.026 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:38:59.494 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:38:59.962 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:39:00.428 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:39:00.895 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:39:01.361 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:39:01.827 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:39:02.293 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:39:02.764 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:39:03.231 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:39:03.699 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:39:04.164 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:39:04.631 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:39:05.096 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:39:05.567 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:39:06.033 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:39:06.501 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:39:06.967 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:39:07.433 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:39:07.899 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:39:08.364 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:39:08.829 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:39:09.295 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:39:09.761 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:39:10.227 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:39:10.693 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:39:11.164 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:39:11.635 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:39:12.109 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:39:12.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:12.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:12.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:12.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:39:12.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:12.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:39:12.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:39:12.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:12.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:39:12.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:39:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:12.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:12.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:12.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:12.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:39:12.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:39:12.433 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:39:12.433 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:39:12.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:12.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:12.579 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:39:13.052 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:39:13.523 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:39:13.994 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:39:14.466 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:39:14.932 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:39:15.404 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:39:15.869 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:39:16.334 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:39:16.799 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:39:17.265 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:39:17.732 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:39:18.203 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:39:18.675 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:39:19.145 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:39:19.612 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:39:20.077 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:39:20.543 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:39:21.013 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:39:21.478 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:39:21.942 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:39:22.408 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:39:22.879 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:39:23.347 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:39:23.813 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:39:24.279 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:39:24.746 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:39:25.213 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:39:25.677 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:39:26.143 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:39:26.609 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:39:27.075 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:39:27.543 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:39:28.011 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:39:28.479 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:39:28.947 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:39:29.416 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:39:29.881 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:39:30.349 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:39:30.814 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:39:31.279 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:39:31.748 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:39:32.220 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:39:32.689 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:39:33.158 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:39:33.631 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:39:34.100 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:39:34.571 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:39:35.041 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:39:35.512 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:39:35.985 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:39:36.453 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:39:36.924 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:39:37.391 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:39:37.857 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:39:38.323 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:39:38.789 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:39:39.255 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:39:39.721 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:39:40.190 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:39:40.655 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 03:39:41.120 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 03:39:41.587 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 03:39:42.053 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 03:39:42.520 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 03:39:42.986 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 03:39:43.451 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 03:39:43.916 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 03:39:44.380 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 03:39:44.844 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 03:39:45.309 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 03:39:45.774 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 03:39:46.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:46.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:46.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:46.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:39:46.013 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:39:46.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:46.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:39:46.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:39:46.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:46.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:39:46.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:39:46.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:46.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:46.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:46.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:46.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:39:46.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:39:46.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:46.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:46.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:46.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:46.242 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 03:39:46.713 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 03:39:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 03:39:47.658 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 03:39:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 03:39:48.603 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 03:39:49.074 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 03:39:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 03:39:50.014 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 03:39:50.480 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 03:39:50.952 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 03:39:51.422 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 03:39:51.893 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 03:39:52.365 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 03:39:52.832 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 03:39:53.299 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 03:39:53.767 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 03:39:54.233 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 03:39:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 03:39:55.173 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 03:39:55.639 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 03:39:56.107 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 03:39:56.578 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 03:39:57.049 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 03:39:57.520 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 03:39:57.990 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 03:39:58.459 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 03:39:58.929 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 03:39:59.398 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 03:39:59.869 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 03:40:00.340 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 03:40:00.805 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 03:40:01.277 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 03:40:01.750 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 03:40:02.223 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 03:40:02.695 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 03:40:03.166 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 03:40:03.637 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 03:40:04.108 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 03:40:04.578 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 03:40:05.051 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 03:40:05.524 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 03:40:05.995 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 03:40:06.464 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 03:40:06.933 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 03:40:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 03:40:07.874 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 03:40:08.345 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 03:40:08.816 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-04-19 03:40:09.287 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-04-19 03:40:09.757 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-04-19 03:40:10.228 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-04-19 03:40:10.699 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-04-19 03:40:11.170 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-04-19 03:40:11.641 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-04-19 03:40:12.112 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-04-19 03:40:12.585 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-04-19 03:40:13.057 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-04-19 03:40:13.523 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-04-19 03:40:13.988 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-04-19 03:40:14.456 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-04-19 03:40:14.922 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-04-19 03:40:15.392 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-04-19 03:40:15.865 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-04-19 03:40:16.336 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-04-19 03:40:16.808 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-04-19 03:40:17.279 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-04-19 03:40:17.749 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-04-19 03:40:18.223 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-04-19 03:40:18.693 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-04-19 03:40:19.165 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-04-19 03:40:19.638 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-04-19 03:40:20.107 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-04-19 03:40:20.579 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-04-19 03:40:21.050 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-04-19 03:40:21.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:21.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:21.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:21.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:21.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:21.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:21.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:21.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:21.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:21.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:21.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:21.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:21.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:21.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:21.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:40:21.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:40:21.283 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:40:21.283 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:40:21.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:21.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-04-19 03:40:21.982 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-04-19 03:40:22.451 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-04-19 03:40:22.921 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-04-19 03:40:23.387 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-04-19 03:40:23.858 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-04-19 03:40:24.328 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-04-19 03:40:24.800 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-04-19 03:40:25.269 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-04-19 03:40:25.738 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-04-19 03:40:26.209 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-04-19 03:40:26.677 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-04-19 03:40:27.142 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-04-19 03:40:27.608 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-04-19 03:40:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-04-19 03:40:28.544 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-04-19 03:40:29.011 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-04-19 03:40:29.478 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-04-19 03:40:29.945 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-04-19 03:40:30.416 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-04-19 03:40:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-04-19 03:40:31.351 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-04-19 03:40:31.817 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-04-19 03:40:32.284 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-04-19 03:40:32.748 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-04-19 03:40:33.213 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-04-19 03:40:33.680 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-04-19 03:40:34.152 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-04-19 03:40:34.624 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-04-19 03:40:35.096 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-04-19 03:40:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-04-19 03:40:36.042 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-04-19 03:40:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-04-19 03:40:36.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:36.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:36.825 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:40:36.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:36.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:36.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:36.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:36.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:36.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:36.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:36.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:36.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:36.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:40:36.827 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:41.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:41.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:40:41.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:41.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:41.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:41.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:41.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:41.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:41.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:41.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:41.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:41.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:41.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:41.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:41.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:41.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:41.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:41.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:41.849 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:41.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:41.854 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:41.855 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:41.855 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:41.855 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:41.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:41.856 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:41.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:41.856 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:41.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:41.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:41.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:41.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:41.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:41.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:41.860 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:41.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:41.860 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:41.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:41.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:41.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:41.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:41.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:41.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:41.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:40:41.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:40:41.866 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:41.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:41.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:41.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:40:41.868 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:46.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:46.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:40:46.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:46.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:46.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:46.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:46.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:46.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:46.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:46.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:46.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:46.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:46.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:46.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:46.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:46.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:46.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:46.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:46.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:46.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:46.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:46.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:46.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:46.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:46.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:46.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:46.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:46.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:46.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:46.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:46.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:40:46.896 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:40:46.896 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:46.896 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.901 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:40:47.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:40:47.426 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:47.428 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:40:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:47.430 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:40:47.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:47.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:47.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:47.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:47.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:47.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:47.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:47.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:47.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:47.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:47.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:40:47.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:40:47.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:47.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:47.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:47.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:47.840 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:40:47.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:47.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:47.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:47.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:40:48.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:40:48.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:48.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:48.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:48.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:48.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:48.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:48.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:48.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:48.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:48.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:48.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:48.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:48.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:48.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:48.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:48.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:48.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:48.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:48.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:40:48.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:40:49.006 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:40:49.007 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:40:49.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:49.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:49.244 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:40:49.718 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:40:49.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:49.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:49.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:49.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:50.191 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:40:50.665 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:40:50.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:50.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:50.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:50.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:51.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:40:51.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:51.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:51.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:51.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:51.293 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:40:51.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:51.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:51.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:51.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:51.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:51.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:51.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:51.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:51.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:51.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:51.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:40:51.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:40:51.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:51.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:51.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:51.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:51.611 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:40:51.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:51.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:51.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:51.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:52.081 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:40:52.552 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:40:53.025 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:40:53.497 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:40:53.968 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:40:54.437 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:40:54.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:54.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:54.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:54.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:54.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:54.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:54.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:54.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:54.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:54.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:40:54.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:54.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:54.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:54.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:54.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:40:54.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:40:54.900 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:40:54.900 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:40:54.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:54.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:54.907 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:40:55.371 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:40:55.839 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:40:55.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:55.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:40:55.919 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:40:55.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:55.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:55.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:55.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:55.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:55.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:55.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:55.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:40:55.928 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:55.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:55.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:00.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:00.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:41:00.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:00.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:00.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:00.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:00.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:00.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:00.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:00.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:00.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:41:00.948 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:41:00.948 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:41:00.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:00.949 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:00.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:00.950 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:41:00.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:00.950 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:41:00.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:00.952 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:41:00.952 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:41:00.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:00.952 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:00.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:00.953 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:41:00.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:00.953 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:41:00.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:00.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:00.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:41:00.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:41:00.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:41:00.957 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:41:00.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:00.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:41:01.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:41:01.483 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:01.485 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:01.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:01.487 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:41:01.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:01.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:01.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:01.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:01.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:01.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:01.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:01.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:01.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:01.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:01.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:41:01.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:41:01.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:01.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:01.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:01.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:01.913 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:41:01.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:01.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:01.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:01.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:02.385 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:41:02.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:41:02.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:02.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:02.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:02.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:03.315 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:41:03.778 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:41:03.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:03.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:03.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:03.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:04.242 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:41:04.709 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:41:04.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:04.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:05.180 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:41:05.652 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:41:05.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:05.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:05.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:05.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:06.122 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:41:06.593 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:41:07.067 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:41:07.539 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:41:08.012 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:41:08.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:41:08.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:41:09.429 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:41:09.900 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:41:10.372 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:41:10.845 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:41:11.318 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:41:11.790 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:41:12.264 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:41:12.736 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:41:13.209 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:41:13.682 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:41:14.155 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:41:14.627 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:41:15.098 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:41:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:41:16.039 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:41:16.505 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:41:16.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:16.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:16.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:16.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:16.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:16.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:16.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:16.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:16.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:16.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:16.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:16.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:16.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:16.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:16.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:41:16.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:41:16.878 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:41:16.878 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:41:16.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:16.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:16.971 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:41:17.437 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:41:17.903 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:41:18.370 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:41:18.835 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:41:19.300 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:41:19.768 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:41:20.238 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:41:20.705 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:41:21.173 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:41:21.647 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:41:22.119 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:41:22.592 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:41:23.065 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:41:23.538 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:41:24.010 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:41:24.481 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:41:24.954 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:41:25.427 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:41:25.900 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:41:26.368 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:41:26.840 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:41:27.314 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:41:27.787 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:41:28.260 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:41:28.731 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:41:29.195 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:41:29.660 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:41:30.125 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:41:30.590 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:41:31.054 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:41:31.521 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:41:31.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:31.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:31.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:31.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:31.875 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:41:31.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:31.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:31.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:31.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:31.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:31.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:31.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:31.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:31.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:31.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:31.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:41:31.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:41:31.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:31.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:31.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:31.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:31.991 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:41:32.462 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:41:32.935 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:41:33.408 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:41:33.880 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:41:34.351 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:41:34.821 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:41:35.292 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:41:35.763 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:41:36.234 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:41:36.706 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:41:37.179 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:41:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:41:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:41:38.596 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:41:39.068 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:41:39.540 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:41:40.011 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:41:40.485 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:41:40.957 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:41:41.429 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:41:41.900 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:41:42.371 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:41:42.842 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:41:43.312 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:41:43.778 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:41:44.247 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:41:44.714 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:41:45.181 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:41:45.650 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:41:46.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:46.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:46.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:46.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:46.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:46.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:46.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:46.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:46.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:46.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:46.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:46.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:46.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:46.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:46.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:41:46.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:41:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:41:46.160 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:41:46.161 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:41:46.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:46.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:46.583 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:41:47.050 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:41:47.516 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:41:47.980 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:41:48.449 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:41:48.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:48.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:48.840 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:41:48.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:48.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:48.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:48.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:48.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:48.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:48.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:48.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:48.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:48.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:41:48.848 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:41:48.848 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:48.848 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:48.848 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:48.848 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:53.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:53.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:41:53.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:53.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:53.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:53.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:53.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:53.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:53.859 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:53.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:53.860 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:41:53.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:41:53.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:41:53.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:53.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:53.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:53.863 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:41:53.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:53.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:41:53.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:53.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:41:53.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:41:53.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:53.867 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:53.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:53.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:41:53.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:53.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:41:53.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:53.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:41:53.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:41:53.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:53.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:53.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:53.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:41:53.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:53.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:41:53.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:41:53.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:41:53.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:41:53.875 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:41:53.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:53.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:41:54.345 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:41:54.409 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:54.411 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:54.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:54.414 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:41:54.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:54.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:54.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:54.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:54.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:41:54.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:41:54.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:54.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:54.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:54.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:54.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:41:54.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:41:54.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:54.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:54.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:54.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:54.816 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:41:54.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:54.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:54.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:54.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:55.289 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:41:55.761 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:41:55.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:55.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:55.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:55.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:56.234 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:41:56.707 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:41:56.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:56.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:56.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:56.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:57.178 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:41:57.650 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:41:57.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:57.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:57.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:57.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:58.121 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:41:58.594 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:41:58.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:58.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:58.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:58.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:41:59.539 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:42:00.013 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:42:00.483 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:42:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:42:01.428 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:42:01.901 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:42:02.372 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:42:02.843 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:42:03.309 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:42:03.777 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:42:04.248 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:42:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:42:04.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:04.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:04.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:04.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:04.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:04.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:04.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:04.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:04.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:04.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:04.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:04.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:04.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:04.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:04.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:04.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:05.000 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:42:05.000 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:42:05.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:05.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:05.186 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:42:05.654 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:42:06.122 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:42:06.588 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:42:07.053 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:42:07.519 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:42:07.984 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:42:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:42:08.920 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:42:09.393 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:42:09.860 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:42:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:42:10.794 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:42:11.268 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:42:11.740 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:42:12.215 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:42:12.689 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:42:13.162 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:42:13.634 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:42:14.106 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:42:14.577 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:42:15.050 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:42:15.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:15.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:15.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:15.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:15.225 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:42:15.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:15.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:15.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:15.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:15.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:15.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:15.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:15.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:15.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:15.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:15.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:15.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:15.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:15.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:15.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:15.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:15.523 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:42:15.993 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:42:16.464 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:42:16.937 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:42:17.409 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:42:17.879 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:42:18.344 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:42:18.813 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:42:19.281 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:42:19.747 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:42:20.213 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:42:20.678 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:42:21.145 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:42:21.616 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:42:22.085 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:42:22.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:22.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:22.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:22.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:22.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:22.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:22.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:22.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:22.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:22.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:22.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:22.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:22.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:22.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:22.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:22.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:22.175 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:42:22.175 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:42:22.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:22.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:22.551 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:42:23.022 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:42:23.493 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:42:23.965 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:42:24.434 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:42:24.906 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:42:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:42:25.851 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:42:26.324 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:42:26.796 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:42:27.268 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:42:27.739 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:42:28.212 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:42:28.684 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:42:29.157 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:42:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:42:30.100 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:42:30.569 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:42:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:42:31.515 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:42:31.983 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:42:32.456 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:42:32.928 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:42:33.400 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:42:33.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:33.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:33.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:33.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:33.494 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:42:33.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:33.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:33.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:33.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:33.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:33.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:33.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:33.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:33.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:33.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:42:33.512 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:42:33.512 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=8594 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:33.512 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=8594 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:33.512 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=8594 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:33.512 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=8594 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:38.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:38.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:42:38.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:38.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:38.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:38.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:38.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:38.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:38.527 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:38.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:38.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:42:38.534 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:42:38.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:42:38.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:38.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:38.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:38.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:42:38.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:38.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:42:38.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:38.541 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:42:38.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:42:38.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:38.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:38.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:38.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:42:38.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:38.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:42:38.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:38.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:42:38.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:42:38.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:38.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:38.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:38.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:42:38.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:38.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:42:38.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:38.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:42:38.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:42:38.558 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:42:38.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:38.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:42:39.035 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:42:39.090 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:39.090 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:39.093 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:42:39.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:39.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:39.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:39.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:39.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:39.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:39.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:39.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:39.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:39.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:39.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:39.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:39.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:39.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:39.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:39.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:39.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:39.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:42:39.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:39.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:39.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:39.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:39.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:39.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:39.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:39.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:39.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:39.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:39.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:39.546 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:42:39.547 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:42:39.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:39.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:39.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:39.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:39.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:39.979 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:42:40.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:40.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:40.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:40.039 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:42:40.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:40.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:40.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:40.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:40.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:40.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:40.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:40.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:40.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:40.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:40.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:40.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:40.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:40.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:42:40.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:40.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:40.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:40.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:40.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:40.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:40.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:40.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:40.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:40.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:40.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:40.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:40.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:40.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:40.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:40.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:40.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:40.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:40.910 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:42:40.917 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:42:40.917 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:42:40.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:40.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:41.374 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:42:41.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:41.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:41.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:41.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:41.840 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:42:42.314 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:42:42.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:42.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:42.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:42.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:42.783 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:42:43.247 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:42:43.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:43.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:43.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:43.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:43.716 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:42:44.188 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:42:44.660 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:42:44.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:44.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:44.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:44.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:44.928 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:42:44.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:44.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:44.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:44.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:44.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:44.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:44.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:44.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:42:44.945 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:42:44.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:44.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:44.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:44.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:44.945 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:44.946 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:44.946 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:44.946 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:44.946 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=1389 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:49.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:42:49.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:49.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:49.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:49.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:49.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:49.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:49.955 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:49.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:49.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:42:49.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:42:49.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:42:49.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:49.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:49.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:49.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:42:49.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:49.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:42:49.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:49.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:49.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:42:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:49.963 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:49.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:42:49.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:42:49.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:42:49.966 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:42:49.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:42:49.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:49.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:42:50.448 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:42:50.491 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:50.493 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:50.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:50.495 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:42:50.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:50.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:50.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:50.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:50.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:50.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:50.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:50.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:50.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:50.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:50.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:50.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:50.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:50.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:50.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:50.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:50.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:42:50.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:51.389 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:42:51.861 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:42:51.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:52.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:42:52.799 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:42:52.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:53.270 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:42:53.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:42:53.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:53.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:53.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:53.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:53.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:53.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:53.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:53.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:53.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:53.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:53.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:53.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:53.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:53.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:53.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:53.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:53.877 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:42:53.877 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:42:53.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:53.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:53.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:53.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:53.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:53.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:54.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:42:54.677 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:42:54.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:54.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:54.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:54.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:55.148 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:42:55.619 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:42:56.092 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:42:56.560 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:42:57.031 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:42:57.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:57.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:57.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:57.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:57.200 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:42:57.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:57.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:57.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:57.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:57.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:42:57.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:42:57.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:57.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:57.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:57.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:57.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:42:57.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:42:57.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:57.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:57.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:57.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:57.500 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:42:57.967 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:42:58.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:42:58.899 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:42:59.366 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:42:59.831 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:43:00.297 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:43:00.763 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:43:00.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:00.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:00.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:00.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:00.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:00.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:00.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:00.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:00.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:00.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:00.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:00.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:00.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:00.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:00.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:00.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:00.995 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:43:00.996 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:43:00.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:00.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:01.229 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:43:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:43:02.167 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:43:02.636 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:43:03.101 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:43:03.571 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:43:04.042 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:43:04.507 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:43:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:43:05.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:05.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:05.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:05.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:05.062 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:43:05.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:05.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:05.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:05.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:05.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:05.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:05.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:05.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:05.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:05.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:43:05.075 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:43:05.075 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:05.076 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:10.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:10.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:43:10.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:10.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:10.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:10.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:10.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:10.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:10.096 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:10.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:10.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:43:10.102 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:43:10.103 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:43:10.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:10.103 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:10.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:10.104 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:43:10.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:10.104 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:43:10.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:10.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:43:10.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:43:10.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:10.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:10.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:10.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:43:10.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:10.107 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:43:10.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:10.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:43:10.109 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:43:10.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:10.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:10.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:10.110 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:43:10.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:10.110 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:43:10.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.113 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:43:10.113 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:43:10.113 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:43:10.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:10.118 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:43:10.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:43:10.638 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:10.640 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:10.642 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:43:10.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:10.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:10.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:10.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:10.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:10.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:10.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:10.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:10.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:10.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:10.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:10.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:10.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:10.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:10.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:10.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:10.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:11.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:11.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:43:11.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:11.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:11.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:11.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:11.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:11.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:11.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:11.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:11.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:11.110 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:43:11.110 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:43:11.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:11.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:11.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:11.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:11.535 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:43:11.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:11.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:11.672 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:43:11.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:11.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:11.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:11.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:11.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:11.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:11.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:11.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:11.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:11.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:11.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:11.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:12.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:43:12.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:12.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:43:12.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:12.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:12.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:12.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:12.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:12.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:12.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:12.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:12.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:12.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:12.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:12.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:12.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:12.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:12.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:12.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:12.656 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:43:12.656 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:43:12.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:12.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:12.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:43:13.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:13.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:13.418 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:43:13.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:43:14.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:14.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:14.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:14.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:14.350 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:43:14.820 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:43:15.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:15.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:15.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:15.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:15.292 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:43:15.763 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:43:16.236 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:43:16.705 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:43:17.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:43:17.636 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:43:18.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:43:18.571 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:43:19.035 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:43:19.503 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:43:19.968 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:43:20.434 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:43:20.901 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:43:21.366 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:43:21.830 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:43:22.295 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:43:22.761 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:43:23.233 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:43:23.704 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:43:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:43:24.644 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:43:25.109 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:43:25.576 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:43:26.041 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:43:26.505 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:43:26.970 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:43:27.434 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:43:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:43:28.368 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:43:28.840 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:43:29.310 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:43:29.778 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:43:30.251 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:43:30.723 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:43:31.195 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:43:31.668 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:43:32.140 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:43:32.613 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:43:32.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:32.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:32.649 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:43:32.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:32.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:32.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:32.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:32.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:32.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:32.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:32.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:32.656 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:32.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:43:32.656 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:43:37.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:37.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:43:37.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:37.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:37.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:37.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:37.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:37.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:37.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:37.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:37.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:43:37.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:43:37.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:43:37.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:37.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:37.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:37.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:43:37.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:37.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:43:37.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:37.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:37.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:43:37.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:37.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:37.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:43:37.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.690 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:43:37.690 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:43:37.690 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:43:37.690 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:37.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:37.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:43:38.167 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:43:38.218 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:38.220 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:38.221 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:43:38.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:38.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:38.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:38.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:38.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:38.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:38.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:38.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:38.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:38.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:38.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:38.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:38.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:38.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:38.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:38.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:38.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:38.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:43:38.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:38.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:38.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:38.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:39.101 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:43:39.567 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:43:39.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:39.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:39.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:39.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:40.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:43:40.500 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:43:40.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:40.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:40.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:40.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:40.970 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:43:41.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:41.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:41.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:41.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:41.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:41.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:41.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:41.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:43:41.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:43:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:41.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:41.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:41.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:43:41.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:43:41.204 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:43:41.204 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:43:41.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.440 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:43:41.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:41.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:41.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:41.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:41.906 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:43:42.371 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:43:42.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:42.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:42.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:42.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:42.835 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:43:43.301 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:43:43.766 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:43:44.230 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:43:44.695 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:43:45.159 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:43:45.624 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:43:46.089 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:43:46.558 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:43:47.031 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:43:47.496 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:43:47.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:43:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:43:48.890 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:43:49.358 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:43:49.824 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:43:50.293 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:43:50.757 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:43:51.222 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:43:51.688 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:43:52.158 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:43:52.626 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:43:53.094 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:43:53.560 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:43:54.025 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:43:54.491 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:43:54.955 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:43:55.422 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:43:55.887 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:43:56.355 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:43:56.820 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:43:57.285 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:43:57.750 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:43:58.214 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:43:58.679 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:43:59.144 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:43:59.608 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:44:00.075 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:44:00.544 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:44:01.010 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:44:01.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:01.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:01.146 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:44:01.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:01.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:01.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:01.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:01.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:01.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:01.151 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:01.151 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:01.151 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:01.151 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:01.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:06.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:06.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:06.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:06.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:06.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:06.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:06.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:06.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:06.171 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:06.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:06.171 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:06.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:06.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:06.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:06.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:06.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:06.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:06.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:06.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:06.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:06.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:06.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:06.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:06.179 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:06.179 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:06.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:06.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:06.180 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:06.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:06.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:06.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:06.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:06.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:06.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:06.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:06.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:06.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:06.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:06.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:06.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:06.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:06.188 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:06.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:06.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:06.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:06.193 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:06.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:06.723 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:06.725 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:06.726 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:06.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:06.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:06.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:06.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:06.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:06.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:06.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:06.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:06.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:06.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:06.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:06.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:44:06.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:44:06.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:06.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:06.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:06.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:07.125 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:07.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:07.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:07.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:07.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:07.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:08.069 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:08.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:08.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:08.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:08.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:08.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:08.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:08.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:08.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:44:08.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:08.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:08.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:08.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:08.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:08.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:08.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:08.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:08.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:08.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:08.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:44:08.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:44:08.587 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:44:08.587 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 03:44:08.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:08.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:09.013 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:44:09.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:09.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:09.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:09.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:09.487 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:44:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:44:10.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:10.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:10.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:10.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:10.432 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:44:10.902 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:44:11.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:11.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:11.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:11.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:11.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:11.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:11.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:11.344 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:44:11.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:11.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:11.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:11.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:11.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:11.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:11.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:44:11.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:11.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:11.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:44:11.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:44:11.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:11.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:11.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:44:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:44:12.786 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:44:13.253 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:44:13.719 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:44:14.186 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:44:14.653 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:44:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:44:15.588 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:44:15.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:15.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:15.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:15.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:15.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:15.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:15.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:15.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:15.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:15.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:44:15.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:15.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:15.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:15.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:15.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:44:15.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:44:15.822 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.105.22:6700) Recv SETFH cmd
2026-04-19 03:44:15.822 [INFO] transceiver.py:201 (MS@172.18.105.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 03:44:15.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:15.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:16.053 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:44:16.520 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:44:16.987 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:44:17.453 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:44:17.926 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:44:18.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:18.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:44:18.007 [INFO] transceiver.py:205 (MS@172.18.105.22:6700) Frequency hopping disabled
2026-04-19 03:44:18.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:18.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:18.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:18.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:18.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:18.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:18.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:18.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:18.010 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:18.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:18.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:18.010 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=2571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:23.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:23.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:23.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:23.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:23.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:23.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:23.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:23.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:23.028 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:23.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:23.028 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:23.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:23.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:23.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:23.033 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:23.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:23.033 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:23.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:23.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:23.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:23.036 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:23.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:23.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:23.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:23.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:23.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:23.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:23.037 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:23.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:23.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:23.040 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:23.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:23.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:23.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:23.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:23.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.045 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:23.045 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:23.045 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:23.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:23.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:23.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:23.580 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:23.582 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:23.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.583 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:23.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:23.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:24.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:24.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:24.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:24.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:24.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.446 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:24.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:24.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:24.912 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:24.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:24.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:24.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:24.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:24.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:24.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:24.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:24.918 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:24.918 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:24.918 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:24.919 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:24.919 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:24.919 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:24.919 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:24.919 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:29.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:29.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:29.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:29.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:29.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:29.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:29.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:29.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:29.930 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:29.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:29.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:29.935 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:29.935 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:29.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:29.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:29.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:29.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:29.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:29.936 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:29.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:29.940 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:29.940 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:29.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:29.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:29.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:29.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:29.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:29.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:29.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:29.943 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:29.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:29.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:29.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:29.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:29.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:29.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:29.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:29.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:29.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:29.948 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:29.948 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:29.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:29.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:29.953 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:30.472 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:30.474 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:30.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.477 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:30.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:30.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:30.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:30.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:30.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:30.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:31.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:31.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:31.844 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:31.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:31.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:31.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:31.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:31.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:31.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:31.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:31.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:31.845 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:31.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:31.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:36.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:36.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:36.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:36.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:36.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:36.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:36.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:36.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:36.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:36.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:36.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:36.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:36.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:36.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:36.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:36.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:36.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:36.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:36.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:36.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:36.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:36.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:36.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:36.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:36.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:36.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:36.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:36.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:36.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:36.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:36.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:36.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:36.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:36.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:36.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:36.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:36.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:36.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.872 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:36.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:36.873 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:36.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:36.877 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:37.343 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:37.401 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:37.402 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:37.404 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:37.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:37.810 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:37.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:37.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:37.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:37.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:38.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.279 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:38.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:38.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:38.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:38.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:38.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:38.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:38.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:38.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:38.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:38.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:38.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:38.744 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:38.745 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:38.745 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:38.745 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:38.745 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:38.745 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:38.745 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:38.746 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:43.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:43.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:43.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:43.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:43.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:43.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:43.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:43.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:43.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:43.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:43.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:43.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:43.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:43.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:43.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:43.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:43.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:43.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:43.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:43.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:43.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:43.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:43.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:43.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:43.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:43.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:43.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:43.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:43.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:43.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:43.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:43.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:43.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:43.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:43.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:43.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:43.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:43.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:43.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:43.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:43.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:43.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:43.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:43.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:43.776 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:43.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:43.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:44.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:44.315 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:44.317 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:44.319 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:44.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:44.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:44.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:44.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:44.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:44.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:45.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:45.649 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:45.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:45.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:45.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:45.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:45.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:45.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:45.659 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:45.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:45.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:50.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:50.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:50.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:50.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:50.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:50.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:50.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:50.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:50.674 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:50.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:50.674 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:50.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:50.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:50.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:50.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:50.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:50.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:50.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:50.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:50.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:50.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:50.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:50.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:50.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:50.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:50.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:50.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:50.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:50.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:50.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:50.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:50.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:50.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:50.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:50.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:50.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:50.687 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:50.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:50.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:50.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:50.692 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:50.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:50.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:50.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:51.160 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:51.227 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:51.229 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:51.231 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:51.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:51.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.625 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:51.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:51.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:51.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:51.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:51.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:51.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.094 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:52.559 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:52.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:52.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:52.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:52.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:52.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:52.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:52.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:52.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:52.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:52.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:52.574 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:52.574 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:52.574 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:52.575 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:52.575 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:52.575 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:52.575 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:57.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:57.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:57.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:57.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:57.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:57.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:57.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:57.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:57.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:57.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:57.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:57.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:57.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:57.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:57.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:57.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:57.591 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:57.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:57.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:57.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:57.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:57.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:57.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:57.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:57.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:57.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:57.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:57.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:57.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:57.598 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:57.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:57.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:57.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:57.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:57.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:57.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:57.599 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:57.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:57.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:44:57.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:44:57.605 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:57.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:57.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:57.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:57.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:58.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:58.140 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:58.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.144 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:58.146 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:58.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:58.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.543 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:58.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:58.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:58.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:58.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:58.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:58.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:59.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:59.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:59.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:59.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:59.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:59.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:59.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:59.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:59.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:59.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:44:59.542 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:59.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:59.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:59.542 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:59.542 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:59.542 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:59.542 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:59.543 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:59.543 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:59.543 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=425 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:04.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:04.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:04.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:04.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:04.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:04.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:04.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:04.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:04.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:04.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:04.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:04.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:04.559 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:04.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:04.559 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:04.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:04.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:04.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:04.559 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:04.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:04.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:04.563 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:04.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:04.563 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:04.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:04.563 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:04.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:04.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:04.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:04.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:04.567 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:04.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:04.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:04.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:04.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:04.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:04.568 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:04.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:04.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:04.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:04.576 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:04.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:04.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:04.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:05.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:05.111 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:05.112 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:05.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.114 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:05.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:05.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:45:05.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:05.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:05.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:05.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:05.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:45:06.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.452 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:45:06.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:06.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:06.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:06.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:06.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:06.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:06.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:06.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:06.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:06.460 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:06.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:06.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:11.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:11.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:11.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:11.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:11.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:11.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:11.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:11.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:11.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:11.479 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:11.479 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:11.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:11.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:11.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:11.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:11.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:11.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:11.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:11.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:11.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:11.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:11.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:11.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:11.490 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:11.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:11.490 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:11.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:11.490 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:11.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:11.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:11.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:11.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:11.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:11.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:11.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:11.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:11.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:11.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:11.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:11.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:11.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:11.502 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:11.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:11.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:11.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:11.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:11.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:12.039 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:12.041 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:12.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.043 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:12.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:12.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:12.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:12.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:12.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:12.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:12.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:12.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:12.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:12.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:12.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:12.113 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:12.113 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:12.113 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:17.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:17.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:17.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:17.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:17.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:17.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:17.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:17.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:17.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:17.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:17.135 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:17.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:17.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:17.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:17.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:17.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:17.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:17.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:17.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:17.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:17.142 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:17.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:17.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:17.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:17.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:17.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:17.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:17.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:17.149 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:17.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:17.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:17.681 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:17.683 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:17.683 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:17.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:17.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:17.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:17.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:17.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:17.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:17.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:17.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:17.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:17.780 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:17.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:17.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:22.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:22.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:22.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:22.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:22.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:22.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:22.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:22.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:22.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:22.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:22.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:22.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:22.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:22.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:22.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:22.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:22.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:22.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:22.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:22.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:22.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:22.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:22.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:22.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:22.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:22.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:22.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:22.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:22.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:22.815 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:22.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:22.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:22.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:22.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:22.816 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:22.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:22.816 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:22.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:22.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:22.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:22.821 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:22.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:22.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:22.826 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:23.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:23.350 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:23.351 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:23.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.353 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:23.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:23.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:23.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:23.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:23.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:23.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:23.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:23.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:23.449 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:23.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:23.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:28.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:28.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:28.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:28.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:28.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:28.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:28.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:28.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:28.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:28.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:28.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:28.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:28.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:28.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:28.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:28.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:28.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:28.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:28.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:28.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:28.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:28.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:28.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:28.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:28.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:28.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:28.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:28.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:28.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:28.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:28.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:28.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:28.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:28.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:28.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:28.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:28.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:28.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:28.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:28.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:28.481 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:28.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:28.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:28.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:29.018 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:29.020 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:29.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.021 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:29.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:29.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:29.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:29.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:29.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:29.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:29.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:29.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:29.099 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:29.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:29.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:34.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:34.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:34.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:34.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:34.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:34.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:34.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:34.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:34.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:34.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:34.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:34.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:34.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:34.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:34.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:34.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:34.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:34.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:34.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:34.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:34.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:34.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:34.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:34.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:34.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:34.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:34.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:34.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:34.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:34.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:34.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:34.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:34.129 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:34.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:34.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:34.131 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:34.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:34.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:34.667 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:34.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.670 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:34.672 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:34.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:34.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:34.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:34.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:34.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:34.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:34.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:34.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:34.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:34.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:34.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:34.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:34.762 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:34.762 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:34.762 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:34.762 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:34.762 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:34.762 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:34.762 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:34.763 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:39.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:39.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:39.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:39.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:39.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:39.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:39.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:39.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:39.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:39.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:39.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:39.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:39.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:39.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:39.790 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:39.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:39.792 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:39.792 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:39.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:39.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:39.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:39.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:39.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:39.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:39.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:39.797 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:39.798 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:39.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:39.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:40.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:40.331 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:40.333 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:40.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.336 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:40.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:40.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:40.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:40.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:40.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:40.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:40.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:40.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:40.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:40.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:40.458 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:40.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:40.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:45.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:45.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:45.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:45.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:45.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:45.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:45.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:45.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:45.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:45.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:45.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:45.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:45.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:45.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:45.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:45.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:45.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:45.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:45.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:45.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:45.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:45.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:45.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:45.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:45.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:45.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:45.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:45.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:45.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:45.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:45.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:45.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:45.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:45.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:45.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:45.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:45.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:45.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:45.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:45.506 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:45.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:45.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:45.980 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:46.029 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:46.031 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:46.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.032 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:46.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:46.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:46.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:46.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:46.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:46.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:46.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:46.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:46.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:46.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:46.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:46.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:46.133 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:46.133 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:46.133 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:46.134 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:46.134 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:46.134 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:46.134 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:46.134 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:51.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:51.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:51.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:51.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:51.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:51.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:51.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:51.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:51.155 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:51.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:51.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:51.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:51.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:51.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:51.160 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:51.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:51.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:51.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:51.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:51.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:51.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:51.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:51.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:51.167 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:51.168 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:51.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:51.168 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:51.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:51.168 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:51.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:51.168 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:51.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:51.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:45:51.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:45:51.171 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:51.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:51.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:51.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:51.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:51.698 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:51.700 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:51.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:51.702 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:51.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:51.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:45:51.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:45:51.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:51.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:51.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:51.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:45:51.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:45:52.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:45:52.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:52.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:52.578 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:45:53.045 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:45:53.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:53.512 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:45:53.978 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:45:54.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:54.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:54.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:54.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:54.445 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:45:54.912 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:45:55.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:55.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:45:55.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:55.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:55.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:55.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:55.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:55.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:55.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:55.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:55.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:55.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:45:55.158 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:55.158 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:55.159 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:00.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:00.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:00.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:00.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:00.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:00.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:00.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:00.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:00.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:00.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:00.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:00.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:00.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:00.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:00.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:00.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:00.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:00.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:00.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:00.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:00.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:46:00.190 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:46:00.190 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:00.190 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:00.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:00.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:00.731 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:00.734 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:00.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:00.736 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:00.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:00.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:00.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:00.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:00.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:00.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:00.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:00.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:00.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 03:46:00.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:00.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:00.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:00.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:01.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:01.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:01.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:01.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:01.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:01.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:01.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:01.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:01.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:01.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:01.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:01.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:01.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:01.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:01.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:01.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:01.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:01.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:01.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:01.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:01.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:01.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:01.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:01.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:01.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:01.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:01.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:01.374 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:01.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=259 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:01.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=259 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:01.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=259 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:01.374 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=259 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:06.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:06.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:06.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:06.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:06.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:06.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:06.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:06.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:06.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:06.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:06.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:06.394 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:06.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:06.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:06.395 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:06.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:06.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:06.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:06.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:06.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:06.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:06.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:06.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:06.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:06.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:06.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:06.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:06.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:06.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:06.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:06.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:06.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:06.406 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:06.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:06.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:06.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:06.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:06.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:06.414 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:06.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:06.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:06.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:06.414 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:06.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:46:06.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:46:06.416 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:06.416 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:06.421 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:06.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:06.952 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:06.952 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:06.952 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:06.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:06.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:06.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:06.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:06.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:06.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:06.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:06.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:06.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:07.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 03:46:07.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:07.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:07.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:07.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:07.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:07.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:07.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:07.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:07.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:07.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:07.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:07.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:07.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:07.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:07.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:07.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:07.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:07.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:07.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:07.829 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:46:08.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:46:08.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:08.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:08.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:08.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:08.759 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:46:09.229 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:46:09.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:09.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:09.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:09.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:09.694 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:46:10.161 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:46:10.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:10.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:10.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:10.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:10.631 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:46:11.100 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:46:11.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:11.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:11.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:11.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:11.565 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:46:12.030 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:46:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:46:12.968 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:46:13.437 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:46:13.902 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:46:14.373 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:46:14.843 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:46:15.312 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:46:15.782 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:46:16.255 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:46:16.728 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:46:17.198 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:46:17.669 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:46:18.142 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:46:18.615 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:46:19.087 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:46:19.558 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:46:20.031 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:46:20.502 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:46:20.968 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:46:21.436 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:46:21.910 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:46:22.381 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:46:22.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:22.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:22.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:22.688 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=3536 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.688 [WARNING] transceiver.py:257 (MS@172.18.105.22:6700) RX TRXD message (fn=3536 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:22.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:22.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:22.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:22.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:22.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:22.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:22.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:22.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:22.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:22.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:22.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:22.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:22.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:22.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:22.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:22.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:22.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:22.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:22.772 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:22.772 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=3554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:27.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:27.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:27.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:27.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:27.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:27.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:27.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:27.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:27.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:27.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:27.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:27.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:27.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:27.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:27.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:27.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:27.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:27.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:27.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:27.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:27.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:27.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:27.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:27.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:27.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:27.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:27.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:27.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:27.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:27.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:27.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:27.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:46:27.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:46:27.809 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:27.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:27.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:27.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:27.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:28.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:28.343 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:28.345 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:28.346 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:28.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:28.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:28.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:28.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:28.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:28.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:28.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:28.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:28.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:28.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 03:46:28.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:28.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:28.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:28.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 03:46:28.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:28.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:28.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:28.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:28.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:28.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:28.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:28.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:28.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:28.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:28.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:28.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:28.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:28.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:28.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:28.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:28.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:28.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:28.713 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:28.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:28.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:28.714 [WARNING] transceiver.py:257 (BTS@172.18.105.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:33.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:33.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:33.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:33.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:33.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:33.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:33.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:33.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:33.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:33.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:33.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:33.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:33.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:33.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:33.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:33.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:33.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:33.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:46:33.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:46:33.745 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:33.746 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:33.750 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:34.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:34.275 [DEBUG] fake_trx.py:278 (BTS@172.18.105.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:34.277 [DEBUG] fake_trx.py:297 (BTS@172.18.105.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:34.278 [DEBUG] fake_trx.py:322 (BTS@172.18.105.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:34.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:34.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:34.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:34.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:34.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:34.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:34.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:34.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:34.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:34.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD HANDOVER
2026-04-19 03:46:34.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:34.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:34.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:34.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:34.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:34.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:34.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:34.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:34.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:35.164 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:46:35.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:46:35.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:35.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:36.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:46:36.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:36.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:36.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:36.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD ECHO
2026-04-19 03:46:36.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.105.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:36.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.105.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:36.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.105.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:36.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.105.22:6700) Recv POWERON CMD
2026-04-19 03:46:36.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.105.22:6700) Starting transceiver...
2026-04-19 03:46:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:36.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.105.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:36.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.105.22:6700) Stopping transceiver...
2026-04-19 03:46:36.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:36.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:36.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:36.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:36.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:36.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:36.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:36.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:36.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:36.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:36.404 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:41.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:41.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:41.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:41.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:41.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:41.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:41.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:41.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:41.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:41.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:41.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:41.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:41.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:41.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:41.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:41.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:41.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:41.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:41.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:41.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:46:41.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:46:41.424 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:41.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:41.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:41.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:41.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:41.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:41.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:41.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:41.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:41.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:41.425 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:46.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:46.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:46.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:46.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:46.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:46.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:46.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:46.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:46.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.105.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:46.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.105.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:46.437 [INFO] ctrl_if_trx.py:201 (BTS@172.18.105.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.105.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.105.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:46.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.105.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.105.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.105.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:46.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.105.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:46.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.105.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:46.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.105.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:46.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.105.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:46.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:46.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.105.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:46.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:46.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.105.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:46.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.105.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:46.441 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.105.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:46.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.105.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:46.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.105.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:46.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.105.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:46.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:46.443 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.105.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:46.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:46.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.105.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:46.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.105.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:46.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.105.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:46.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.105.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.105.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.105.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:46.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.105.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.105.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.105.20:5700) Recv POWERON CMD
2026-04-19 03:46:46.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.105.20:5700) Starting transceiver...
2026-04-19 03:46:46.446 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:46.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.105.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.105.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.105.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:46.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.105.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:46.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.105.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:46.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.105.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:46.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.105.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:46.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.105.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:46.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.105.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:46.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.105.20:5700) Stopping transceiver...
2026-04-19 03:46:46.447 [INFO] transceiver.py:246 Stopping clock generator